nvidia,tegra124-xusb.txt 4.6 KB

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  1. NVIDIA Tegra xHCI controller
  2. ============================
  3. The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
  4. the Tegra XUSB pad controller.
  5. Required properties:
  6. --------------------
  7. - compatible: Must be:
  8. - Tegra124: "nvidia,tegra124-xusb"
  9. - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
  10. - Tegra210: "nvidia,tegra210-xusb"
  11. - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
  12. registers and XUSB IPFS registers.
  13. - reg-names: Must contain the following entries:
  14. - "hcd"
  15. - "fpci"
  16. - "ipfs"
  17. - interrupts: Must contain the xHCI host interrupt and the mailbox interrupt.
  18. - clocks: Must contain an entry for each entry in clock-names.
  19. See ../clock/clock-bindings.txt for details.
  20. - clock-names: Must include the following entries:
  21. - xusb_host
  22. - xusb_host_src
  23. - xusb_falcon_src
  24. - xusb_ss
  25. - xusb_ss_src
  26. - xusb_ss_div2
  27. - xusb_hs_src
  28. - xusb_fs_src
  29. - pll_u_480m
  30. - clk_m
  31. - pll_e
  32. - resets: Must contain an entry for each entry in reset-names.
  33. See ../reset/reset.txt for details.
  34. - reset-names: Must include the following entries:
  35. - xusb_host
  36. - xusb_ss
  37. - xusb_src
  38. Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src.
  39. - nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
  40. configure the USB pads used by the XHCI controller
  41. For Tegra124 and Tegra132:
  42. - avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
  43. - dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
  44. - avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
  45. - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
  46. - avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
  47. - avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
  48. - hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
  49. - hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
  50. For Tegra210:
  51. - dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
  52. - hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
  53. - avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
  54. - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
  55. - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
  56. - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
  57. - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.
  58. Optional properties:
  59. --------------------
  60. - phys: Must contain an entry for each entry in phy-names.
  61. See ../phy/phy-bindings.txt for details.
  62. - phy-names: Should include an entry for each PHY used by the controller. The
  63. following PHYs are available:
  64. - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
  65. - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
  66. - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2,
  67. usb3-3
  68. Example:
  69. --------
  70. usb@0,70090000 {
  71. compatible = "nvidia,tegra124-xusb";
  72. reg = <0x0 0x70090000 0x0 0x8000>,
  73. <0x0 0x70098000 0x0 0x1000>,
  74. <0x0 0x70099000 0x0 0x1000>;
  75. reg-names = "hcd", "fpci", "ipfs";
  76. interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
  77. <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
  78. clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
  79. <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
  80. <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
  81. <&tegra_car TEGRA124_CLK_XUSB_SS>,
  82. <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
  83. <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
  84. <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
  85. <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
  86. <&tegra_car TEGRA124_CLK_PLL_U_480M>,
  87. <&tegra_car TEGRA124_CLK_CLK_M>,
  88. <&tegra_car TEGRA124_CLK_PLL_E>;
  89. clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",
  90. "xusb_ss", "xusb_ss_div2", "xusb_ss_src",
  91. "xusb_hs_src", "xusb_fs_src", "pll_u_480m",
  92. "clk_m", "pll_e";
  93. resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>;
  94. reset-names = "xusb_host", "xusb_ss", "xusb_src";
  95. nvidia,xusb-padctl = <&padctl>;
  96. phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
  97. <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
  98. <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
  99. phy-names = "usb2-1", "usb2-2", "usb3-0";
  100. avddio-pex-supply = <&vdd_1v05_run>;
  101. dvddio-pex-supply = <&vdd_1v05_run>;
  102. avdd-usb-supply = <&vdd_3v3_lp0>;
  103. avdd-pll-utmip-supply = <&vddio_1v8>;
  104. avdd-pll-erefe-supply = <&avdd_1v05_run>;
  105. avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
  106. hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
  107. hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
  108. };