rockchip-saradc.txt 1.3 KB

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  1. Rockchip Successive Approximation Register (SAR) A/D Converter bindings
  2. Required properties:
  3. - compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc"
  4. - "rockchip,saradc": for rk3188, rk3288
  5. - "rockchip,rk3066-tsadc": for rk3036
  6. - "rockchip,rk3399-saradc": for rk3399
  7. - reg: physical base address of the controller and length of memory mapped
  8. region.
  9. - interrupts: The interrupt number to the cpu. The interrupt specifier format
  10. depends on the interrupt controller.
  11. - clocks: Must contain an entry for each entry in clock-names.
  12. - clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
  13. the peripheral clock.
  14. - vref-supply: The regulator supply ADC reference voltage.
  15. - #io-channel-cells: Should be 1, see ../iio-bindings.txt
  16. Optional properties:
  17. - resets: Must contain an entry for each entry in reset-names if need support
  18. this option. See ../reset/reset.txt for details.
  19. - reset-names: Must include the name "saradc-apb".
  20. Example:
  21. saradc: saradc@2006c000 {
  22. compatible = "rockchip,saradc";
  23. reg = <0x2006c000 0x100>;
  24. interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
  25. clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
  26. clock-names = "saradc", "apb_pclk";
  27. resets = <&cru SRST_SARADC>;
  28. reset-names = "saradc-apb";
  29. #io-channel-cells = <1>;
  30. vref-supply = <&vcc18>;
  31. };