boards.txt 1.7 KB

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  1. ST-Ericsson Ux500 boards
  2. ------------------------
  3. Required properties (in root node) one of these:
  4. compatible = "st-ericsson,mop500" (legacy)
  5. compatible = "st-ericsson,u8500"
  6. Required node (under root node):
  7. soc: represents the system-on-chip and contains the chip
  8. peripherals
  9. Required property of soc node, one of these:
  10. compatible = "stericsson,db8500"
  11. Required subnodes under soc node:
  12. backupram: (used for CPU spin tables and for storing data
  13. during retention, system won't boot without this):
  14. compatible = "ste,dbx500-backupram"
  15. scu:
  16. see binding for arm/scu.txt
  17. interrupt-controller:
  18. see binding for interrupt-controller/arm,gic.txt
  19. timer:
  20. see binding for arm/twd.txt
  21. clocks:
  22. see binding for clocks/ux500.txt
  23. Example:
  24. /dts-v1/;
  25. / {
  26. model = "ST-Ericsson HREF (pre-v60) and ST UIB";
  27. compatible = "st-ericsson,mop500", "st-ericsson,u8500";
  28. soc {
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. compatible = "stericsson,db8500";
  32. interrupt-parent = <&intc>;
  33. ranges;
  34. backupram@80150000 {
  35. compatible = "ste,dbx500-backupram";
  36. reg = <0x80150000 0x2000>;
  37. };
  38. intc: interrupt-controller@a0411000 {
  39. compatible = "arm,cortex-a9-gic";
  40. #interrupt-cells = <3>;
  41. #address-cells = <1>;
  42. interrupt-controller;
  43. reg = <0xa0411000 0x1000>,
  44. <0xa0410100 0x100>;
  45. };
  46. scu@a04100000 {
  47. compatible = "arm,cortex-a9-scu";
  48. reg = <0xa0410000 0x100>;
  49. };
  50. timer@a0410600 {
  51. compatible = "arm,cortex-a9-twd-timer";
  52. reg = <0xa0410600 0x20>;
  53. interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
  54. clocks = <&smp_twd_clk>;
  55. };
  56. clocks {
  57. compatible = "stericsson,u8500-clks";
  58. smp_twd_clk: smp-twd-clock {
  59. #clock-cells = <0>;
  60. };
  61. };
  62. };
  63. };