prcm.txt 1.3 KB

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  1. OMAP PRCM bindings
  2. Power Reset and Clock Manager lists the device clocks and clockdomains under
  3. a DT hierarchy. Each TI SoC can have multiple PRCM entities listed for it,
  4. each describing one module and the clock hierarchy under it. see [1] for
  5. documentation about the individual clock/clockdomain nodes.
  6. [1] Documentation/devicetree/bindings/clock/ti/*
  7. Required properties:
  8. - compatible: Must be one of:
  9. "ti,am3-prcm"
  10. "ti,am4-prcm"
  11. "ti,omap2-prcm"
  12. "ti,omap3-prm"
  13. "ti,omap3-cm"
  14. "ti,omap4-cm1"
  15. "ti,omap4-prm"
  16. "ti,omap4-cm2"
  17. "ti,omap4-scrm"
  18. "ti,omap5-prm"
  19. "ti,omap5-cm-core-aon"
  20. "ti,omap5-scrm"
  21. "ti,omap5-cm-core"
  22. "ti,dra7-prm"
  23. "ti,dra7-cm-core-aon"
  24. "ti,dra7-cm-core"
  25. "ti,dm814-prcm"
  26. "ti,dm816-prcm"
  27. - reg: Contains PRCM module register address range
  28. (base address and length)
  29. - clocks: clocks for this module
  30. - clockdomains: clockdomains for this module
  31. Example:
  32. cm: cm@48004000 {
  33. compatible = "ti,omap3-cm";
  34. reg = <0x48004000 0x4000>;
  35. cm_clocks: clocks {
  36. #address-cells = <1>;
  37. #size-cells = <0>;
  38. };
  39. cm_clockdomains: clockdomains {
  40. };
  41. }
  42. &cm_clocks {
  43. omap2_32k_fck: omap_32k_fck {
  44. #clock-cells = <0>;
  45. compatible = "fixed-clock";
  46. clock-frequency = <32768>;
  47. };
  48. };
  49. &cm_clockdomains {
  50. core_l3_clkdm: core_l3_clkdm {
  51. compatible = "ti,clockdomain";
  52. clocks = <&sdrc_ick>;
  53. };
  54. };