ctrl.txt 1.8 KB

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  1. OMAP Control Module bindings
  2. Control Module contains miscellaneous features under it based on SoC type.
  3. Pincontrol is one common feature, and it has a specialized support
  4. described in [1]. Typically some clock nodes are also under control module.
  5. Syscon is used to share register level access to drivers external to
  6. control module driver itself.
  7. See [2] for documentation about clock/clockdomain nodes.
  8. [1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
  9. [2] Documentation/devicetree/bindings/clock/ti/*
  10. Required properties:
  11. - compatible: Must be one of:
  12. "ti,am3-scm"
  13. "ti,am4-scm"
  14. "ti,dm814-scrm"
  15. "ti,dm816-scrm"
  16. "ti,omap2-scm"
  17. "ti,omap3-scm"
  18. "ti,omap4-scm-core"
  19. "ti,omap4-scm-padconf-core"
  20. "ti,omap5-scm-core"
  21. "ti,omap5-scm-padconf-core"
  22. "ti,dra7-scm-core"
  23. - reg: Contains Control Module register address range
  24. (base address and length)
  25. Optional properties:
  26. - clocks: clocks for this module
  27. - clockdomains: clockdomains for this module
  28. Examples:
  29. scm: scm@2000 {
  30. compatible = "ti,omap3-scm", "simple-bus";
  31. reg = <0x2000 0x2000>;
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. ranges = <0 0x2000 0x2000>;
  35. omap3_pmx_core: pinmux@30 {
  36. compatible = "ti,omap3-padconf",
  37. "pinctrl-single";
  38. reg = <0x30 0x230>;
  39. #address-cells = <1>;
  40. #size-cells = <0>;
  41. #interrupt-cells = <1>;
  42. interrupt-controller;
  43. pinctrl-single,register-width = <16>;
  44. pinctrl-single,function-mask = <0xff1f>;
  45. };
  46. scm_conf: scm_conf@270 {
  47. compatible = "syscon";
  48. reg = <0x270 0x330>;
  49. #address-cells = <1>;
  50. #size-cells = <1>;
  51. scm_clocks: clocks {
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. };
  55. };
  56. scm_clockdomains: clockdomains {
  57. };
  58. }
  59. &scm_clocks {
  60. mcbsp5_mux_fck: mcbsp5_mux_fck {
  61. #clock-cells = <0>;
  62. compatible = "ti,composite-mux-clock";
  63. clocks = <&core_96m_fck>, <&mcbsp_clks>;
  64. ti,bit-shift = <4>;
  65. reg = <0x02d8>;
  66. };
  67. };