12345678910111213141516171819202122232425 |
- Mediatek apmixedsys controller
- ==============================
- The Mediatek apmixedsys controller provides the PLLs to the system.
- Required Properties:
- - compatible: Should be one of:
- - "mediatek,mt2701-apmixedsys"
- - "mediatek,mt8135-apmixedsys"
- - "mediatek,mt8173-apmixedsys"
- - #clock-cells: Must be 1
- The apmixedsys controller uses the common clk binding from
- Documentation/devicetree/bindings/clock/clock-bindings.txt
- The available clocks are defined in dt-bindings/clock/mt*-clk.h.
- Example:
- apmixedsys: clock-controller@10209000 {
- compatible = "mediatek,mt8173-apmixedsys";
- reg = <0 0x10209000 0 0x1000>;
- #clock-cells = <1>;
- };
|