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Config.in.mips

Config.in.mips 6.2 KB
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  1. # mips default CPU ISAs
    2. 

  2. config BR2_MIPS_CPU_MIPS32
    3. 

  3. 	bool
    4. 

  4. 	select BR2_MIPS_NAN_LEGACY
    5. 

  5. config BR2_MIPS_CPU_MIPS32R2
    6. 

  6. 	bool
    7. 

  7. 	select BR2_MIPS_NAN_LEGACY
    8. 

  8. config BR2_MIPS_CPU_MIPS32R5
    9. 

  9. 	bool
    10. 

  10. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
    11. 

  11. config BR2_MIPS_CPU_MIPS32R6
    12. 

  12. 	bool
    13. 

  13. 	select BR2_MIPS_NAN_2008
    14. 

  14. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
    15. 

  15. config BR2_MIPS_CPU_MIPS64
    16. 

  16. 	bool
    17. 

  17. 	select BR2_MIPS_NAN_LEGACY
    18. 

  18. config BR2_MIPS_CPU_MIPS64R2
    19. 

  19. 	bool
    20. 

  20. 	select BR2_MIPS_NAN_LEGACY
    21. 

  21. config BR2_MIPS_CPU_MIPS64R5
    22. 

  22. 	bool
    23. 

  23. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
    24. 

  24. config BR2_MIPS_CPU_MIPS64R6
    25. 

  25. 	bool
    26. 

  26. 	select BR2_MIPS_NAN_2008
    27. 

  27. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
    28. 

  28. 

  29. choice
    30. 

  30. 	prompt "Target Architecture Variant"
    31. 

  31. 	default BR2_mips_32 if BR2_mips || BR2_mipsel
    32. 

  32. 	default BR2_mips_64 if BR2_mips64 || BR2_mips64el
    33. 

  33. 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
    34. 

  34. 	help
    35. 

  35. 	  Specific CPU variant to use
    36. 

  36. 

  37. 	  64bit cabable: 64, 64r2, 64r5, 64r6
    38. 

  38. 	  non-64bit capable: 32, 32r2, 32r5, 32r6
    39. 

  39. 

  40. config BR2_mips_32
    41. 

  41. 	bool "Generic MIPS32"
    42. 

  42. 	depends on !BR2_ARCH_IS_64
    43. 

  43. 	select BR2_MIPS_CPU_MIPS32
    44. 

  44. config BR2_mips_32r2
    45. 

  45. 	bool "Generic MIPS32R2"
    46. 

  46. 	depends on !BR2_ARCH_IS_64
    47. 

  47. 	select BR2_MIPS_CPU_MIPS32R2
    48. 

  48. config BR2_mips_32r5
    49. 

  49. 	bool "Generic MIPS32R5"
    50. 

  50. 	depends on !BR2_ARCH_IS_64
    51. 

  51. 	select BR2_MIPS_CPU_MIPS32R5
    52. 

  52. config BR2_mips_32r6
    53. 

  53. 	bool "Generic MIPS32R6"
    54. 

  54. 	depends on !BR2_ARCH_IS_64
    55. 

  55. 	select BR2_MIPS_CPU_MIPS32R6
    56. 

  56. config BR2_mips_interaptiv
    57. 

  57. 	bool "interAptiv"
    58. 

  58. 	depends on !BR2_ARCH_IS_64
    59. 

  59. 	select BR2_MIPS_CPU_MIPS32R2
    60. 

  60. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
    61. 

  61. config BR2_mips_m5150
    62. 

  62. 	bool "M5150"
    63. 

  63. 	depends on !BR2_ARCH_IS_64
    64. 

  64. 	select BR2_MIPS_CPU_MIPS32R5
    65. 

  65. 	select BR2_MIPS_NAN_2008
    66. 

  66. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
    67. 

  67. config BR2_mips_m6250
    68. 

  68. 	bool "M6250"
    69. 

  69. 	depends on !BR2_ARCH_IS_64
    70. 

  70. 	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
    71. 

  71. 	select BR2_MIPS_CPU_MIPS32R6
    72. 

  72. config BR2_mips_p5600
    73. 

  73. 	bool "P5600"
    74. 

  74. 	depends on !BR2_ARCH_IS_64
    75. 

  75. 	select BR2_MIPS_CPU_MIPS32R5
    76. 

  76. 	select BR2_MIPS_NAN_2008
    77. 

  77. config BR2_mips_xburst
    78. 

  78. 	bool "XBurst"
    79. 

  79. 	depends on !BR2_ARCH_IS_64
    80. 

  80. 	select BR2_MIPS_CPU_MIPS32R2
    81. 

  81. 	help
    82. 

  82. 	  The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
    83. 

  83. 	  bug in the FPU that can generate incorrect results in
    84. 

  84. 	  certain cases. The problem shows up when you have several
    85. 

  85. 	  fused madd instructions in sequence with dependant
    86. 

  86. 	  operands. This requires the -mno-fused-madd compiler option
    87. 

  87. 	  to be used in order to prevent emitting these instructions.
    88. 

  88. 

  89. 	  See http://www.ingenic.com/en/?xburst.html
    90. 

  90. config BR2_mips_64
    91. 

  91. 	bool "Generic MIPS64"
    92. 

  92. 	depends on BR2_ARCH_IS_64
    93. 

  93. 	select BR2_MIPS_CPU_MIPS64
    94. 

  94. config BR2_mips_64r2
    95. 

  95. 	bool "Generic MIPS64R2"
    96. 

  96. 	depends on BR2_ARCH_IS_64
    97. 

  97. 	select BR2_MIPS_CPU_MIPS64R2
    98. 

  98. config BR2_mips_64r5
    99. 

  99. 	bool "Generic MIPS64R5"
    100. 

  100. 	depends on BR2_ARCH_IS_64
    101. 

  101. 	select BR2_MIPS_CPU_MIPS64R5
    102. 

  102. config BR2_mips_64r6
    103. 

  103. 	bool "Generic MIPS64R6"
    104. 

  104. 	depends on BR2_ARCH_IS_64
    105. 

  105. 	select BR2_MIPS_CPU_MIPS64R6
    106. 

  106. config BR2_mips_i6400
    107. 

  107. 	bool "I6400"
    108. 

  108. 	depends on BR2_ARCH_IS_64
    109. 

  109. 	select BR2_MIPS_CPU_MIPS64R6
    110. 

  110. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
    111. 

  111. config BR2_mips_p6600
    112. 

  112. 	bool "P6600"
    113. 

  113. 	depends on BR2_ARCH_IS_64
    114. 

  114. 	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
    115. 

  115. 	select BR2_MIPS_CPU_MIPS64R6
    116. 

  116. endchoice
    117. 

  117. 

  118. choice
    119. 

  119. 	prompt "Target ABI"
    120. 

  120. 	default BR2_MIPS_NABI32
    121. 

  121. 	depends on BR2_mips64 || BR2_mips64el
    122. 

  122. 

  123. 	help
    124. 

  124. 	  Application Binary Interface to use
    125. 

  125. 

  126. config BR2_MIPS_NABI32
    127. 

  127. 	bool "n32"
    128. 

  128. 	depends on BR2_ARCH_IS_64
    129. 

  129. 	select BR2_KERNEL_64_USERLAND_32
    130. 

  130. config BR2_MIPS_NABI64
    131. 

  131. 	bool "n64"
    132. 

  132. 	depends on BR2_ARCH_IS_64
    133. 

  133. endchoice
    134. 

  134. 

  135. config BR2_MIPS_SOFT_FLOAT
    136. 

  136. 	bool "Use soft-float"
    137. 

  137. 	default y
    138. 

  138. 	select BR2_SOFT_FLOAT
    139. 

  139. 	help
    140. 

  140. 	  If your target CPU does not have a Floating Point Unit (FPU)
    141. 

  141. 	  or a kernel FPU emulator, but you still wish to support
    142. 

  142. 	  floating point functions, then everything will need to be
    143. 

  143. 	  compiled with soft floating point support (-msoft-float).
    144. 

  144. 

  145. choice
    146. 

  146. 	prompt "FP mode"
    147. 

  147. 	default BR2_MIPS_FP32_MODE_XX
    148. 

  148. 	depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
    149. 

  149. 	help
    150. 

  150. 	  MIPS32 supports different FP modes (32,xx,64). Information
    151. 

  151. 	  about FP modes can be found here:
    152. 

  152. 	  https://sourceware.org/binutils/docs/as/MIPS-Options.html
    153. 

  153. 	  https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
    154. 

  154. 

  155. config BR2_MIPS_FP32_MODE_32
    156. 

  156. 	bool "32"
    157. 

  157. 	depends on !BR2_MIPS_CPU_MIPS32R6
    158. 

  158. 

  159. config BR2_MIPS_FP32_MODE_XX
    160. 

  160. 	bool "xx"
    161. 

  161. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
    162. 

  162. 

  163. config BR2_MIPS_FP32_MODE_64
    164. 

  164. 	bool "64"
    165. 

  165. 	depends on !BR2_MIPS_CPU_MIPS32
    166. 

  166. endchoice
    167. 

  167. 

  168. config BR2_GCC_TARGET_FP32_MODE
    169. 

  169. 	default "32"	if BR2_MIPS_FP32_MODE_32
    170. 

  170. 	default "xx"	if BR2_MIPS_FP32_MODE_XX
    171. 

  171. 	default "64"	if BR2_MIPS_FP32_MODE_64
    172. 

  172. 

  173. config BR2_MIPS_NAN_LEGACY
    174. 

  174. 	bool
    175. 

  175. 

  176. config BR2_MIPS_NAN_2008
    177. 

  177. 	bool
    178. 

  178. 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
    179. 

  179. 

  180. choice
    181. 

  181. 	prompt "Target NaN"
    182. 

  182. 	default BR2_MIPS_ENABLE_NAN_2008
    183. 

  183. 	depends on BR2_mips_32r5 || BR2_mips_64r5
    184. 

  184. 	help
    185. 

  185. 	  MIPS supports two different NaN encodings, legacy and 2008.
    186. 

  186. 	  Information about MIPS NaN encodings can be found here:
    187. 

  187. 	  https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
    188. 

  188. 

  189. config BR2_MIPS_ENABLE_NAN_LEGACY
    190. 

  190. 	bool "legacy"
    191. 

  191. 	select BR2_MIPS_NAN_LEGACY
    192. 

  192. 

  193. config BR2_MIPS_ENABLE_NAN_2008
    194. 

  194. 	bool "2008"
    195. 

  195. 	depends on !BR2_MIPS_SOFT_FLOAT
    196. 

  196. 	select BR2_MIPS_NAN_2008
    197. 

  197. endchoice
    198. 

  198. 

  199. config BR2_GCC_TARGET_NAN
    200. 

  200. 	default "legacy"	if BR2_MIPS_NAN_LEGACY
    201. 

  201. 	default "2008"		if BR2_MIPS_NAN_2008
    202. 

  202. 

  203. config BR2_ARCH
    204. 

  204. 	default "mips"		if BR2_mips
    205. 

  205. 	default "mipsel"	if BR2_mipsel
    206. 

  206. 	default "mips64"	if BR2_mips64
    207. 

  207. 	default "mips64el"	if BR2_mips64el
    208. 

  208. 

  209. config BR2_ENDIAN
    210. 

  210. 	default "LITTLE"	if BR2_mipsel || BR2_mips64el
    211. 

  211. 	default "BIG"		if BR2_mips || BR2_mips64
    212. 

  212. 

  213. config BR2_GCC_TARGET_ARCH
    214. 

  214. 	default "mips32"	if BR2_mips_32
    215. 

  215. 	default "mips32r2"	if BR2_mips_32r2
    216. 

  216. 	default "mips32r5"	if BR2_mips_32r5
    217. 

  217. 	default "mips32r6"	if BR2_mips_32r6
    218. 

  218. 	default "interaptiv"	if BR2_mips_interaptiv
    219. 

  219. 	default "m5101"		if BR2_mips_m5150
    220. 

  220. 	default "m6201"		if BR2_mips_m6250
    221. 

  221. 	default "p5600"		if BR2_mips_p5600
    222. 

  222. 	default "mips32r2"	if BR2_mips_xburst
    223. 

  223. 	default "mips64"	if BR2_mips_64
    224. 

  224. 	default "mips64r2"	if BR2_mips_64r2
    225. 

  225. 	default "mips64r5"	if BR2_mips_64r5
    226. 

  226. 	default "mips64r6"	if BR2_mips_64r6
    227. 

  227. 	default "i6400"		if BR2_mips_i6400
    228. 

  228. 	default "p6600"		if BR2_mips_p6600
    229. 

  229. 

  230. config BR2_MIPS_OABI32
    231. 

  231. 	bool
    232. 

  232. 	default y		if BR2_mips || BR2_mipsel
    233. 

  233. 

  234. config BR2_GCC_TARGET_ABI
    235. 

  235. 	default "32"		if BR2_MIPS_OABI32
    236. 

  236. 	default "n32"		if BR2_MIPS_NABI32
    237. 

  237. 	default "64"		if BR2_MIPS_NABI64
    238. 

  238. 

  239. config BR2_READELF_ARCH_NAME
    240. 

  240. 	default "MIPS R3000"
    241. 

  241.