Commit History

Author SHA1 Message Date
  Pedro Gimeno 4e745657ac Add write loops for gaps of 19 to 24 cycles between writes 3 years ago
  Pedro Gimeno c8083b50a0 Add 3 more write loops with different separations, with results 3 years ago
  Pedro Gimeno 242c6dd8be Prepare the code for write loops of other lengths (1/2) 3 years ago
  Pedro Gimeno 58b596792c Drop the Bit Array and change strategy 3 years ago
  Pedro Gimeno 0642fa84c8 Find the first cycle at which a fast write fails and report it 3 years ago
  Pedro Gimeno 799d19f4ba Use memory to store the division result, and IY for error reporting 3 years ago
  Pedro Gimeno d801ff33a6 Progress on formalizing the VRAM timing measurement 3 years ago