gscsio.c 11 KB

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  1. /* $OpenBSD: gscsio.c,v 1.13 2014/09/14 14:17:25 jsg Exp $ */
  2. /*
  3. * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
  4. *
  5. * Permission to use, copy, modify, and distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. /*
  18. * National Semiconductor Geode SC1100 Super I/O.
  19. * Only ACCESS.bus logical device is supported.
  20. */
  21. #include <sys/param.h>
  22. #include <sys/systm.h>
  23. #include <sys/device.h>
  24. #include <sys/kernel.h>
  25. #include <sys/rwlock.h>
  26. #include <machine/bus.h>
  27. #include <dev/i2c/i2cvar.h>
  28. #include <dev/isa/isareg.h>
  29. #include <dev/isa/isavar.h>
  30. #include <dev/isa/gscsioreg.h>
  31. struct gscsio_softc {
  32. struct device sc_dev;
  33. bus_space_tag_t sc_iot;
  34. bus_space_handle_t sc_ioh;
  35. int sc_ld_en[GSCSIO_LDN_LAST + 1];
  36. bus_space_handle_t sc_ld_ioh0[GSCSIO_LDN_LAST + 1];
  37. bus_space_handle_t sc_ld_ioh1[GSCSIO_LDN_LAST + 1];
  38. /* ACCESS.bus */
  39. struct gscsio_acb {
  40. void *sc;
  41. bus_space_handle_t ioh;
  42. struct rwlock buslock;
  43. } sc_acb[2];
  44. struct i2c_controller sc_acb1_tag;
  45. struct i2c_controller sc_acb2_tag;
  46. };
  47. /* Supported logical devices description */
  48. static const struct {
  49. const char *ld_name;
  50. int ld_num;
  51. int ld_iosize0;
  52. int ld_iosize1;
  53. } gscsio_ld[] = {
  54. { "ACB1", GSCSIO_LDN_ACB1, 6, 0 },
  55. { "ACB2", GSCSIO_LDN_ACB2, 6, 0 },
  56. };
  57. int gscsio_probe(struct device *, void *, void *);
  58. void gscsio_attach(struct device *, struct device *, void *);
  59. void gscsio_acb_init(struct gscsio_acb *, i2c_tag_t);
  60. int gscsio_acb_wait(struct gscsio_acb *, int, int);
  61. void gscsio_acb_reset(struct gscsio_acb *acb);
  62. int gscsio_acb_acquire_bus(void *, int);
  63. void gscsio_acb_release_bus(void *, int);
  64. int gscsio_acb_send_start(void *, int);
  65. int gscsio_acb_send_stop(void *, int);
  66. int gscsio_acb_initiate_xfer(void *, i2c_addr_t, int);
  67. int gscsio_acb_read_byte(void *, uint8_t *, int);
  68. int gscsio_acb_write_byte(void *, uint8_t, int);
  69. struct cfattach gscsio_ca = {
  70. sizeof(struct gscsio_softc),
  71. gscsio_probe,
  72. gscsio_attach
  73. };
  74. struct cfdriver gscsio_cd = {
  75. NULL, "gscsio", DV_DULL
  76. };
  77. #define ACB_READ(reg) \
  78. bus_space_read_1(sc->sc_iot, acb->ioh, (reg))
  79. #define ACB_WRITE(reg, val) \
  80. bus_space_write_1(sc->sc_iot, acb->ioh, (reg), (val))
  81. static __inline u_int8_t
  82. idxread(bus_space_tag_t iot, bus_space_handle_t ioh, int idx)
  83. {
  84. bus_space_write_1(iot, ioh, GSCSIO_IDX, idx);
  85. return (bus_space_read_1(iot, ioh, GSCSIO_DAT));
  86. }
  87. static __inline void
  88. idxwrite(bus_space_tag_t iot, bus_space_handle_t ioh, int idx, u_int8_t data)
  89. {
  90. bus_space_write_1(iot, ioh, GSCSIO_IDX, idx);
  91. bus_space_write_1(iot, ioh, GSCSIO_DAT, data);
  92. }
  93. int
  94. gscsio_probe(struct device *parent, void *match, void *aux)
  95. {
  96. struct isa_attach_args *ia = aux;
  97. bus_space_tag_t iot;
  98. bus_space_handle_t ioh;
  99. int iobase;
  100. int rv = 0;
  101. iot = ia->ia_iot;
  102. iobase = ia->ipa_io[0].base;
  103. if (bus_space_map(iot, iobase, GSCSIO_IOSIZE, 0, &ioh))
  104. return (0);
  105. if (idxread(iot, ioh, GSCSIO_ID) == GSCSIO_ID_SC1100)
  106. rv = 1;
  107. bus_space_unmap(iot, ioh, GSCSIO_IOSIZE);
  108. if (rv) {
  109. ia->ipa_nio = 1;
  110. ia->ipa_io[0].length = GSCSIO_IOSIZE;
  111. ia->ipa_nmem = 0;
  112. ia->ipa_nirq = 0;
  113. ia->ipa_ndrq = 0;
  114. }
  115. return (rv);
  116. }
  117. void
  118. gscsio_attach(struct device *parent, struct device *self, void *aux)
  119. {
  120. struct gscsio_softc *sc = (void *)self;
  121. struct isa_attach_args *ia = aux;
  122. int i;
  123. int iobase;
  124. sc->sc_iot = ia->ia_iot;
  125. if (bus_space_map(sc->sc_iot, ia->ipa_io[0].base, GSCSIO_IOSIZE,
  126. 0, &sc->sc_ioh)) {
  127. printf(": can't map i/o space\n");
  128. return;
  129. }
  130. printf(": SC1100 SIO rev %d:",
  131. idxread(sc->sc_iot, sc->sc_ioh, GSCSIO_REV));
  132. /* Configure all supported logical devices */
  133. for (i = 0; i < sizeof (gscsio_ld) / sizeof(gscsio_ld[0]); i++) {
  134. sc->sc_ld_en[gscsio_ld[i].ld_num] = 0;
  135. /* Select the device and check if it's activated */
  136. idxwrite(sc->sc_iot, sc->sc_ioh, GSCSIO_LDN,
  137. gscsio_ld[i].ld_num);
  138. if ((idxread(sc->sc_iot, sc->sc_ioh, GSCSIO_ACT) &
  139. GSCSIO_ACT_EN) == 0)
  140. continue;
  141. /* Map I/O space 0 if necessary */
  142. if (gscsio_ld[i].ld_iosize0 != 0) {
  143. iobase = idxread(sc->sc_iot, sc->sc_ioh,
  144. GSCSIO_IO0_MSB);
  145. iobase <<= 8;
  146. iobase |= idxread(sc->sc_iot, sc->sc_ioh,
  147. GSCSIO_IO0_LSB);
  148. if (bus_space_map(sc->sc_iot, iobase,
  149. gscsio_ld[i].ld_iosize0, 0,
  150. &sc->sc_ld_ioh0[gscsio_ld[i].ld_num]))
  151. continue;
  152. }
  153. /* Map I/O space 1 if necessary */
  154. if (gscsio_ld[i].ld_iosize1 != 0) {
  155. iobase = idxread(sc->sc_iot, sc->sc_ioh,
  156. GSCSIO_IO1_MSB);
  157. iobase <<= 8;
  158. iobase |= idxread(sc->sc_iot, sc->sc_ioh,
  159. GSCSIO_IO1_LSB);
  160. if (bus_space_map(sc->sc_iot, iobase,
  161. gscsio_ld[i].ld_iosize1, 0,
  162. &sc->sc_ld_ioh0[gscsio_ld[i].ld_num])) {
  163. bus_space_unmap(sc->sc_iot,
  164. sc->sc_ld_ioh0[gscsio_ld[i].ld_num],
  165. gscsio_ld[i].ld_iosize0);
  166. continue;
  167. }
  168. }
  169. sc->sc_ld_en[gscsio_ld[i].ld_num] = 1;
  170. printf(" %s", gscsio_ld[i].ld_name);
  171. }
  172. printf("\n");
  173. /* Initialize ACCESS.bus 1 */
  174. if (sc->sc_ld_en[GSCSIO_LDN_ACB1]) {
  175. sc->sc_acb[0].sc = sc;
  176. sc->sc_acb[0].ioh = sc->sc_ld_ioh0[GSCSIO_LDN_ACB1];
  177. rw_init(&sc->sc_acb[0].buslock, "iiclk");
  178. gscsio_acb_init(&sc->sc_acb[0], &sc->sc_acb1_tag);
  179. }
  180. /* Initialize ACCESS.bus 2 */
  181. if (sc->sc_ld_en[GSCSIO_LDN_ACB2]) {
  182. sc->sc_acb[1].sc = sc;
  183. sc->sc_acb[1].ioh = sc->sc_ld_ioh0[GSCSIO_LDN_ACB2];
  184. rw_init(&sc->sc_acb[1].buslock, "iiclk");
  185. gscsio_acb_init(&sc->sc_acb[1], &sc->sc_acb2_tag);
  186. }
  187. }
  188. void
  189. gscsio_acb_init(struct gscsio_acb *acb, i2c_tag_t tag)
  190. {
  191. struct gscsio_softc *sc = acb->sc;
  192. struct i2cbus_attach_args iba;
  193. /* Enable ACB and configure clock frequency */
  194. ACB_WRITE(GSCSIO_ACB_CTL2, GSCSIO_ACB_CTL2_EN |
  195. (GSCSIO_ACB_FREQ << GSCSIO_ACB_CTL2_FREQ_SHIFT));
  196. /* Select polling mode */
  197. ACB_WRITE(GSCSIO_ACB_CTL1, ACB_READ(GSCSIO_ACB_CTL1) &
  198. ~GSCSIO_ACB_CTL1_INTEN);
  199. /* Disable slave address */
  200. ACB_WRITE(GSCSIO_ACB_ADDR, ACB_READ(GSCSIO_ACB_ADDR) &
  201. ~GSCSIO_ACB_ADDR_SAEN);
  202. /* Attach I2C framework */
  203. tag->ic_cookie = acb;
  204. tag->ic_acquire_bus = gscsio_acb_acquire_bus;
  205. tag->ic_release_bus = gscsio_acb_release_bus;
  206. tag->ic_send_start = gscsio_acb_send_start;
  207. tag->ic_send_stop = gscsio_acb_send_stop;
  208. tag->ic_initiate_xfer = gscsio_acb_initiate_xfer;
  209. tag->ic_read_byte = gscsio_acb_read_byte;
  210. tag->ic_write_byte = gscsio_acb_write_byte;
  211. bzero(&iba, sizeof(iba));
  212. iba.iba_name = "iic";
  213. iba.iba_tag = tag;
  214. config_found(&sc->sc_dev, &iba, iicbus_print);
  215. }
  216. int
  217. gscsio_acb_wait(struct gscsio_acb *acb, int bits, int flags)
  218. {
  219. struct gscsio_softc *sc = acb->sc;
  220. u_int8_t st;
  221. int i;
  222. for (i = 0; i < 100; i++) {
  223. st = ACB_READ(GSCSIO_ACB_ST);
  224. if (st & GSCSIO_ACB_ST_BER) {
  225. printf("%s: bus error, flags=0x%x\n",
  226. sc->sc_dev.dv_xname, flags);
  227. gscsio_acb_reset(acb);
  228. return (EIO);
  229. }
  230. if (st & GSCSIO_ACB_ST_NEGACK) {
  231. #if 0
  232. printf("%s: negative ack, flags=0x%x\n",
  233. sc->sc_dev.dv_xname, flags);
  234. #endif
  235. gscsio_acb_reset(acb);
  236. return (EIO);
  237. }
  238. if ((st & bits) == bits)
  239. break;
  240. delay(10);
  241. }
  242. if ((st & bits) != bits) {
  243. printf("%s: timeout, flags=0x%x\n",
  244. sc->sc_dev.dv_xname, flags);
  245. gscsio_acb_reset(acb);
  246. return (ETIMEDOUT);
  247. }
  248. return (0);
  249. }
  250. void
  251. gscsio_acb_reset(struct gscsio_acb *acb)
  252. {
  253. struct gscsio_softc *sc = acb->sc;
  254. u_int8_t st, ctl;
  255. /* Clear MASTER, NEGACK and BER */
  256. st = ACB_READ(GSCSIO_ACB_ST);
  257. st |= GSCSIO_ACB_ST_MASTER | GSCSIO_ACB_ST_NEGACK | GSCSIO_ACB_ST_BER;
  258. ACB_WRITE(GSCSIO_ACB_ST, st);
  259. /* Disable and re-enable ACB */
  260. ACB_WRITE(GSCSIO_ACB_CTL2, 0);
  261. ACB_WRITE(GSCSIO_ACB_CTL2, GSCSIO_ACB_CTL2_EN |
  262. (GSCSIO_ACB_FREQ << GSCSIO_ACB_CTL2_FREQ_SHIFT));
  263. /* Send stop */
  264. ctl = ACB_READ(GSCSIO_ACB_CTL1);
  265. ctl |= GSCSIO_ACB_CTL1_STOP;
  266. ACB_WRITE(GSCSIO_ACB_CTL1, ctl);
  267. }
  268. int
  269. gscsio_acb_acquire_bus(void *cookie, int flags)
  270. {
  271. struct gscsio_acb *acb = cookie;
  272. if (cold || flags & I2C_F_POLL)
  273. return (0);
  274. return (rw_enter(&acb->buslock, RW_WRITE | RW_INTR));
  275. }
  276. void
  277. gscsio_acb_release_bus(void *cookie, int flags)
  278. {
  279. struct gscsio_acb *acb = cookie;
  280. if (cold || flags & I2C_F_POLL)
  281. return;
  282. rw_exit(&acb->buslock);
  283. }
  284. int
  285. gscsio_acb_send_start(void *cookie, int flags)
  286. {
  287. struct gscsio_acb *acb = cookie;
  288. struct gscsio_softc *sc = acb->sc;
  289. u_int8_t ctl;
  290. ctl = ACB_READ(GSCSIO_ACB_CTL1);
  291. ctl |= GSCSIO_ACB_CTL1_START;
  292. ACB_WRITE(GSCSIO_ACB_CTL1, ctl);
  293. return (0);
  294. }
  295. int
  296. gscsio_acb_send_stop(void *cookie, int flags)
  297. {
  298. struct gscsio_acb *acb = cookie;
  299. struct gscsio_softc *sc = acb->sc;
  300. u_int8_t ctl;
  301. ctl = ACB_READ(GSCSIO_ACB_CTL1);
  302. ctl |= GSCSIO_ACB_CTL1_STOP;
  303. ACB_WRITE(GSCSIO_ACB_CTL1, ctl);
  304. return (0);
  305. }
  306. int
  307. gscsio_acb_initiate_xfer(void *cookie, i2c_addr_t addr, int flags)
  308. {
  309. struct gscsio_acb *acb = cookie;
  310. struct gscsio_softc *sc = acb->sc;
  311. u_int8_t ctl;
  312. int dir;
  313. int error;
  314. /* Issue start condition */
  315. ctl = ACB_READ(GSCSIO_ACB_CTL1);
  316. ctl |= GSCSIO_ACB_CTL1_START;
  317. ACB_WRITE(GSCSIO_ACB_CTL1, ctl);
  318. /* Wait for bus mastership */
  319. if ((error = gscsio_acb_wait(acb,
  320. GSCSIO_ACB_ST_MASTER | GSCSIO_ACB_ST_SDAST, flags)))
  321. return (error);
  322. /* Send address byte */
  323. dir = (flags & I2C_F_READ ? 1 : 0);
  324. ACB_WRITE(GSCSIO_ACB_SDA, (addr << 1) | dir);
  325. return (0);
  326. }
  327. int
  328. gscsio_acb_read_byte(void *cookie, uint8_t *bytep, int flags)
  329. {
  330. struct gscsio_acb *acb = cookie;
  331. struct gscsio_softc *sc = acb->sc;
  332. u_int8_t ctl;
  333. int error;
  334. /* Wait for the bus to be ready */
  335. if ((error = gscsio_acb_wait(acb, GSCSIO_ACB_ST_SDAST, flags)))
  336. return (error);
  337. /* Acknowledge the last byte */
  338. if (flags & I2C_F_LAST) {
  339. ctl = ACB_READ(GSCSIO_ACB_CTL1);
  340. ctl |= GSCSIO_ACB_CTL1_ACK;
  341. ACB_WRITE(GSCSIO_ACB_CTL1, ctl);
  342. }
  343. /* Read data byte */
  344. *bytep = ACB_READ(GSCSIO_ACB_SDA);
  345. return (0);
  346. }
  347. int
  348. gscsio_acb_write_byte(void *cookie, uint8_t byte, int flags)
  349. {
  350. struct gscsio_acb *acb = cookie;
  351. struct gscsio_softc *sc = acb->sc;
  352. u_int8_t ctl;
  353. int error;
  354. /* Wait for the bus to be ready */
  355. if ((error = gscsio_acb_wait(acb, GSCSIO_ACB_ST_SDAST, flags)))
  356. return (error);
  357. /* Send stop after the last byte */
  358. if (flags & I2C_F_STOP) {
  359. ctl = ACB_READ(GSCSIO_ACB_CTL1);
  360. ctl |= GSCSIO_ACB_CTL1_STOP;
  361. ACB_WRITE(GSCSIO_ACB_CTL1, ctl);
  362. }
  363. /* Write data byte */
  364. ACB_WRITE(GSCSIO_ACB_SDA, byte);
  365. return (0);
  366. }