unlockmemcard.ds 2.6 KB

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  1. ; This is the ucode used to "unlock" memcards
  2. ; RE purely out of interest, and hunch that it does trickies
  3. IROM_BASE: equ 0x8000
  4. ; Exception vectors
  5. nop
  6. nop
  7. nop
  8. nop
  9. nop
  10. nop
  11. nop
  12. nop
  13. nop
  14. nop
  15. nop
  16. nop
  17. nop
  18. halt ; Exception 0-6 nop slide to here
  19. rti ; Exception 7
  20. halt
  21. ; Entry point
  22. ; Standard init stuff
  23. sbset #0x06
  24. sbclr #0x03
  25. sbclr #0x04
  26. sbset #0x05
  27. lri $CR, #0x00ff
  28. lri $WR0, #0xffff
  29. lri $WR1, #0xffff
  30. lri $WR2, #0xffff
  31. lri $WR3, #0xffff
  32. set40
  33. ; 0xdcd10000 is the init mail
  34. call wait_for_dsp_mbox
  35. si @DMBH, #0xdcd1
  36. si @DMBL, #0x0000
  37. si @DIRQ, #0x0001
  38. ; Wait for cpu to say "go!" - i think
  39. wait_for_start_cmd:
  40. call wait_for_cpu_mbox
  41. lrs $AC1.L, @CMBL
  42. cmpi $AC1.M, #0xff00
  43. jnz wait_for_start_cmd
  44. dma_dram_and_prepare_for_crazy_irom_func:
  45. call wait_for_cpu_mbox
  46. mrr $AC0.M, $AC1.M
  47. lrs $AC0.L, @CMBL ; main ram addr.l
  48. andi $AC0.M, #0x0fff ; main ram addr.h & 0x0fff
  49. lri $AX0.L, #0x0400 ; dsp addr
  50. lri $AX0.H, #0x0010 ; length (bytes)
  51. lri $AX1.L, #0x0000 ; dsp dram to cpu
  52. set16
  53. call do_dma
  54. call IROM_BASE+0x0644; holy mother of jesus that func is gonna be hard
  55. ; 0xdcd10003 means finished unlocking?
  56. call wait_for_dsp_mbox
  57. si @DMBH, #0xdcd1
  58. si @DMBL, #0x0003
  59. si @DIRQ, #0x0001
  60. set40
  61. call wait_for_cpu_mbox
  62. cmpi $AC1.M, #0xcdd1
  63. jnz dma_dram_and_prepare_for_crazy_irom_func
  64. lrs $AC1.M, @CMBL
  65. cmpi $AC1.M, #0x0001
  66. jz _005afunc
  67. cmpi $AC1.M, #0x0002
  68. jz IROM_BASE ; End of this ucode, wait for a new one
  69. jmp dma_dram_and_prepare_for_crazy_irom_func
  70. halt ; Prolly never reached
  71. ; 10 mails from cpu then irom func - looks interesting
  72. _005afunc:
  73. set16
  74. call wait_for_cpu_mbox
  75. lrs $AC1.L, @CMBL
  76. call wait_for_cpu_mbox
  77. lrs $AC1.L, @CMBL
  78. call wait_for_cpu_mbox
  79. lrs $AC1.L, @CMBL
  80. call wait_for_cpu_mbox
  81. lr $IX1, @CMBL
  82. andi $AC1.M, #0x0fff
  83. mrr $IX0, $AC1.M
  84. call wait_for_cpu_mbox
  85. lr $IX3, @CMBL
  86. call wait_for_cpu_mbox
  87. lr $IX2, @CMBL
  88. call wait_for_cpu_mbox
  89. lr $AR0, @CMBL
  90. call wait_for_cpu_mbox
  91. lrs $AX0.L, @CMBL
  92. andi $AC1.M, #0x0fff
  93. mrr $AX0.H, $AC1.M
  94. call wait_for_cpu_mbox
  95. lrs $AX1.L, @CMBL
  96. call wait_for_cpu_mbox
  97. lrs $AX1.H, @CMBL
  98. sbclr #0x05
  99. sbclr #0x06
  100. jmp IROM_BASE+0x00b5; IROM - can dma stuff
  101. halt
  102. wait_for_dsp_mbox:
  103. lrs $AC1.M, @DMBH
  104. andcf $AC1.M, #0x8000
  105. jlz wait_for_dsp_mbox
  106. ret
  107. wait_for_cpu_mbox:
  108. lrs $AC1.M, @CMBH
  109. andcf $AC1.M, #0x8000
  110. jlnz wait_for_cpu_mbox
  111. ret
  112. do_dma:
  113. srs @DSMAH, $AC0.M
  114. srs @DSMAL, $AC0.L
  115. sr @DSPA, $AX0.L
  116. sr @DSCR, $AX1.L
  117. sr @DSBL, $AX0.H
  118. wait_dma:
  119. lrs $AC0.M, @DSCR
  120. andcf $AC0.M, #0x0004
  121. jlz wait_dma
  122. ret
  123. ; Trailing nops...pad to 32bytes
  124. nop
  125. nop
  126. nop
  127. nop
  128. nop
  129. nop
  130. nop
  131. nop
  132. nop
  133. nop
  134. nop
  135. nop
  136. nop
  137. nop
  138. ; uCode is 0xb0 words