dump_roms.ds 4.3 KB

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  1. ; This ucode can copy the dsp instruction rom and coefficient table.
  2. ; irom:
  3. ; 0x8000 in instruction space
  4. ; coef:
  5. ; 0x1000 in data space
  6. ;
  7. ; Both irom and coef are 0x1000 words in length - remember, DSP
  8. ; uses 16bit words
  9. ;
  10. ; The DSP has two address spaces, to load data from instruction
  11. ; space you need to use 'i'-prefixed instructions.
  12. /********************************/
  13. /** HANDY THANGERS **/
  14. /********************************/
  15. ; External
  16. MEM_BASE: equ 0x0000
  17. MEM_HI: equ MEM_BASE
  18. MEM_LO: equ MEM_BASE+1
  19. ; DSP
  20. DRAM_BASE: equ 0x0000
  21. ; Config reg controls dma behavior
  22. CR_TO_DSP: equ 0
  23. CR_TO_CPU: equ 1
  24. CR_IRAM: equ 2
  25. CR_DRAM: equ 0
  26. IROM_BASE: equ 0x8000
  27. COEF_BASE: equ 0x1000
  28. DUMP_SIZE: equ 0x2000 ; in bytes!
  29. /**************************************************************/
  30. /* CODE START */
  31. /**************************************************************/
  32. ; iram 0x00 - Exception vectors
  33. ; 8 vectors, 2 opcodes each
  34. jmp exception0
  35. jmp exception1
  36. jmp exception2
  37. jmp exception3
  38. jmp exception4
  39. jmp exception5
  40. jmp exception6
  41. jmp exception7
  42. ; iram 0x10 - Our entry point
  43. sbset #0x02
  44. sbset #0x03
  45. sbclr #0x04
  46. sbset #0x05
  47. sbset #0x06
  48. ; ???
  49. s16
  50. lri $CR, #0x00ff
  51. /**************************************************************/
  52. /* MAIN */
  53. /**************************************************************/
  54. ; This ucode is meant only to dump the ROMs, and as such is
  55. ; self-contained and skimpy
  56. main:
  57. clr $acc1
  58. clr $acc0
  59. ; This consumes ALL of dram! We must be careful until we dma it!
  60. call copy_irom_to_dram
  61. ; Send mail saying irom dump is done
  62. call wait_for_dsp_mbox
  63. si @DMBH, #0x8888
  64. si @DMBL, #0xc0de
  65. si @DIRQ, #0x0001
  66. ; Get address to dma to, dma, and wait till done
  67. call dma_dram_to_cmbl
  68. ; Now we can start over for the coef
  69. call copy_coef_to_dram
  70. ; Send mail saying coef dump is done
  71. call wait_for_dsp_mbox
  72. si @DMBH, #0x8888
  73. si @DMBL, #0xda7a
  74. si @DIRQ, #0x0001
  75. ; Get address to dma to, dma, and wait till done
  76. call dma_dram_to_cmbl
  77. ; Die
  78. do_halt:
  79. halt
  80. /**************************************************************/
  81. /* HELPER FUNCTIONS */
  82. /**************************************************************/
  83. /********************************/
  84. /** DUMPING FUNCTIONS **/
  85. /********************************/
  86. ; Dump irom from 0x8000 in instruction space
  87. copy_irom_to_dram:
  88. lri $ar0, #IROM_BASE
  89. lri $ar1, #DRAM_BASE
  90. lri $ar2, #DUMP_SIZE/2 ; each iteration copies a word
  91. bloop $ar2, copy_irom_to_dram_end
  92. ilrri $ac0.m, @$ar0
  93. ; Now ac0.m is 16bits of irom!
  94. srri @$ar1, $ac0.m
  95. copy_irom_to_dram_end:
  96. nop
  97. ret
  98. ; Dump coef from 0x1000 in data space
  99. copy_coef_to_dram:
  100. lri $ar0, #COEF_BASE
  101. lri $ar1, #DRAM_BASE
  102. lri $ar2, #DUMP_SIZE/2 ; each iteration copies a word
  103. bloop $ar2, copy_coef_to_dram_end
  104. lrri $ac0.m, @$ar0
  105. ; Now ac0.m is 16bits of coef!
  106. srri @$ar1, $ac0.m
  107. copy_coef_to_dram_end:
  108. nop
  109. ret
  110. /********************************/
  111. /** DMA **/
  112. /********************************/
  113. ; DMA implementation which does not write to dram
  114. ; We take advantage of the fact that we know the mail is going to
  115. ; contain the address which we should dma to
  116. dma_dram_to_cmbl:
  117. call wait_for_cpu_mbox
  118. lrs $ac0.m, @CMBL
  119. andi $ac1.m, #0x7fff
  120. ; Directly do dma; writing the length kicks it off
  121. sr @DSMAH, $ac1.m
  122. sr @DSMAL, $ac0.m
  123. si @DSPA, #DRAM_BASE
  124. si @DSCR, #(CR_TO_CPU|CR_DRAM)
  125. si @DSBL, #DUMP_SIZE
  126. ; Waits for previous DMA to complete by watching a bit in DSCR.
  127. wait_dma:
  128. lrs $ac1.m, @DSCR
  129. andcf $ac1.m, #0x0004
  130. jlz wait_dma
  131. ret
  132. /********************************/
  133. /** MAILBOX **/
  134. /********************************/
  135. ; Waits for a mail to arrive in the DSP in-mailbox.
  136. wait_for_dsp_mbox:
  137. lrs $ac1.m, @DMBH
  138. andcf $ac1.m, #0x8000
  139. jlz wait_for_dsp_mbox
  140. ret
  141. ; Waits for the CPU to grab a mail that we just sent from the DSP.
  142. wait_for_cpu_mbox:
  143. lrs $ac1.m, @CMBH
  144. andcf $ac1.m, #0x8000
  145. jlnz wait_for_cpu_mbox
  146. ret
  147. /********************************/
  148. /** EXCEPTION HANDLERS **/
  149. /********************************/
  150. ; ...zey do nutzing!
  151. exception0:
  152. rti
  153. exception1:
  154. rti
  155. exception2:
  156. rti
  157. exception3:
  158. rti
  159. exception4:
  160. rti
  161. exception5:
  162. rti
  163. exception6:
  164. rti
  165. exception7:
  166. rti