cpu.h 5.4 KB

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  1. /* This file is part of the program psim.
  2. Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
  3. This program is free software; you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation; either version 3 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with this program; if not, see <http://www.gnu.org/licenses/>.
  13. */
  14. #ifndef _CPU_H_
  15. #define _CPU_H_
  16. #include "basics.h"
  17. #include "registers.h"
  18. #include "device.h"
  19. #include "corefile.h"
  20. #include "vm.h"
  21. #include "events.h"
  22. #include "interrupts.h"
  23. #include "psim.h"
  24. #include "idecode.h"
  25. #include "itable.h"
  26. #include "os_emul.h"
  27. #include "mon.h"
  28. #include "model.h"
  29. #ifndef CONST_ATTRIBUTE
  30. #define CONST_ATTRIBUTE __attribute__((__const__))
  31. #endif
  32. /* typedef struct _cpu cpu;
  33. Declared in basics.h because it is used opaquely throughout the
  34. code */
  35. /* Create a cpu object */
  36. INLINE_CPU\
  37. (cpu *) cpu_create
  38. (psim *system,
  39. core *memory,
  40. cpu_mon *monitor,
  41. os_emul *cpu_emulation,
  42. int cpu_nr);
  43. INLINE_CPU\
  44. (void) cpu_init
  45. (cpu *processor);
  46. /* Find our way home */
  47. INLINE_CPU\
  48. (psim *) cpu_system
  49. (cpu *processor) CONST_ATTRIBUTE;
  50. INLINE_CPU\
  51. (cpu_mon *) cpu_monitor
  52. (cpu *processor) CONST_ATTRIBUTE;
  53. INLINE_CPU\
  54. (os_emul *) cpu_os_emulation
  55. (cpu *processor);
  56. INLINE_CPU\
  57. (int) cpu_nr
  58. (cpu *processor) CONST_ATTRIBUTE;
  59. /* manipulate the processors program counter and execution state.
  60. The program counter is not included in the register file. Instead
  61. it is extracted and then later restored (set, reset, halt). This
  62. is to give the user of the cpu (and the compiler) the chance to
  63. minimize the need to load/store the cpu's PC value. (Especially in
  64. the case of a single processor) */
  65. INLINE_CPU\
  66. (void) cpu_set_program_counter
  67. (cpu *processor,
  68. unsigned_word new_program_counter);
  69. INLINE_CPU\
  70. (unsigned_word) cpu_get_program_counter
  71. (cpu *processor);
  72. INLINE_CPU\
  73. (void) cpu_restart
  74. (cpu *processor,
  75. unsigned_word nia);
  76. INLINE_CPU\
  77. (void) cpu_halt
  78. (cpu *processor,
  79. unsigned_word nia,
  80. stop_reason reason,
  81. int signal);
  82. EXTERN_CPU\
  83. (void) cpu_error
  84. (cpu *processor,
  85. unsigned_word cia,
  86. const char *fmt,
  87. ...) __attribute__ ((format (printf, 3, 4)));
  88. /* The processors local concept of time */
  89. INLINE_CPU\
  90. (signed64) cpu_get_time_base
  91. (cpu *processor);
  92. INLINE_CPU\
  93. (void) cpu_set_time_base
  94. (cpu *processor,
  95. signed64 time_base);
  96. INLINE_CPU\
  97. (signed32) cpu_get_decrementer
  98. (cpu *processor);
  99. INLINE_CPU\
  100. (void) cpu_set_decrementer
  101. (cpu *processor,
  102. signed32 decrementer);
  103. #if WITH_IDECODE_CACHE_SIZE
  104. /* Return the cache entry that matches the given CIA. No guarentee
  105. that the cache entry actually contains the instruction for that
  106. address */
  107. INLINE_CPU\
  108. (idecode_cache) *cpu_icache_entry
  109. (cpu *processor,
  110. unsigned_word cia);
  111. INLINE_CPU\
  112. (void) cpu_flush_icache
  113. (cpu *processor);
  114. #endif
  115. /* reveal the processors VM:
  116. At first sight it may seem better to, instead of exposing the cpu's
  117. inner vm maps, to have the cpu its self provide memory manipulation
  118. functions. (eg cpu_instruction_fetch() cpu_data_read_4())
  119. Unfortunatly in addition to these functions is the need (for the
  120. debugger) to be able to read/write to memory in ways that violate
  121. the vm protection (eg store breakpoint instruction in the
  122. instruction map). */
  123. INLINE_CPU\
  124. (vm_data_map *) cpu_data_map
  125. (cpu *processor);
  126. INLINE_CPU\
  127. (vm_instruction_map *) cpu_instruction_map
  128. (cpu *processor);
  129. INLINE_CPU\
  130. (void) cpu_page_tlb_invalidate_entry
  131. (cpu *processor,
  132. unsigned_word ea);
  133. INLINE_CPU\
  134. (void) cpu_page_tlb_invalidate_all
  135. (cpu *processor);
  136. /* reveal the processors interrupt state */
  137. INLINE_CPU\
  138. (interrupts *) cpu_interrupts
  139. (cpu *processor);
  140. /* grant access to the reservation information */
  141. typedef struct _memory_reservation {
  142. int valid;
  143. unsigned_word addr;
  144. unsigned_word data;
  145. } memory_reservation;
  146. INLINE_CPU\
  147. (memory_reservation *) cpu_reservation
  148. (cpu *processor);
  149. /* Registers:
  150. This model exploits the PowerPC's requirement for a synchronization
  151. to occure after (or before) the update of any context controlling
  152. register. All context sync points must call the sync function
  153. below to when ever a synchronization point is reached */
  154. INLINE_CPU\
  155. (registers *) cpu_registers
  156. (cpu *processor) CONST_ATTRIBUTE;
  157. INLINE_CPU\
  158. (void) cpu_synchronize_context
  159. (cpu *processor,
  160. unsigned_word cia);
  161. #define IS_PROBLEM_STATE(PROCESSOR) \
  162. (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
  163. ? (cpu_registers(PROCESSOR)->msr & msr_problem_state) \
  164. : 1)
  165. #define IS_64BIT_MODE(PROCESSOR) \
  166. (WITH_TARGET_WORD_BITSIZE == 64 \
  167. ? (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
  168. ? (cpu_registers(PROCESSOR)->msr & msr_64bit_mode) \
  169. : 1) \
  170. : 0)
  171. #define IS_FP_AVAILABLE(PROCESSOR) \
  172. (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
  173. ? (cpu_registers(PROCESSOR)->msr & msr_floating_point_available) \
  174. : 1)
  175. INLINE_CPU\
  176. (void) cpu_print_info
  177. (cpu *processor,
  178. int verbose);
  179. INLINE_CPU\
  180. (model_data *) cpu_model
  181. (cpu *processor) CONST_ATTRIBUTE;
  182. #if (CPU_INLINE & INCLUDE_MODULE)
  183. # include "cpu.c"
  184. #endif
  185. #endif