micromipsrun.c 4.3 KB

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  1. /* Run function for the micromips simulator
  2. Copyright (C) 2005-2015 Free Software Foundation, Inc.
  3. Contributed by Imagination Technologies, Ltd.
  4. Written by Andrew Bennett <andrew.bennett@imgtec.com>.
  5. This file is part of the MIPS sim.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 3 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  16. #include "sim-main.h"
  17. #include "micromips16_idecode.h"
  18. #include "micromips32_idecode.h"
  19. #include "micromips_m32_idecode.h"
  20. #include "bfd.h"
  21. #include "sim-engine.h"
  22. /* These definitions come from the *_support.h files generated by igen and are
  23. required because they are used in some of the macros in the code below.
  24. Unfortunately we can not just blindly include the *_support.h files to get
  25. these definitions because some of the defines in these files are specific
  26. for a particular configuration of the simulator for example instruction word
  27. size is 16 bits for micromips16 and 32 bits for micromips32. This means we
  28. could break future code changes by doing this, so a safer approach is to just
  29. extract the defines that we need to get this file to compile. */
  30. #define SD sd
  31. #define CPU cpu
  32. address_word
  33. micromips_instruction_decode (SIM_DESC sd, sim_cpu * cpu,
  34. address_word cia,
  35. int instruction_size)
  36. {
  37. if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_ANY)
  38. {
  39. micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
  40. if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
  41. && MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
  42. return micromips16_idecode_issue (sd, instruction_0, cia);
  43. else
  44. {
  45. micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
  46. return micromips32_idecode_issue (sd, instruction_0, cia);
  47. }
  48. }
  49. else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_16)
  50. {
  51. micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
  52. if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
  53. && MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
  54. return micromips16_idecode_issue (sd, instruction_0, cia);
  55. else
  56. sim_engine_abort (sd, cpu, cia,
  57. "Invalid 16 bit micromips instruction");
  58. }
  59. else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_32)
  60. {
  61. micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
  62. return micromips32_idecode_issue (sd, instruction_0, cia);
  63. }
  64. else
  65. return NULL_CIA;
  66. }
  67. void
  68. sim_engine_run (SIM_DESC sd, int next_cpu_nr, int nr_cpus,
  69. int signal)
  70. {
  71. micromips_m32_instruction_word instruction_0;
  72. sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
  73. micromips32_instruction_address cia = CPU_PC_GET (cpu);
  74. sd->isa_mode = ISA_MODE_MIPS32;
  75. while (1)
  76. {
  77. micromips32_instruction_address nia;
  78. /* Allow us to switch back from MIPS32 to microMIPS
  79. This covers two cases:
  80. 1. Setting the correct isa mode based on the start address
  81. from the elf header.
  82. 2. Setting the correct isa mode after a MIPS32 jump or branch
  83. instruction. */
  84. if ((sd->isa_mode == ISA_MODE_MIPS32)
  85. && ((cia & 0x1) == ISA_MODE_MICROMIPS))
  86. {
  87. sd->isa_mode = ISA_MODE_MICROMIPS;
  88. cia = cia & ~0x1;
  89. }
  90. #if defined (ENGINE_ISSUE_PREFIX_HOOK)
  91. ENGINE_ISSUE_PREFIX_HOOK ();
  92. #endif
  93. switch (sd->isa_mode)
  94. {
  95. case ISA_MODE_MICROMIPS:
  96. nia =
  97. micromips_instruction_decode (sd, cpu, cia,
  98. MICROMIPS_DELAYSLOT_SIZE_ANY);
  99. break;
  100. case ISA_MODE_MIPS32:
  101. instruction_0 = IMEM32 (cia);
  102. nia = micromips_m32_idecode_issue (sd, instruction_0, cia);
  103. break;
  104. default:
  105. nia = NULL_CIA;
  106. }
  107. #if defined (ENGINE_ISSUE_POSTFIX_HOOK)
  108. ENGINE_ISSUE_POSTFIX_HOOK ();
  109. #endif
  110. /* Update the instruction address */
  111. cia = nia;
  112. /* process any events */
  113. if (sim_events_tick (sd))
  114. {
  115. CPU_PC_SET (cpu, cia);
  116. sim_events_process (sd);
  117. cia = CPU_PC_GET (cpu);
  118. }
  119. }
  120. }