dv-bfin_nfc.c 6.2 KB

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  1. /* Blackfin NAND Flash Memory Controller (NFC) model
  2. Copyright (C) 2010-2015 Free Software Foundation, Inc.
  3. Contributed by Analog Devices, Inc.
  4. This file is part of simulators.
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 3 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  15. #include "config.h"
  16. #include "sim-main.h"
  17. #include "devices.h"
  18. #include "dv-bfin_nfc.h"
  19. /* XXX: This is merely a stub. */
  20. struct bfin_nfc
  21. {
  22. /* This top portion matches common dv_bfin struct. */
  23. bu32 base;
  24. struct hw *dma_master;
  25. bool acked;
  26. struct hw_event *handler;
  27. char saved_byte;
  28. int saved_count;
  29. /* Order after here is important -- matches hardware MMR layout. */
  30. bu16 BFIN_MMR_16(ctl);
  31. bu16 BFIN_MMR_16(stat);
  32. bu16 BFIN_MMR_16(irqstat);
  33. bu16 BFIN_MMR_16(irqmask);
  34. bu16 BFIN_MMR_16(ecc0);
  35. bu16 BFIN_MMR_16(ecc1);
  36. bu16 BFIN_MMR_16(ecc2);
  37. bu16 BFIN_MMR_16(ecc3);
  38. bu16 BFIN_MMR_16(count);
  39. bu16 BFIN_MMR_16(rst);
  40. bu16 BFIN_MMR_16(pgctl);
  41. bu16 BFIN_MMR_16(read);
  42. bu32 _pad0[4];
  43. bu16 BFIN_MMR_16(addr);
  44. bu16 BFIN_MMR_16(cmd);
  45. bu16 BFIN_MMR_16(data_wr);
  46. bu16 BFIN_MMR_16(data_rd);
  47. };
  48. #define mmr_base() offsetof(struct bfin_nfc, ctl)
  49. #define mmr_offset(mmr) (offsetof(struct bfin_nfc, mmr) - mmr_base())
  50. #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
  51. static const char * const mmr_names[] =
  52. {
  53. "NFC_CTL", "NFC_STAT", "NFC_IRQSTAT", "NFC_IRQMASK", "NFC_ECC0", "NFC_ECC1",
  54. "NFC_ECC2", "NFC_ECC3", "NFC_COUNT", "NFC_RST", "NFC_PGCTL", "NFC_READ",
  55. [mmr_idx (addr)] = "NFC_ADDR", "NFC_CMD", "NFC_DATA_WR", "NFC_DATA_RD",
  56. };
  57. #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
  58. static unsigned
  59. bfin_nfc_io_write_buffer (struct hw *me, const void *source, int space,
  60. address_word addr, unsigned nr_bytes)
  61. {
  62. struct bfin_nfc *nfc = hw_data (me);
  63. bu32 mmr_off;
  64. bu32 value;
  65. bu16 *valuep;
  66. value = dv_load_2 (source);
  67. mmr_off = addr - nfc->base;
  68. valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);
  69. HW_TRACE_WRITE ();
  70. dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
  71. switch (mmr_off)
  72. {
  73. case mmr_offset(ctl):
  74. case mmr_offset(stat):
  75. case mmr_offset(irqmask):
  76. case mmr_offset(ecc0):
  77. case mmr_offset(ecc1):
  78. case mmr_offset(ecc2):
  79. case mmr_offset(ecc3):
  80. case mmr_offset(count):
  81. case mmr_offset(rst):
  82. case mmr_offset(pgctl):
  83. case mmr_offset(read):
  84. case mmr_offset(addr):
  85. case mmr_offset(cmd):
  86. case mmr_offset(data_wr):
  87. *valuep = value;
  88. break;
  89. case mmr_offset(data_rd):
  90. nfc->irqstat |= RD_RDY;
  91. *valuep = value;
  92. break;
  93. case mmr_offset(irqstat):
  94. dv_w1c_2 (valuep, value, -1);
  95. break;
  96. default:
  97. dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
  98. break;
  99. }
  100. return nr_bytes;
  101. }
  102. static unsigned
  103. bfin_nfc_io_read_buffer (struct hw *me, void *dest, int space,
  104. address_word addr, unsigned nr_bytes)
  105. {
  106. struct bfin_nfc *nfc = hw_data (me);
  107. bu32 mmr_off;
  108. bu16 *valuep;
  109. mmr_off = addr - nfc->base;
  110. valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);
  111. HW_TRACE_READ ();
  112. dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
  113. switch (mmr_off)
  114. {
  115. case mmr_offset(ctl):
  116. case mmr_offset(stat):
  117. case mmr_offset(irqstat):
  118. case mmr_offset(irqmask):
  119. case mmr_offset(ecc0):
  120. case mmr_offset(ecc1):
  121. case mmr_offset(ecc2):
  122. case mmr_offset(ecc3):
  123. case mmr_offset(count):
  124. case mmr_offset(rst):
  125. case mmr_offset(read):
  126. dv_store_2 (dest, *valuep);
  127. break;
  128. case mmr_offset(pgctl):
  129. case mmr_offset(addr):
  130. case mmr_offset(cmd):
  131. case mmr_offset(data_wr):
  132. case mmr_offset(data_rd):
  133. /* These regs are write only. */
  134. default:
  135. dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
  136. break;
  137. }
  138. return nr_bytes;
  139. }
  140. static unsigned
  141. bfin_nfc_dma_read_buffer (struct hw *me, void *dest, int space,
  142. unsigned_word addr, unsigned nr_bytes)
  143. {
  144. HW_TRACE_DMA_READ ();
  145. return 0;
  146. }
  147. static unsigned
  148. bfin_nfc_dma_write_buffer (struct hw *me, const void *source,
  149. int space, unsigned_word addr,
  150. unsigned nr_bytes,
  151. int violate_read_only_section)
  152. {
  153. HW_TRACE_DMA_WRITE ();
  154. return nr_bytes;
  155. }
  156. static const struct hw_port_descriptor bfin_nfc_ports[] =
  157. {
  158. { "stat", 0, 0, output_port, },
  159. { NULL, 0, 0, 0, },
  160. };
  161. static void
  162. attach_bfin_nfc_regs (struct hw *me, struct bfin_nfc *nfc)
  163. {
  164. address_word attach_address;
  165. int attach_space;
  166. unsigned attach_size;
  167. reg_property_spec reg;
  168. if (hw_find_property (me, "reg") == NULL)
  169. hw_abort (me, "Missing \"reg\" property");
  170. if (!hw_find_reg_array_property (me, "reg", 0, &reg))
  171. hw_abort (me, "\"reg\" property must contain three addr/size entries");
  172. hw_unit_address_to_attach_address (hw_parent (me),
  173. &reg.address,
  174. &attach_space, &attach_address, me);
  175. hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
  176. if (attach_size != BFIN_MMR_NFC_SIZE)
  177. hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_NFC_SIZE);
  178. hw_attach_address (hw_parent (me),
  179. 0, attach_space, attach_address, attach_size, me);
  180. nfc->base = attach_address;
  181. }
  182. static void
  183. bfin_nfc_finish (struct hw *me)
  184. {
  185. struct bfin_nfc *nfc;
  186. nfc = HW_ZALLOC (me, struct bfin_nfc);
  187. set_hw_data (me, nfc);
  188. set_hw_io_read_buffer (me, bfin_nfc_io_read_buffer);
  189. set_hw_io_write_buffer (me, bfin_nfc_io_write_buffer);
  190. set_hw_dma_read_buffer (me, bfin_nfc_dma_read_buffer);
  191. set_hw_dma_write_buffer (me, bfin_nfc_dma_write_buffer);
  192. set_hw_ports (me, bfin_nfc_ports);
  193. attach_bfin_nfc_regs (me, nfc);
  194. /* Initialize the NFC. */
  195. nfc->ctl = 0x0200;
  196. nfc->stat = 0x0011;
  197. nfc->irqstat = 0x0004;
  198. nfc->irqmask = 0x001F;
  199. }
  200. const struct hw_descriptor dv_bfin_nfc_descriptor[] =
  201. {
  202. {"bfin_nfc", bfin_nfc_finish,},
  203. {NULL, NULL},
  204. };