dv-bfin_jtag.c 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160
  1. /* Blackfin JTAG model.
  2. Copyright (C) 2010-2015 Free Software Foundation, Inc.
  3. Contributed by Analog Devices, Inc.
  4. This file is part of simulators.
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 3 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  15. #include "config.h"
  16. #include "sim-main.h"
  17. #include "devices.h"
  18. #include "dv-bfin_jtag.h"
  19. /* XXX: This is mostly a stub. There are more registers, but they're only
  20. accessible via the JTAG scan chain and not the MMR interface. */
  21. struct bfin_jtag
  22. {
  23. bu32 base;
  24. /* Order after here is important -- matches hardware MMR layout. */
  25. bu32 dspid;
  26. bu32 _pad0;
  27. bu32 dbgstat;
  28. };
  29. #define mmr_base() offsetof(struct bfin_jtag, dspid)
  30. #define mmr_offset(mmr) (offsetof(struct bfin_jtag, mmr) - mmr_base())
  31. static const char * const mmr_names[] =
  32. {
  33. "DSPID", NULL, "DBGSTAT",
  34. };
  35. #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
  36. static unsigned
  37. bfin_jtag_io_write_buffer (struct hw *me, const void *source, int space,
  38. address_word addr, unsigned nr_bytes)
  39. {
  40. struct bfin_jtag *jtag = hw_data (me);
  41. bu32 mmr_off;
  42. bu32 value;
  43. bu32 *valuep;
  44. value = dv_load_4 (source);
  45. mmr_off = addr - jtag->base;
  46. valuep = (void *)((unsigned long)jtag + mmr_base() + mmr_off);
  47. HW_TRACE_WRITE ();
  48. switch (mmr_off)
  49. {
  50. case mmr_offset(dbgstat):
  51. dv_w1c_4 (valuep, value, 0xc);
  52. break;
  53. case mmr_offset(dspid):
  54. /* Discard writes to these. */
  55. break;
  56. default:
  57. dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
  58. break;
  59. }
  60. return nr_bytes;
  61. }
  62. static unsigned
  63. bfin_jtag_io_read_buffer (struct hw *me, void *dest, int space,
  64. address_word addr, unsigned nr_bytes)
  65. {
  66. struct bfin_jtag *jtag = hw_data (me);
  67. bu32 mmr_off;
  68. bu32 value;
  69. bu32 *valuep;
  70. mmr_off = addr - jtag->base;
  71. valuep = (void *)((unsigned long)jtag + mmr_base() + mmr_off);
  72. HW_TRACE_READ ();
  73. switch (mmr_off)
  74. {
  75. case mmr_offset(dbgstat):
  76. case mmr_offset(dspid):
  77. value = *valuep;
  78. break;
  79. default:
  80. while (1) /* Core MMRs -> exception -> doesn't return. */
  81. dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
  82. break;
  83. }
  84. dv_store_4 (dest, value);
  85. return nr_bytes;
  86. }
  87. static void
  88. attach_bfin_jtag_regs (struct hw *me, struct bfin_jtag *jtag)
  89. {
  90. address_word attach_address;
  91. int attach_space;
  92. unsigned attach_size;
  93. reg_property_spec reg;
  94. if (hw_find_property (me, "reg") == NULL)
  95. hw_abort (me, "Missing \"reg\" property");
  96. if (!hw_find_reg_array_property (me, "reg", 0, &reg))
  97. hw_abort (me, "\"reg\" property must contain three addr/size entries");
  98. hw_unit_address_to_attach_address (hw_parent (me),
  99. &reg.address,
  100. &attach_space, &attach_address, me);
  101. hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
  102. if (attach_size != BFIN_COREMMR_JTAG_SIZE)
  103. hw_abort (me, "\"reg\" size must be %#x", BFIN_COREMMR_JTAG_SIZE);
  104. hw_attach_address (hw_parent (me),
  105. 0, attach_space, attach_address, attach_size, me);
  106. jtag->base = attach_address;
  107. }
  108. static void
  109. bfin_jtag_finish (struct hw *me)
  110. {
  111. struct bfin_jtag *jtag;
  112. jtag = HW_ZALLOC (me, struct bfin_jtag);
  113. set_hw_data (me, jtag);
  114. set_hw_io_read_buffer (me, bfin_jtag_io_read_buffer);
  115. set_hw_io_write_buffer (me, bfin_jtag_io_write_buffer);
  116. attach_bfin_jtag_regs (me, jtag);
  117. /* Initialize the JTAG state. */
  118. jtag->dspid = bfin_model_get_dspid (hw_system (me));
  119. }
  120. const struct hw_descriptor dv_bfin_jtag_descriptor[] =
  121. {
  122. {"bfin_jtag", bfin_jtag_finish,},
  123. {NULL, NULL},
  124. };