xstormy16-ibld.c 36 KB

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  1. /* Instruction building/extraction support for xstormy16. -*- C -*-
  2. THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
  3. - the resultant file is machine generated, cgen-ibld.in isn't
  4. Copyright (C) 1996-2015 Free Software Foundation, Inc.
  5. This file is part of libopcodes.
  6. This library is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 3, or (at your option)
  9. any later version.
  10. It is distributed in the hope that it will be useful, but WITHOUT
  11. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  13. License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software Foundation, Inc.,
  16. 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
  17. /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  18. Keep that in mind. */
  19. #include "sysdep.h"
  20. #include <stdio.h>
  21. #include "ansidecl.h"
  22. #include "dis-asm.h"
  23. #include "bfd.h"
  24. #include "symcat.h"
  25. #include "xstormy16-desc.h"
  26. #include "xstormy16-opc.h"
  27. #include "cgen/basic-modes.h"
  28. #include "opintl.h"
  29. #include "safe-ctype.h"
  30. #undef min
  31. #define min(a,b) ((a) < (b) ? (a) : (b))
  32. #undef max
  33. #define max(a,b) ((a) > (b) ? (a) : (b))
  34. /* Used by the ifield rtx function. */
  35. #define FLD(f) (fields->f)
  36. static const char * insert_normal
  37. (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
  38. unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
  39. static const char * insert_insn_normal
  40. (CGEN_CPU_DESC, const CGEN_INSN *,
  41. CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
  42. static int extract_normal
  43. (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
  44. unsigned int, unsigned int, unsigned int, unsigned int,
  45. unsigned int, unsigned int, bfd_vma, long *);
  46. static int extract_insn_normal
  47. (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
  48. CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
  49. #if CGEN_INT_INSN_P
  50. static void put_insn_int_value
  51. (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
  52. #endif
  53. #if ! CGEN_INT_INSN_P
  54. static CGEN_INLINE void insert_1
  55. (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
  56. static CGEN_INLINE int fill_cache
  57. (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
  58. static CGEN_INLINE long extract_1
  59. (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
  60. #endif
  61. /* Operand insertion. */
  62. #if ! CGEN_INT_INSN_P
  63. /* Subroutine of insert_normal. */
  64. static CGEN_INLINE void
  65. insert_1 (CGEN_CPU_DESC cd,
  66. unsigned long value,
  67. int start,
  68. int length,
  69. int word_length,
  70. unsigned char *bufp)
  71. {
  72. unsigned long x,mask;
  73. int shift;
  74. x = cgen_get_insn_value (cd, bufp, word_length);
  75. /* Written this way to avoid undefined behaviour. */
  76. mask = (((1L << (length - 1)) - 1) << 1) | 1;
  77. if (CGEN_INSN_LSB0_P)
  78. shift = (start + 1) - length;
  79. else
  80. shift = (word_length - (start + length));
  81. x = (x & ~(mask << shift)) | ((value & mask) << shift);
  82. cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
  83. }
  84. #endif /* ! CGEN_INT_INSN_P */
  85. /* Default insertion routine.
  86. ATTRS is a mask of the boolean attributes.
  87. WORD_OFFSET is the offset in bits from the start of the insn of the value.
  88. WORD_LENGTH is the length of the word in bits in which the value resides.
  89. START is the starting bit number in the word, architecture origin.
  90. LENGTH is the length of VALUE in bits.
  91. TOTAL_LENGTH is the total length of the insn in bits.
  92. The result is an error message or NULL if success. */
  93. /* ??? This duplicates functionality with bfd's howto table and
  94. bfd_install_relocation. */
  95. /* ??? This doesn't handle bfd_vma's. Create another function when
  96. necessary. */
  97. static const char *
  98. insert_normal (CGEN_CPU_DESC cd,
  99. long value,
  100. unsigned int attrs,
  101. unsigned int word_offset,
  102. unsigned int start,
  103. unsigned int length,
  104. unsigned int word_length,
  105. unsigned int total_length,
  106. CGEN_INSN_BYTES_PTR buffer)
  107. {
  108. static char errbuf[100];
  109. /* Written this way to avoid undefined behaviour. */
  110. unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
  111. /* If LENGTH is zero, this operand doesn't contribute to the value. */
  112. if (length == 0)
  113. return NULL;
  114. if (word_length > 8 * sizeof (CGEN_INSN_INT))
  115. abort ();
  116. /* For architectures with insns smaller than the base-insn-bitsize,
  117. word_length may be too big. */
  118. if (cd->min_insn_bitsize < cd->base_insn_bitsize)
  119. {
  120. if (word_offset == 0
  121. && word_length > total_length)
  122. word_length = total_length;
  123. }
  124. /* Ensure VALUE will fit. */
  125. if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
  126. {
  127. long minval = - (1L << (length - 1));
  128. unsigned long maxval = mask;
  129. if ((value > 0 && (unsigned long) value > maxval)
  130. || value < minval)
  131. {
  132. /* xgettext:c-format */
  133. sprintf (errbuf,
  134. _("operand out of range (%ld not between %ld and %lu)"),
  135. value, minval, maxval);
  136. return errbuf;
  137. }
  138. }
  139. else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
  140. {
  141. unsigned long maxval = mask;
  142. unsigned long val = (unsigned long) value;
  143. /* For hosts with a word size > 32 check to see if value has been sign
  144. extended beyond 32 bits. If so then ignore these higher sign bits
  145. as the user is attempting to store a 32-bit signed value into an
  146. unsigned 32-bit field which is allowed. */
  147. if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
  148. val &= 0xFFFFFFFF;
  149. if (val > maxval)
  150. {
  151. /* xgettext:c-format */
  152. sprintf (errbuf,
  153. _("operand out of range (0x%lx not between 0 and 0x%lx)"),
  154. val, maxval);
  155. return errbuf;
  156. }
  157. }
  158. else
  159. {
  160. if (! cgen_signed_overflow_ok_p (cd))
  161. {
  162. long minval = - (1L << (length - 1));
  163. long maxval = (1L << (length - 1)) - 1;
  164. if (value < minval || value > maxval)
  165. {
  166. sprintf
  167. /* xgettext:c-format */
  168. (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
  169. value, minval, maxval);
  170. return errbuf;
  171. }
  172. }
  173. }
  174. #if CGEN_INT_INSN_P
  175. {
  176. int shift;
  177. if (CGEN_INSN_LSB0_P)
  178. shift = (word_offset + start + 1) - length;
  179. else
  180. shift = total_length - (word_offset + start + length);
  181. *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
  182. }
  183. #else /* ! CGEN_INT_INSN_P */
  184. {
  185. unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
  186. insert_1 (cd, value, start, length, word_length, bufp);
  187. }
  188. #endif /* ! CGEN_INT_INSN_P */
  189. return NULL;
  190. }
  191. /* Default insn builder (insert handler).
  192. The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
  193. that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
  194. recorded in host byte order, otherwise BUFFER is an array of bytes
  195. and the value is recorded in target byte order).
  196. The result is an error message or NULL if success. */
  197. static const char *
  198. insert_insn_normal (CGEN_CPU_DESC cd,
  199. const CGEN_INSN * insn,
  200. CGEN_FIELDS * fields,
  201. CGEN_INSN_BYTES_PTR buffer,
  202. bfd_vma pc)
  203. {
  204. const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
  205. unsigned long value;
  206. const CGEN_SYNTAX_CHAR_TYPE * syn;
  207. CGEN_INIT_INSERT (cd);
  208. value = CGEN_INSN_BASE_VALUE (insn);
  209. /* If we're recording insns as numbers (rather than a string of bytes),
  210. target byte order handling is deferred until later. */
  211. #if CGEN_INT_INSN_P
  212. put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
  213. CGEN_FIELDS_BITSIZE (fields), value);
  214. #else
  215. cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
  216. (unsigned) CGEN_FIELDS_BITSIZE (fields)),
  217. value);
  218. #endif /* ! CGEN_INT_INSN_P */
  219. /* ??? It would be better to scan the format's fields.
  220. Still need to be able to insert a value based on the operand though;
  221. e.g. storing a branch displacement that got resolved later.
  222. Needs more thought first. */
  223. for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
  224. {
  225. const char *errmsg;
  226. if (CGEN_SYNTAX_CHAR_P (* syn))
  227. continue;
  228. errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
  229. fields, buffer, pc);
  230. if (errmsg)
  231. return errmsg;
  232. }
  233. return NULL;
  234. }
  235. #if CGEN_INT_INSN_P
  236. /* Cover function to store an insn value into an integral insn. Must go here
  237. because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
  238. static void
  239. put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  240. CGEN_INSN_BYTES_PTR buf,
  241. int length,
  242. int insn_length,
  243. CGEN_INSN_INT value)
  244. {
  245. /* For architectures with insns smaller than the base-insn-bitsize,
  246. length may be too big. */
  247. if (length > insn_length)
  248. *buf = value;
  249. else
  250. {
  251. int shift = insn_length - length;
  252. /* Written this way to avoid undefined behaviour. */
  253. CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
  254. *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
  255. }
  256. }
  257. #endif
  258. /* Operand extraction. */
  259. #if ! CGEN_INT_INSN_P
  260. /* Subroutine of extract_normal.
  261. Ensure sufficient bytes are cached in EX_INFO.
  262. OFFSET is the offset in bytes from the start of the insn of the value.
  263. BYTES is the length of the needed value.
  264. Returns 1 for success, 0 for failure. */
  265. static CGEN_INLINE int
  266. fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  267. CGEN_EXTRACT_INFO *ex_info,
  268. int offset,
  269. int bytes,
  270. bfd_vma pc)
  271. {
  272. /* It's doubtful that the middle part has already been fetched so
  273. we don't optimize that case. kiss. */
  274. unsigned int mask;
  275. disassemble_info *info = (disassemble_info *) ex_info->dis_info;
  276. /* First do a quick check. */
  277. mask = (1 << bytes) - 1;
  278. if (((ex_info->valid >> offset) & mask) == mask)
  279. return 1;
  280. /* Search for the first byte we need to read. */
  281. for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
  282. if (! (mask & ex_info->valid))
  283. break;
  284. if (bytes)
  285. {
  286. int status;
  287. pc += offset;
  288. status = (*info->read_memory_func)
  289. (pc, ex_info->insn_bytes + offset, bytes, info);
  290. if (status != 0)
  291. {
  292. (*info->memory_error_func) (status, pc, info);
  293. return 0;
  294. }
  295. ex_info->valid |= ((1 << bytes) - 1) << offset;
  296. }
  297. return 1;
  298. }
  299. /* Subroutine of extract_normal. */
  300. static CGEN_INLINE long
  301. extract_1 (CGEN_CPU_DESC cd,
  302. CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
  303. int start,
  304. int length,
  305. int word_length,
  306. unsigned char *bufp,
  307. bfd_vma pc ATTRIBUTE_UNUSED)
  308. {
  309. unsigned long x;
  310. int shift;
  311. x = cgen_get_insn_value (cd, bufp, word_length);
  312. if (CGEN_INSN_LSB0_P)
  313. shift = (start + 1) - length;
  314. else
  315. shift = (word_length - (start + length));
  316. return x >> shift;
  317. }
  318. #endif /* ! CGEN_INT_INSN_P */
  319. /* Default extraction routine.
  320. INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
  321. or sometimes less for cases like the m32r where the base insn size is 32
  322. but some insns are 16 bits.
  323. ATTRS is a mask of the boolean attributes. We only need `SIGNED',
  324. but for generality we take a bitmask of all of them.
  325. WORD_OFFSET is the offset in bits from the start of the insn of the value.
  326. WORD_LENGTH is the length of the word in bits in which the value resides.
  327. START is the starting bit number in the word, architecture origin.
  328. LENGTH is the length of VALUE in bits.
  329. TOTAL_LENGTH is the total length of the insn in bits.
  330. Returns 1 for success, 0 for failure. */
  331. /* ??? The return code isn't properly used. wip. */
  332. /* ??? This doesn't handle bfd_vma's. Create another function when
  333. necessary. */
  334. static int
  335. extract_normal (CGEN_CPU_DESC cd,
  336. #if ! CGEN_INT_INSN_P
  337. CGEN_EXTRACT_INFO *ex_info,
  338. #else
  339. CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
  340. #endif
  341. CGEN_INSN_INT insn_value,
  342. unsigned int attrs,
  343. unsigned int word_offset,
  344. unsigned int start,
  345. unsigned int length,
  346. unsigned int word_length,
  347. unsigned int total_length,
  348. #if ! CGEN_INT_INSN_P
  349. bfd_vma pc,
  350. #else
  351. bfd_vma pc ATTRIBUTE_UNUSED,
  352. #endif
  353. long *valuep)
  354. {
  355. long value, mask;
  356. /* If LENGTH is zero, this operand doesn't contribute to the value
  357. so give it a standard value of zero. */
  358. if (length == 0)
  359. {
  360. *valuep = 0;
  361. return 1;
  362. }
  363. if (word_length > 8 * sizeof (CGEN_INSN_INT))
  364. abort ();
  365. /* For architectures with insns smaller than the insn-base-bitsize,
  366. word_length may be too big. */
  367. if (cd->min_insn_bitsize < cd->base_insn_bitsize)
  368. {
  369. if (word_offset + word_length > total_length)
  370. word_length = total_length - word_offset;
  371. }
  372. /* Does the value reside in INSN_VALUE, and at the right alignment? */
  373. if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
  374. {
  375. if (CGEN_INSN_LSB0_P)
  376. value = insn_value >> ((word_offset + start + 1) - length);
  377. else
  378. value = insn_value >> (total_length - ( word_offset + start + length));
  379. }
  380. #if ! CGEN_INT_INSN_P
  381. else
  382. {
  383. unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
  384. if (word_length > 8 * sizeof (CGEN_INSN_INT))
  385. abort ();
  386. if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
  387. return 0;
  388. value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
  389. }
  390. #endif /* ! CGEN_INT_INSN_P */
  391. /* Written this way to avoid undefined behaviour. */
  392. mask = (((1L << (length - 1)) - 1) << 1) | 1;
  393. value &= mask;
  394. /* sign extend? */
  395. if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
  396. && (value & (1L << (length - 1))))
  397. value |= ~mask;
  398. *valuep = value;
  399. return 1;
  400. }
  401. /* Default insn extractor.
  402. INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
  403. The extracted fields are stored in FIELDS.
  404. EX_INFO is used to handle reading variable length insns.
  405. Return the length of the insn in bits, or 0 if no match,
  406. or -1 if an error occurs fetching data (memory_error_func will have
  407. been called). */
  408. static int
  409. extract_insn_normal (CGEN_CPU_DESC cd,
  410. const CGEN_INSN *insn,
  411. CGEN_EXTRACT_INFO *ex_info,
  412. CGEN_INSN_INT insn_value,
  413. CGEN_FIELDS *fields,
  414. bfd_vma pc)
  415. {
  416. const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
  417. const CGEN_SYNTAX_CHAR_TYPE *syn;
  418. CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
  419. CGEN_INIT_EXTRACT (cd);
  420. for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
  421. {
  422. int length;
  423. if (CGEN_SYNTAX_CHAR_P (*syn))
  424. continue;
  425. length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
  426. ex_info, insn_value, fields, pc);
  427. if (length <= 0)
  428. return length;
  429. }
  430. /* We recognized and successfully extracted this insn. */
  431. return CGEN_INSN_BITSIZE (insn);
  432. }
  433. /* Machine generated code added here. */
  434. const char * xstormy16_cgen_insert_operand
  435. (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
  436. /* Main entry point for operand insertion.
  437. This function is basically just a big switch statement. Earlier versions
  438. used tables to look up the function to use, but
  439. - if the table contains both assembler and disassembler functions then
  440. the disassembler contains much of the assembler and vice-versa,
  441. - there's a lot of inlining possibilities as things grow,
  442. - using a switch statement avoids the function call overhead.
  443. This function could be moved into `parse_insn_normal', but keeping it
  444. separate makes clear the interface between `parse_insn_normal' and each of
  445. the handlers. It's also needed by GAS to insert operands that couldn't be
  446. resolved during parsing. */
  447. const char *
  448. xstormy16_cgen_insert_operand (CGEN_CPU_DESC cd,
  449. int opindex,
  450. CGEN_FIELDS * fields,
  451. CGEN_INSN_BYTES_PTR buffer,
  452. bfd_vma pc ATTRIBUTE_UNUSED)
  453. {
  454. const char * errmsg = NULL;
  455. unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
  456. switch (opindex)
  457. {
  458. case XSTORMY16_OPERAND_RB :
  459. errmsg = insert_normal (cd, fields->f_Rb, 0, 0, 17, 3, 32, total_length, buffer);
  460. break;
  461. case XSTORMY16_OPERAND_RBJ :
  462. errmsg = insert_normal (cd, fields->f_Rbj, 0, 0, 11, 1, 32, total_length, buffer);
  463. break;
  464. case XSTORMY16_OPERAND_RD :
  465. errmsg = insert_normal (cd, fields->f_Rd, 0, 0, 12, 4, 32, total_length, buffer);
  466. break;
  467. case XSTORMY16_OPERAND_RDM :
  468. errmsg = insert_normal (cd, fields->f_Rdm, 0, 0, 13, 3, 32, total_length, buffer);
  469. break;
  470. case XSTORMY16_OPERAND_RM :
  471. errmsg = insert_normal (cd, fields->f_Rm, 0, 0, 4, 3, 32, total_length, buffer);
  472. break;
  473. case XSTORMY16_OPERAND_RS :
  474. errmsg = insert_normal (cd, fields->f_Rs, 0, 0, 8, 4, 32, total_length, buffer);
  475. break;
  476. case XSTORMY16_OPERAND_ABS24 :
  477. {
  478. {
  479. FLD (f_abs24_1) = ((FLD (f_abs24)) & (255));
  480. FLD (f_abs24_2) = ((UINT) (FLD (f_abs24)) >> (8));
  481. }
  482. errmsg = insert_normal (cd, fields->f_abs24_1, 0, 0, 8, 8, 32, total_length, buffer);
  483. if (errmsg)
  484. break;
  485. errmsg = insert_normal (cd, fields->f_abs24_2, 0, 0, 16, 16, 32, total_length, buffer);
  486. if (errmsg)
  487. break;
  488. }
  489. break;
  490. case XSTORMY16_OPERAND_BCOND2 :
  491. errmsg = insert_normal (cd, fields->f_op2, 0, 0, 4, 4, 32, total_length, buffer);
  492. break;
  493. case XSTORMY16_OPERAND_BCOND5 :
  494. errmsg = insert_normal (cd, fields->f_op5, 0, 0, 16, 4, 32, total_length, buffer);
  495. break;
  496. case XSTORMY16_OPERAND_HMEM8 :
  497. {
  498. long value = fields->f_hmem8;
  499. value = ((value) - (32512));
  500. errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, buffer);
  501. }
  502. break;
  503. case XSTORMY16_OPERAND_IMM12 :
  504. errmsg = insert_normal (cd, fields->f_imm12, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, buffer);
  505. break;
  506. case XSTORMY16_OPERAND_IMM16 :
  507. errmsg = insert_normal (cd, fields->f_imm16, 0|(1<<CGEN_IFLD_SIGN_OPT), 0, 16, 16, 32, total_length, buffer);
  508. break;
  509. case XSTORMY16_OPERAND_IMM2 :
  510. errmsg = insert_normal (cd, fields->f_imm2, 0, 0, 10, 2, 32, total_length, buffer);
  511. break;
  512. case XSTORMY16_OPERAND_IMM3 :
  513. errmsg = insert_normal (cd, fields->f_imm3, 0, 0, 4, 3, 32, total_length, buffer);
  514. break;
  515. case XSTORMY16_OPERAND_IMM3B :
  516. errmsg = insert_normal (cd, fields->f_imm3b, 0, 0, 17, 3, 32, total_length, buffer);
  517. break;
  518. case XSTORMY16_OPERAND_IMM4 :
  519. errmsg = insert_normal (cd, fields->f_imm4, 0, 0, 8, 4, 32, total_length, buffer);
  520. break;
  521. case XSTORMY16_OPERAND_IMM8 :
  522. errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 8, 8, 32, total_length, buffer);
  523. break;
  524. case XSTORMY16_OPERAND_IMM8SMALL :
  525. errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 8, 8, 32, total_length, buffer);
  526. break;
  527. case XSTORMY16_OPERAND_LMEM8 :
  528. errmsg = insert_normal (cd, fields->f_lmem8, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, buffer);
  529. break;
  530. case XSTORMY16_OPERAND_REL12 :
  531. {
  532. long value = fields->f_rel12;
  533. value = ((value) - (((pc) + (4))));
  534. errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 20, 12, 32, total_length, buffer);
  535. }
  536. break;
  537. case XSTORMY16_OPERAND_REL12A :
  538. {
  539. long value = fields->f_rel12a;
  540. value = ((SI) (((value) - (((pc) + (2))))) >> (1));
  541. errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, buffer);
  542. }
  543. break;
  544. case XSTORMY16_OPERAND_REL8_2 :
  545. {
  546. long value = fields->f_rel8_2;
  547. value = ((value) - (((pc) + (2))));
  548. errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
  549. }
  550. break;
  551. case XSTORMY16_OPERAND_REL8_4 :
  552. {
  553. long value = fields->f_rel8_4;
  554. value = ((value) - (((pc) + (4))));
  555. errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
  556. }
  557. break;
  558. case XSTORMY16_OPERAND_WS2 :
  559. errmsg = insert_normal (cd, fields->f_op2m, 0, 0, 7, 1, 32, total_length, buffer);
  560. break;
  561. default :
  562. /* xgettext:c-format */
  563. fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
  564. opindex);
  565. abort ();
  566. }
  567. return errmsg;
  568. }
  569. int xstormy16_cgen_extract_operand
  570. (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
  571. /* Main entry point for operand extraction.
  572. The result is <= 0 for error, >0 for success.
  573. ??? Actual values aren't well defined right now.
  574. This function is basically just a big switch statement. Earlier versions
  575. used tables to look up the function to use, but
  576. - if the table contains both assembler and disassembler functions then
  577. the disassembler contains much of the assembler and vice-versa,
  578. - there's a lot of inlining possibilities as things grow,
  579. - using a switch statement avoids the function call overhead.
  580. This function could be moved into `print_insn_normal', but keeping it
  581. separate makes clear the interface between `print_insn_normal' and each of
  582. the handlers. */
  583. int
  584. xstormy16_cgen_extract_operand (CGEN_CPU_DESC cd,
  585. int opindex,
  586. CGEN_EXTRACT_INFO *ex_info,
  587. CGEN_INSN_INT insn_value,
  588. CGEN_FIELDS * fields,
  589. bfd_vma pc)
  590. {
  591. /* Assume success (for those operands that are nops). */
  592. int length = 1;
  593. unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
  594. switch (opindex)
  595. {
  596. case XSTORMY16_OPERAND_RB :
  597. length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 3, 32, total_length, pc, & fields->f_Rb);
  598. break;
  599. case XSTORMY16_OPERAND_RBJ :
  600. length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_Rbj);
  601. break;
  602. case XSTORMY16_OPERAND_RD :
  603. length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_Rd);
  604. break;
  605. case XSTORMY16_OPERAND_RDM :
  606. length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_Rdm);
  607. break;
  608. case XSTORMY16_OPERAND_RM :
  609. length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 3, 32, total_length, pc, & fields->f_Rm);
  610. break;
  611. case XSTORMY16_OPERAND_RS :
  612. length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_Rs);
  613. break;
  614. case XSTORMY16_OPERAND_ABS24 :
  615. {
  616. length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_abs24_1);
  617. if (length <= 0) break;
  618. length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_abs24_2);
  619. if (length <= 0) break;
  620. FLD (f_abs24) = ((((FLD (f_abs24_2)) << (8))) | (FLD (f_abs24_1)));
  621. }
  622. break;
  623. case XSTORMY16_OPERAND_BCOND2 :
  624. length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_op2);
  625. break;
  626. case XSTORMY16_OPERAND_BCOND5 :
  627. length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 4, 32, total_length, pc, & fields->f_op5);
  628. break;
  629. case XSTORMY16_OPERAND_HMEM8 :
  630. {
  631. long value;
  632. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, pc, & value);
  633. value = ((value) + (32512));
  634. fields->f_hmem8 = value;
  635. }
  636. break;
  637. case XSTORMY16_OPERAND_IMM12 :
  638. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, pc, & fields->f_imm12);
  639. break;
  640. case XSTORMY16_OPERAND_IMM16 :
  641. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 0, 16, 16, 32, total_length, pc, & fields->f_imm16);
  642. break;
  643. case XSTORMY16_OPERAND_IMM2 :
  644. length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_imm2);
  645. break;
  646. case XSTORMY16_OPERAND_IMM3 :
  647. length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 3, 32, total_length, pc, & fields->f_imm3);
  648. break;
  649. case XSTORMY16_OPERAND_IMM3B :
  650. length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 3, 32, total_length, pc, & fields->f_imm3b);
  651. break;
  652. case XSTORMY16_OPERAND_IMM4 :
  653. length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_imm4);
  654. break;
  655. case XSTORMY16_OPERAND_IMM8 :
  656. length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_imm8);
  657. break;
  658. case XSTORMY16_OPERAND_IMM8SMALL :
  659. length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_imm8);
  660. break;
  661. case XSTORMY16_OPERAND_LMEM8 :
  662. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, pc, & fields->f_lmem8);
  663. break;
  664. case XSTORMY16_OPERAND_REL12 :
  665. {
  666. long value;
  667. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 20, 12, 32, total_length, pc, & value);
  668. value = ((value) + (((pc) + (4))));
  669. fields->f_rel12 = value;
  670. }
  671. break;
  672. case XSTORMY16_OPERAND_REL12A :
  673. {
  674. long value;
  675. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value);
  676. value = ((((value) << (1))) + (((pc) + (2))));
  677. fields->f_rel12a = value;
  678. }
  679. break;
  680. case XSTORMY16_OPERAND_REL8_2 :
  681. {
  682. long value;
  683. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
  684. value = ((value) + (((pc) + (2))));
  685. fields->f_rel8_2 = value;
  686. }
  687. break;
  688. case XSTORMY16_OPERAND_REL8_4 :
  689. {
  690. long value;
  691. length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
  692. value = ((value) + (((pc) + (4))));
  693. fields->f_rel8_4 = value;
  694. }
  695. break;
  696. case XSTORMY16_OPERAND_WS2 :
  697. length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_op2m);
  698. break;
  699. default :
  700. /* xgettext:c-format */
  701. fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
  702. opindex);
  703. abort ();
  704. }
  705. return length;
  706. }
  707. cgen_insert_fn * const xstormy16_cgen_insert_handlers[] =
  708. {
  709. insert_insn_normal,
  710. };
  711. cgen_extract_fn * const xstormy16_cgen_extract_handlers[] =
  712. {
  713. extract_insn_normal,
  714. };
  715. int xstormy16_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
  716. bfd_vma xstormy16_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
  717. /* Getting values from cgen_fields is handled by a collection of functions.
  718. They are distinguished by the type of the VALUE argument they return.
  719. TODO: floating point, inlining support, remove cases where result type
  720. not appropriate. */
  721. int
  722. xstormy16_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  723. int opindex,
  724. const CGEN_FIELDS * fields)
  725. {
  726. int value;
  727. switch (opindex)
  728. {
  729. case XSTORMY16_OPERAND_RB :
  730. value = fields->f_Rb;
  731. break;
  732. case XSTORMY16_OPERAND_RBJ :
  733. value = fields->f_Rbj;
  734. break;
  735. case XSTORMY16_OPERAND_RD :
  736. value = fields->f_Rd;
  737. break;
  738. case XSTORMY16_OPERAND_RDM :
  739. value = fields->f_Rdm;
  740. break;
  741. case XSTORMY16_OPERAND_RM :
  742. value = fields->f_Rm;
  743. break;
  744. case XSTORMY16_OPERAND_RS :
  745. value = fields->f_Rs;
  746. break;
  747. case XSTORMY16_OPERAND_ABS24 :
  748. value = fields->f_abs24;
  749. break;
  750. case XSTORMY16_OPERAND_BCOND2 :
  751. value = fields->f_op2;
  752. break;
  753. case XSTORMY16_OPERAND_BCOND5 :
  754. value = fields->f_op5;
  755. break;
  756. case XSTORMY16_OPERAND_HMEM8 :
  757. value = fields->f_hmem8;
  758. break;
  759. case XSTORMY16_OPERAND_IMM12 :
  760. value = fields->f_imm12;
  761. break;
  762. case XSTORMY16_OPERAND_IMM16 :
  763. value = fields->f_imm16;
  764. break;
  765. case XSTORMY16_OPERAND_IMM2 :
  766. value = fields->f_imm2;
  767. break;
  768. case XSTORMY16_OPERAND_IMM3 :
  769. value = fields->f_imm3;
  770. break;
  771. case XSTORMY16_OPERAND_IMM3B :
  772. value = fields->f_imm3b;
  773. break;
  774. case XSTORMY16_OPERAND_IMM4 :
  775. value = fields->f_imm4;
  776. break;
  777. case XSTORMY16_OPERAND_IMM8 :
  778. value = fields->f_imm8;
  779. break;
  780. case XSTORMY16_OPERAND_IMM8SMALL :
  781. value = fields->f_imm8;
  782. break;
  783. case XSTORMY16_OPERAND_LMEM8 :
  784. value = fields->f_lmem8;
  785. break;
  786. case XSTORMY16_OPERAND_REL12 :
  787. value = fields->f_rel12;
  788. break;
  789. case XSTORMY16_OPERAND_REL12A :
  790. value = fields->f_rel12a;
  791. break;
  792. case XSTORMY16_OPERAND_REL8_2 :
  793. value = fields->f_rel8_2;
  794. break;
  795. case XSTORMY16_OPERAND_REL8_4 :
  796. value = fields->f_rel8_4;
  797. break;
  798. case XSTORMY16_OPERAND_WS2 :
  799. value = fields->f_op2m;
  800. break;
  801. default :
  802. /* xgettext:c-format */
  803. fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
  804. opindex);
  805. abort ();
  806. }
  807. return value;
  808. }
  809. bfd_vma
  810. xstormy16_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  811. int opindex,
  812. const CGEN_FIELDS * fields)
  813. {
  814. bfd_vma value;
  815. switch (opindex)
  816. {
  817. case XSTORMY16_OPERAND_RB :
  818. value = fields->f_Rb;
  819. break;
  820. case XSTORMY16_OPERAND_RBJ :
  821. value = fields->f_Rbj;
  822. break;
  823. case XSTORMY16_OPERAND_RD :
  824. value = fields->f_Rd;
  825. break;
  826. case XSTORMY16_OPERAND_RDM :
  827. value = fields->f_Rdm;
  828. break;
  829. case XSTORMY16_OPERAND_RM :
  830. value = fields->f_Rm;
  831. break;
  832. case XSTORMY16_OPERAND_RS :
  833. value = fields->f_Rs;
  834. break;
  835. case XSTORMY16_OPERAND_ABS24 :
  836. value = fields->f_abs24;
  837. break;
  838. case XSTORMY16_OPERAND_BCOND2 :
  839. value = fields->f_op2;
  840. break;
  841. case XSTORMY16_OPERAND_BCOND5 :
  842. value = fields->f_op5;
  843. break;
  844. case XSTORMY16_OPERAND_HMEM8 :
  845. value = fields->f_hmem8;
  846. break;
  847. case XSTORMY16_OPERAND_IMM12 :
  848. value = fields->f_imm12;
  849. break;
  850. case XSTORMY16_OPERAND_IMM16 :
  851. value = fields->f_imm16;
  852. break;
  853. case XSTORMY16_OPERAND_IMM2 :
  854. value = fields->f_imm2;
  855. break;
  856. case XSTORMY16_OPERAND_IMM3 :
  857. value = fields->f_imm3;
  858. break;
  859. case XSTORMY16_OPERAND_IMM3B :
  860. value = fields->f_imm3b;
  861. break;
  862. case XSTORMY16_OPERAND_IMM4 :
  863. value = fields->f_imm4;
  864. break;
  865. case XSTORMY16_OPERAND_IMM8 :
  866. value = fields->f_imm8;
  867. break;
  868. case XSTORMY16_OPERAND_IMM8SMALL :
  869. value = fields->f_imm8;
  870. break;
  871. case XSTORMY16_OPERAND_LMEM8 :
  872. value = fields->f_lmem8;
  873. break;
  874. case XSTORMY16_OPERAND_REL12 :
  875. value = fields->f_rel12;
  876. break;
  877. case XSTORMY16_OPERAND_REL12A :
  878. value = fields->f_rel12a;
  879. break;
  880. case XSTORMY16_OPERAND_REL8_2 :
  881. value = fields->f_rel8_2;
  882. break;
  883. case XSTORMY16_OPERAND_REL8_4 :
  884. value = fields->f_rel8_4;
  885. break;
  886. case XSTORMY16_OPERAND_WS2 :
  887. value = fields->f_op2m;
  888. break;
  889. default :
  890. /* xgettext:c-format */
  891. fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
  892. opindex);
  893. abort ();
  894. }
  895. return value;
  896. }
  897. void xstormy16_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
  898. void xstormy16_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
  899. /* Stuffing values in cgen_fields is handled by a collection of functions.
  900. They are distinguished by the type of the VALUE argument they accept.
  901. TODO: floating point, inlining support, remove cases where argument type
  902. not appropriate. */
  903. void
  904. xstormy16_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  905. int opindex,
  906. CGEN_FIELDS * fields,
  907. int value)
  908. {
  909. switch (opindex)
  910. {
  911. case XSTORMY16_OPERAND_RB :
  912. fields->f_Rb = value;
  913. break;
  914. case XSTORMY16_OPERAND_RBJ :
  915. fields->f_Rbj = value;
  916. break;
  917. case XSTORMY16_OPERAND_RD :
  918. fields->f_Rd = value;
  919. break;
  920. case XSTORMY16_OPERAND_RDM :
  921. fields->f_Rdm = value;
  922. break;
  923. case XSTORMY16_OPERAND_RM :
  924. fields->f_Rm = value;
  925. break;
  926. case XSTORMY16_OPERAND_RS :
  927. fields->f_Rs = value;
  928. break;
  929. case XSTORMY16_OPERAND_ABS24 :
  930. fields->f_abs24 = value;
  931. break;
  932. case XSTORMY16_OPERAND_BCOND2 :
  933. fields->f_op2 = value;
  934. break;
  935. case XSTORMY16_OPERAND_BCOND5 :
  936. fields->f_op5 = value;
  937. break;
  938. case XSTORMY16_OPERAND_HMEM8 :
  939. fields->f_hmem8 = value;
  940. break;
  941. case XSTORMY16_OPERAND_IMM12 :
  942. fields->f_imm12 = value;
  943. break;
  944. case XSTORMY16_OPERAND_IMM16 :
  945. fields->f_imm16 = value;
  946. break;
  947. case XSTORMY16_OPERAND_IMM2 :
  948. fields->f_imm2 = value;
  949. break;
  950. case XSTORMY16_OPERAND_IMM3 :
  951. fields->f_imm3 = value;
  952. break;
  953. case XSTORMY16_OPERAND_IMM3B :
  954. fields->f_imm3b = value;
  955. break;
  956. case XSTORMY16_OPERAND_IMM4 :
  957. fields->f_imm4 = value;
  958. break;
  959. case XSTORMY16_OPERAND_IMM8 :
  960. fields->f_imm8 = value;
  961. break;
  962. case XSTORMY16_OPERAND_IMM8SMALL :
  963. fields->f_imm8 = value;
  964. break;
  965. case XSTORMY16_OPERAND_LMEM8 :
  966. fields->f_lmem8 = value;
  967. break;
  968. case XSTORMY16_OPERAND_REL12 :
  969. fields->f_rel12 = value;
  970. break;
  971. case XSTORMY16_OPERAND_REL12A :
  972. fields->f_rel12a = value;
  973. break;
  974. case XSTORMY16_OPERAND_REL8_2 :
  975. fields->f_rel8_2 = value;
  976. break;
  977. case XSTORMY16_OPERAND_REL8_4 :
  978. fields->f_rel8_4 = value;
  979. break;
  980. case XSTORMY16_OPERAND_WS2 :
  981. fields->f_op2m = value;
  982. break;
  983. default :
  984. /* xgettext:c-format */
  985. fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
  986. opindex);
  987. abort ();
  988. }
  989. }
  990. void
  991. xstormy16_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  992. int opindex,
  993. CGEN_FIELDS * fields,
  994. bfd_vma value)
  995. {
  996. switch (opindex)
  997. {
  998. case XSTORMY16_OPERAND_RB :
  999. fields->f_Rb = value;
  1000. break;
  1001. case XSTORMY16_OPERAND_RBJ :
  1002. fields->f_Rbj = value;
  1003. break;
  1004. case XSTORMY16_OPERAND_RD :
  1005. fields->f_Rd = value;
  1006. break;
  1007. case XSTORMY16_OPERAND_RDM :
  1008. fields->f_Rdm = value;
  1009. break;
  1010. case XSTORMY16_OPERAND_RM :
  1011. fields->f_Rm = value;
  1012. break;
  1013. case XSTORMY16_OPERAND_RS :
  1014. fields->f_Rs = value;
  1015. break;
  1016. case XSTORMY16_OPERAND_ABS24 :
  1017. fields->f_abs24 = value;
  1018. break;
  1019. case XSTORMY16_OPERAND_BCOND2 :
  1020. fields->f_op2 = value;
  1021. break;
  1022. case XSTORMY16_OPERAND_BCOND5 :
  1023. fields->f_op5 = value;
  1024. break;
  1025. case XSTORMY16_OPERAND_HMEM8 :
  1026. fields->f_hmem8 = value;
  1027. break;
  1028. case XSTORMY16_OPERAND_IMM12 :
  1029. fields->f_imm12 = value;
  1030. break;
  1031. case XSTORMY16_OPERAND_IMM16 :
  1032. fields->f_imm16 = value;
  1033. break;
  1034. case XSTORMY16_OPERAND_IMM2 :
  1035. fields->f_imm2 = value;
  1036. break;
  1037. case XSTORMY16_OPERAND_IMM3 :
  1038. fields->f_imm3 = value;
  1039. break;
  1040. case XSTORMY16_OPERAND_IMM3B :
  1041. fields->f_imm3b = value;
  1042. break;
  1043. case XSTORMY16_OPERAND_IMM4 :
  1044. fields->f_imm4 = value;
  1045. break;
  1046. case XSTORMY16_OPERAND_IMM8 :
  1047. fields->f_imm8 = value;
  1048. break;
  1049. case XSTORMY16_OPERAND_IMM8SMALL :
  1050. fields->f_imm8 = value;
  1051. break;
  1052. case XSTORMY16_OPERAND_LMEM8 :
  1053. fields->f_lmem8 = value;
  1054. break;
  1055. case XSTORMY16_OPERAND_REL12 :
  1056. fields->f_rel12 = value;
  1057. break;
  1058. case XSTORMY16_OPERAND_REL12A :
  1059. fields->f_rel12a = value;
  1060. break;
  1061. case XSTORMY16_OPERAND_REL8_2 :
  1062. fields->f_rel8_2 = value;
  1063. break;
  1064. case XSTORMY16_OPERAND_REL8_4 :
  1065. fields->f_rel8_4 = value;
  1066. break;
  1067. case XSTORMY16_OPERAND_WS2 :
  1068. fields->f_op2m = value;
  1069. break;
  1070. default :
  1071. /* xgettext:c-format */
  1072. fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
  1073. opindex);
  1074. abort ();
  1075. }
  1076. }
  1077. /* Function to call before using the instruction builder tables. */
  1078. void
  1079. xstormy16_cgen_init_ibld_table (CGEN_CPU_DESC cd)
  1080. {
  1081. cd->insert_handlers = & xstormy16_cgen_insert_handlers[0];
  1082. cd->extract_handlers = & xstormy16_cgen_extract_handlers[0];
  1083. cd->insert_operand = xstormy16_cgen_insert_operand;
  1084. cd->extract_operand = xstormy16_cgen_extract_operand;
  1085. cd->get_int_operand = xstormy16_cgen_get_int_operand;
  1086. cd->set_int_operand = xstormy16_cgen_set_int_operand;
  1087. cd->get_vma_operand = xstormy16_cgen_get_vma_operand;
  1088. cd->set_vma_operand = xstormy16_cgen_set_vma_operand;
  1089. }