elfxx-aarch64.c 20 KB

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  1. /* AArch64-specific support for ELF.
  2. Copyright (C) 2009-2015 Free Software Foundation, Inc.
  3. Contributed by ARM Ltd.
  4. This file is part of BFD, the Binary File Descriptor library.
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 3 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING3. If not,
  15. see <http://www.gnu.org/licenses/>. */
  16. #include "sysdep.h"
  17. #include "elfxx-aarch64.h"
  18. #include <stdarg.h>
  19. #include <string.h>
  20. #define MASK(n) ((1u << (n)) - 1)
  21. /* Sign-extend VALUE, which has the indicated number of BITS. */
  22. bfd_signed_vma
  23. _bfd_aarch64_sign_extend (bfd_vma value, int bits)
  24. {
  25. if (value & ((bfd_vma) 1 << (bits - 1)))
  26. /* VALUE is negative. */
  27. value |= ((bfd_vma) - 1) << bits;
  28. return value;
  29. }
  30. /* Decode the IMM field of ADRP. */
  31. uint32_t
  32. _bfd_aarch64_decode_adrp_imm (uint32_t insn)
  33. {
  34. return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
  35. }
  36. /* Reencode the imm field of add immediate. */
  37. static inline uint32_t
  38. reencode_add_imm (uint32_t insn, uint32_t imm)
  39. {
  40. return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
  41. }
  42. /* Reencode the IMM field of ADR. */
  43. uint32_t
  44. _bfd_aarch64_reencode_adr_imm (uint32_t insn, uint32_t imm)
  45. {
  46. return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
  47. | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
  48. }
  49. /* Reencode the imm field of ld/st pos immediate. */
  50. static inline uint32_t
  51. reencode_ldst_pos_imm (uint32_t insn, uint32_t imm)
  52. {
  53. return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
  54. }
  55. /* Encode the 26-bit offset of unconditional branch. */
  56. static inline uint32_t
  57. reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs)
  58. {
  59. return (insn & ~MASK (26)) | (ofs & MASK (26));
  60. }
  61. /* Encode the 19-bit offset of conditional branch and compare & branch. */
  62. static inline uint32_t
  63. reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs)
  64. {
  65. return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
  66. }
  67. /* Decode the 19-bit offset of load literal. */
  68. static inline uint32_t
  69. reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs)
  70. {
  71. return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
  72. }
  73. /* Encode the 14-bit offset of test & branch. */
  74. static inline uint32_t
  75. reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs)
  76. {
  77. return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5);
  78. }
  79. /* Reencode the imm field of move wide. */
  80. static inline uint32_t
  81. reencode_movw_imm (uint32_t insn, uint32_t imm)
  82. {
  83. return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5);
  84. }
  85. /* Reencode mov[zn] to movz. */
  86. static inline uint32_t
  87. reencode_movzn_to_movz (uint32_t opcode)
  88. {
  89. return opcode | (1 << 30);
  90. }
  91. /* Reencode mov[zn] to movn. */
  92. static inline uint32_t
  93. reencode_movzn_to_movn (uint32_t opcode)
  94. {
  95. return opcode & ~(1 << 30);
  96. }
  97. /* Return non-zero if the indicated VALUE has overflowed the maximum
  98. range expressible by a unsigned number with the indicated number of
  99. BITS. */
  100. static bfd_reloc_status_type
  101. aarch64_unsigned_overflow (bfd_vma value, unsigned int bits)
  102. {
  103. bfd_vma lim;
  104. if (bits >= sizeof (bfd_vma) * 8)
  105. return bfd_reloc_ok;
  106. lim = (bfd_vma) 1 << bits;
  107. if (value >= lim)
  108. return bfd_reloc_overflow;
  109. return bfd_reloc_ok;
  110. }
  111. /* Return non-zero if the indicated VALUE has overflowed the maximum
  112. range expressible by an signed number with the indicated number of
  113. BITS. */
  114. static bfd_reloc_status_type
  115. aarch64_signed_overflow (bfd_vma value, unsigned int bits)
  116. {
  117. bfd_signed_vma svalue = (bfd_signed_vma) value;
  118. bfd_signed_vma lim;
  119. if (bits >= sizeof (bfd_vma) * 8)
  120. return bfd_reloc_ok;
  121. lim = (bfd_signed_vma) 1 << (bits - 1);
  122. if (svalue < -lim || svalue >= lim)
  123. return bfd_reloc_overflow;
  124. return bfd_reloc_ok;
  125. }
  126. /* Insert the addend/value into the instruction or data object being
  127. relocated. */
  128. bfd_reloc_status_type
  129. _bfd_aarch64_elf_put_addend (bfd *abfd,
  130. bfd_byte *address, bfd_reloc_code_real_type r_type,
  131. reloc_howto_type *howto, bfd_signed_vma addend)
  132. {
  133. bfd_reloc_status_type status = bfd_reloc_ok;
  134. bfd_signed_vma old_addend = addend;
  135. bfd_vma contents;
  136. int size;
  137. size = bfd_get_reloc_size (howto);
  138. switch (size)
  139. {
  140. case 0:
  141. return status;
  142. case 2:
  143. contents = bfd_get_16 (abfd, address);
  144. break;
  145. case 4:
  146. if (howto->src_mask != 0xffffffff)
  147. /* Must be 32-bit instruction, always little-endian. */
  148. contents = bfd_getl32 (address);
  149. else
  150. /* Must be 32-bit data (endianness dependent). */
  151. contents = bfd_get_32 (abfd, address);
  152. break;
  153. case 8:
  154. contents = bfd_get_64 (abfd, address);
  155. break;
  156. default:
  157. abort ();
  158. }
  159. switch (howto->complain_on_overflow)
  160. {
  161. case complain_overflow_dont:
  162. break;
  163. case complain_overflow_signed:
  164. status = aarch64_signed_overflow (addend,
  165. howto->bitsize + howto->rightshift);
  166. break;
  167. case complain_overflow_unsigned:
  168. status = aarch64_unsigned_overflow (addend,
  169. howto->bitsize + howto->rightshift);
  170. break;
  171. case complain_overflow_bitfield:
  172. default:
  173. abort ();
  174. }
  175. addend >>= howto->rightshift;
  176. switch (r_type)
  177. {
  178. case BFD_RELOC_AARCH64_CALL26:
  179. case BFD_RELOC_AARCH64_JUMP26:
  180. contents = reencode_branch_ofs_26 (contents, addend);
  181. break;
  182. case BFD_RELOC_AARCH64_BRANCH19:
  183. contents = reencode_cond_branch_ofs_19 (contents, addend);
  184. break;
  185. case BFD_RELOC_AARCH64_TSTBR14:
  186. contents = reencode_tst_branch_ofs_14 (contents, addend);
  187. break;
  188. case BFD_RELOC_AARCH64_GOT_LD_PREL19:
  189. case BFD_RELOC_AARCH64_LD_LO19_PCREL:
  190. case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
  191. case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
  192. if (old_addend & ((1 << howto->rightshift) - 1))
  193. return bfd_reloc_overflow;
  194. contents = reencode_ld_lit_ofs_19 (contents, addend);
  195. break;
  196. case BFD_RELOC_AARCH64_TLSDESC_CALL:
  197. break;
  198. case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
  199. case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
  200. case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
  201. case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
  202. case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
  203. case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
  204. case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
  205. case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
  206. case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
  207. case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
  208. case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
  209. contents = _bfd_aarch64_reencode_adr_imm (contents, addend);
  210. break;
  211. case BFD_RELOC_AARCH64_ADD_LO12:
  212. case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
  213. case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
  214. case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
  215. case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
  216. case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
  217. case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
  218. case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
  219. case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
  220. case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
  221. /* Corresponds to: add rd, rn, #uimm12 to provide the low order
  222. 12 bits of the page offset following
  223. BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
  224. (pc-relative) page base. */
  225. contents = reencode_add_imm (contents, addend);
  226. break;
  227. case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
  228. case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
  229. case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
  230. case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
  231. case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
  232. case BFD_RELOC_AARCH64_LDST128_LO12:
  233. case BFD_RELOC_AARCH64_LDST16_LO12:
  234. case BFD_RELOC_AARCH64_LDST32_LO12:
  235. case BFD_RELOC_AARCH64_LDST64_LO12:
  236. case BFD_RELOC_AARCH64_LDST8_LO12:
  237. case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
  238. case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
  239. case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
  240. case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
  241. case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
  242. case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
  243. case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
  244. case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
  245. case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
  246. case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
  247. case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
  248. case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
  249. if (old_addend & ((1 << howto->rightshift) - 1))
  250. return bfd_reloc_overflow;
  251. /* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
  252. 12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
  253. which computes the (pc-relative) page base. */
  254. contents = reencode_ldst_pos_imm (contents, addend);
  255. break;
  256. /* Group relocations to create high bits of a 16, 32, 48 or 64
  257. bit signed data or abs address inline. Will change
  258. instruction to MOVN or MOVZ depending on sign of calculated
  259. value. */
  260. case BFD_RELOC_AARCH64_MOVW_G0_S:
  261. case BFD_RELOC_AARCH64_MOVW_G1_S:
  262. case BFD_RELOC_AARCH64_MOVW_G2_S:
  263. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
  264. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
  265. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
  266. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
  267. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
  268. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
  269. /* NOTE: We can only come here with movz or movn. */
  270. if (addend < 0)
  271. {
  272. /* Force use of MOVN. */
  273. addend = ~addend;
  274. contents = reencode_movzn_to_movn (contents);
  275. }
  276. else
  277. {
  278. /* Force use of MOVZ. */
  279. contents = reencode_movzn_to_movz (contents);
  280. }
  281. /* fall through */
  282. /* Group relocations to create a 16, 32, 48 or 64 bit unsigned
  283. data or abs address inline. */
  284. case BFD_RELOC_AARCH64_MOVW_G0:
  285. case BFD_RELOC_AARCH64_MOVW_G0_NC:
  286. case BFD_RELOC_AARCH64_MOVW_G1:
  287. case BFD_RELOC_AARCH64_MOVW_G1_NC:
  288. case BFD_RELOC_AARCH64_MOVW_G2:
  289. case BFD_RELOC_AARCH64_MOVW_G2_NC:
  290. case BFD_RELOC_AARCH64_MOVW_G3:
  291. case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
  292. case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
  293. case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
  294. case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
  295. case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
  296. case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
  297. case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
  298. case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
  299. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
  300. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
  301. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
  302. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
  303. contents = reencode_movw_imm (contents, addend);
  304. break;
  305. default:
  306. /* Repack simple data */
  307. if (howto->dst_mask & (howto->dst_mask + 1))
  308. return bfd_reloc_notsupported;
  309. contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask));
  310. break;
  311. }
  312. switch (size)
  313. {
  314. case 2:
  315. bfd_put_16 (abfd, contents, address);
  316. break;
  317. case 4:
  318. if (howto->dst_mask != 0xffffffff)
  319. /* must be 32-bit instruction, always little-endian */
  320. bfd_putl32 (contents, address);
  321. else
  322. /* must be 32-bit data (endianness dependent) */
  323. bfd_put_32 (abfd, contents, address);
  324. break;
  325. case 8:
  326. bfd_put_64 (abfd, contents, address);
  327. break;
  328. default:
  329. abort ();
  330. }
  331. return status;
  332. }
  333. bfd_vma
  334. _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
  335. bfd_vma place, bfd_vma value,
  336. bfd_vma addend, bfd_boolean weak_undef_p)
  337. {
  338. switch (r_type)
  339. {
  340. case BFD_RELOC_AARCH64_NONE:
  341. case BFD_RELOC_AARCH64_TLSDESC_CALL:
  342. break;
  343. case BFD_RELOC_AARCH64_16_PCREL:
  344. case BFD_RELOC_AARCH64_32_PCREL:
  345. case BFD_RELOC_AARCH64_64_PCREL:
  346. case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
  347. case BFD_RELOC_AARCH64_BRANCH19:
  348. case BFD_RELOC_AARCH64_LD_LO19_PCREL:
  349. case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
  350. case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
  351. case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
  352. case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
  353. case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
  354. case BFD_RELOC_AARCH64_TSTBR14:
  355. if (weak_undef_p)
  356. value = place;
  357. value = value + addend - place;
  358. break;
  359. case BFD_RELOC_AARCH64_CALL26:
  360. case BFD_RELOC_AARCH64_JUMP26:
  361. value = value + addend - place;
  362. break;
  363. case BFD_RELOC_AARCH64_16:
  364. case BFD_RELOC_AARCH64_32:
  365. case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
  366. case BFD_RELOC_AARCH64_MOVW_G0:
  367. case BFD_RELOC_AARCH64_MOVW_G0_NC:
  368. case BFD_RELOC_AARCH64_MOVW_G0_S:
  369. case BFD_RELOC_AARCH64_MOVW_G1:
  370. case BFD_RELOC_AARCH64_MOVW_G1_NC:
  371. case BFD_RELOC_AARCH64_MOVW_G1_S:
  372. case BFD_RELOC_AARCH64_MOVW_G2:
  373. case BFD_RELOC_AARCH64_MOVW_G2_NC:
  374. case BFD_RELOC_AARCH64_MOVW_G2_S:
  375. case BFD_RELOC_AARCH64_MOVW_G3:
  376. case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
  377. case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
  378. case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
  379. case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
  380. case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
  381. case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
  382. case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
  383. case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
  384. case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
  385. case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
  386. case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
  387. case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
  388. case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
  389. case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
  390. case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
  391. case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
  392. case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
  393. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
  394. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
  395. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
  396. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
  397. case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
  398. value = value + addend;
  399. break;
  400. case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
  401. case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
  402. if (weak_undef_p)
  403. value = PG (place);
  404. value = PG (value + addend) - PG (place);
  405. break;
  406. case BFD_RELOC_AARCH64_GOT_LD_PREL19:
  407. value = value + addend - place;
  408. break;
  409. case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
  410. case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
  411. case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
  412. case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
  413. case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
  414. value = PG (value + addend) - PG (place);
  415. break;
  416. case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
  417. case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
  418. /* Caller must make sure addend is the base address of .got section. */
  419. value = value - PG (addend);
  420. break;
  421. case BFD_RELOC_AARCH64_ADD_LO12:
  422. case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
  423. case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
  424. case BFD_RELOC_AARCH64_LDST128_LO12:
  425. case BFD_RELOC_AARCH64_LDST16_LO12:
  426. case BFD_RELOC_AARCH64_LDST32_LO12:
  427. case BFD_RELOC_AARCH64_LDST64_LO12:
  428. case BFD_RELOC_AARCH64_LDST8_LO12:
  429. case BFD_RELOC_AARCH64_TLSDESC_ADD:
  430. case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
  431. case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
  432. case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
  433. case BFD_RELOC_AARCH64_TLSDESC_LDR:
  434. case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
  435. case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
  436. case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
  437. case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
  438. value = PG_OFFSET (value + addend);
  439. break;
  440. case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
  441. value = value + addend;
  442. break;
  443. case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
  444. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
  445. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
  446. value = (value + addend) & (bfd_vma) 0xffff0000;
  447. break;
  448. case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
  449. /* Mask off low 12bits, keep all other high bits, so that the later
  450. generic code could check whehter there is overflow. */
  451. value = (value + addend) & ~(bfd_vma) 0xfff;
  452. break;
  453. case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
  454. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
  455. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
  456. value = (value + addend) & (bfd_vma) 0xffff;
  457. break;
  458. case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
  459. value = (value + addend) & ~(bfd_vma) 0xffffffff;
  460. value -= place & ~(bfd_vma) 0xffffffff;
  461. break;
  462. default:
  463. break;
  464. }
  465. return value;
  466. }
  467. /* Hook called by the linker routine which adds symbols from an object
  468. file. */
  469. bfd_boolean
  470. _bfd_aarch64_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
  471. Elf_Internal_Sym *sym,
  472. const char **namep ATTRIBUTE_UNUSED,
  473. flagword *flagsp ATTRIBUTE_UNUSED,
  474. asection **secp ATTRIBUTE_UNUSED,
  475. bfd_vma *valp ATTRIBUTE_UNUSED)
  476. {
  477. if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
  478. || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
  479. && (abfd->flags & DYNAMIC) == 0
  480. && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
  481. elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
  482. return TRUE;
  483. }
  484. /* Support for core dump NOTE sections. */
  485. bfd_boolean
  486. _bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
  487. {
  488. int offset;
  489. size_t size;
  490. switch (note->descsz)
  491. {
  492. default:
  493. return FALSE;
  494. case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */
  495. /* pr_cursig */
  496. elf_tdata (abfd)->core->signal
  497. = bfd_get_16 (abfd, note->descdata + 12);
  498. /* pr_pid */
  499. elf_tdata (abfd)->core->lwpid
  500. = bfd_get_32 (abfd, note->descdata + 32);
  501. /* pr_reg */
  502. offset = 112;
  503. size = 272;
  504. break;
  505. }
  506. /* Make a ".reg/999" section. */
  507. return _bfd_elfcore_make_pseudosection (abfd, ".reg",
  508. size, note->descpos + offset);
  509. }
  510. bfd_boolean
  511. _bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
  512. {
  513. switch (note->descsz)
  514. {
  515. default:
  516. return FALSE;
  517. case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */
  518. elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
  519. elf_tdata (abfd)->core->program
  520. = _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
  521. elf_tdata (abfd)->core->command
  522. = _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
  523. }
  524. /* Note that for some reason, a spurious space is tacked
  525. onto the end of the args in some (at least one anyway)
  526. implementations, so strip it off if it exists. */
  527. {
  528. char *command = elf_tdata (abfd)->core->command;
  529. int n = strlen (command);
  530. if (0 < n && command[n - 1] == ' ')
  531. command[n - 1] = '\0';
  532. }
  533. return TRUE;
  534. }
  535. char *
  536. _bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
  537. ...)
  538. {
  539. switch (note_type)
  540. {
  541. default:
  542. return NULL;
  543. case NT_PRPSINFO:
  544. {
  545. char data[136];
  546. va_list ap;
  547. va_start (ap, note_type);
  548. memset (data, 0, sizeof (data));
  549. strncpy (data + 40, va_arg (ap, const char *), 16);
  550. strncpy (data + 56, va_arg (ap, const char *), 80);
  551. va_end (ap);
  552. return elfcore_write_note (abfd, buf, bufsiz, "CORE",
  553. note_type, data, sizeof (data));
  554. }
  555. case NT_PRSTATUS:
  556. {
  557. char data[392];
  558. va_list ap;
  559. long pid;
  560. int cursig;
  561. const void *greg;
  562. va_start (ap, note_type);
  563. memset (data, 0, sizeof (data));
  564. pid = va_arg (ap, long);
  565. bfd_put_32 (abfd, pid, data + 32);
  566. cursig = va_arg (ap, int);
  567. bfd_put_16 (abfd, cursig, data + 12);
  568. greg = va_arg (ap, const void *);
  569. memcpy (data + 112, greg, 272);
  570. va_end (ap);
  571. return elfcore_write_note (abfd, buf, bufsiz, "CORE",
  572. note_type, data, sizeof (data));
  573. }
  574. }
  575. }