elf32-rl78.c 69 KB

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  1. /* Renesas RL78 specific support for 32-bit ELF.
  2. Copyright (C) 2011-2015 Free Software Foundation, Inc.
  3. This file is part of BFD, the Binary File Descriptor library.
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 3 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
  15. #include "sysdep.h"
  16. #include "bfd.h"
  17. #include "bfd_stdint.h"
  18. #include "libbfd.h"
  19. #include "elf-bfd.h"
  20. #include "elf/rl78.h"
  21. #include "libiberty.h"
  22. #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
  23. #define RL78REL(n,sz,bit,shift,complain,pcrel) \
  24. HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
  25. bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
  26. static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
  27. asection *, bfd *, char **);
  28. /* FIXME: We could omit the SHIFT parameter, it is always zero. */
  29. #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
  30. HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
  31. rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
  32. /* Note that the relocations around 0x7f are internal to this file;
  33. feel free to move them as needed to avoid conflicts with published
  34. relocation numbers. */
  35. static reloc_howto_type rl78_elf_howto_table [] =
  36. {
  37. RL78REL (NONE, 3, 0, 0, dont, FALSE),
  38. RL78REL (DIR32, 2, 32, 0, signed, FALSE),
  39. RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
  40. RL78REL (DIR16, 1, 16, 0, dont, FALSE),
  41. RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
  42. RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
  43. RL78REL (DIR8, 0, 8, 0, dont, FALSE),
  44. RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
  45. RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
  46. RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
  47. RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
  48. RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
  49. RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
  50. RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
  51. RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
  52. RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
  53. RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
  54. RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
  55. RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
  56. EMPTY_HOWTO (0x13),
  57. EMPTY_HOWTO (0x14),
  58. EMPTY_HOWTO (0x15),
  59. EMPTY_HOWTO (0x16),
  60. EMPTY_HOWTO (0x17),
  61. EMPTY_HOWTO (0x18),
  62. EMPTY_HOWTO (0x19),
  63. EMPTY_HOWTO (0x1a),
  64. EMPTY_HOWTO (0x1b),
  65. EMPTY_HOWTO (0x1c),
  66. EMPTY_HOWTO (0x1d),
  67. EMPTY_HOWTO (0x1e),
  68. EMPTY_HOWTO (0x1f),
  69. EMPTY_HOWTO (0x20),
  70. EMPTY_HOWTO (0x21),
  71. EMPTY_HOWTO (0x22),
  72. EMPTY_HOWTO (0x23),
  73. EMPTY_HOWTO (0x24),
  74. EMPTY_HOWTO (0x25),
  75. EMPTY_HOWTO (0x26),
  76. EMPTY_HOWTO (0x27),
  77. EMPTY_HOWTO (0x28),
  78. EMPTY_HOWTO (0x29),
  79. EMPTY_HOWTO (0x2a),
  80. EMPTY_HOWTO (0x2b),
  81. EMPTY_HOWTO (0x2c),
  82. RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
  83. EMPTY_HOWTO (0x2e),
  84. RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
  85. EMPTY_HOWTO (0x30),
  86. EMPTY_HOWTO (0x31),
  87. EMPTY_HOWTO (0x32),
  88. EMPTY_HOWTO (0x33),
  89. EMPTY_HOWTO (0x34),
  90. EMPTY_HOWTO (0x35),
  91. EMPTY_HOWTO (0x36),
  92. EMPTY_HOWTO (0x37),
  93. EMPTY_HOWTO (0x38),
  94. EMPTY_HOWTO (0x39),
  95. EMPTY_HOWTO (0x3a),
  96. EMPTY_HOWTO (0x3b),
  97. EMPTY_HOWTO (0x3c),
  98. EMPTY_HOWTO (0x3d),
  99. EMPTY_HOWTO (0x3e),
  100. EMPTY_HOWTO (0x3f),
  101. EMPTY_HOWTO (0x40),
  102. RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
  103. RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
  104. RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
  105. RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
  106. RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
  107. RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
  108. RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
  109. RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
  110. RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
  111. RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
  112. RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
  113. RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
  114. RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
  115. RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
  116. RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
  117. RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
  118. RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
  119. #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
  120. EMPTY_HOWTO (0x52),
  121. EMPTY_HOWTO (0x53),
  122. EMPTY_HOWTO (0x54),
  123. EMPTY_HOWTO (0x55),
  124. EMPTY_HOWTO (0x56),
  125. EMPTY_HOWTO (0x57),
  126. EMPTY_HOWTO (0x58),
  127. EMPTY_HOWTO (0x59),
  128. EMPTY_HOWTO (0x5a),
  129. EMPTY_HOWTO (0x5b),
  130. EMPTY_HOWTO (0x5c),
  131. EMPTY_HOWTO (0x5d),
  132. EMPTY_HOWTO (0x5e),
  133. EMPTY_HOWTO (0x5f),
  134. EMPTY_HOWTO (0x60),
  135. EMPTY_HOWTO (0x61),
  136. EMPTY_HOWTO (0x62),
  137. EMPTY_HOWTO (0x63),
  138. EMPTY_HOWTO (0x64),
  139. EMPTY_HOWTO (0x65),
  140. EMPTY_HOWTO (0x66),
  141. EMPTY_HOWTO (0x67),
  142. EMPTY_HOWTO (0x68),
  143. EMPTY_HOWTO (0x69),
  144. EMPTY_HOWTO (0x6a),
  145. EMPTY_HOWTO (0x6b),
  146. EMPTY_HOWTO (0x6c),
  147. EMPTY_HOWTO (0x6d),
  148. EMPTY_HOWTO (0x6e),
  149. EMPTY_HOWTO (0x6f),
  150. EMPTY_HOWTO (0x70),
  151. EMPTY_HOWTO (0x71),
  152. EMPTY_HOWTO (0x72),
  153. EMPTY_HOWTO (0x73),
  154. EMPTY_HOWTO (0x74),
  155. EMPTY_HOWTO (0x75),
  156. EMPTY_HOWTO (0x76),
  157. EMPTY_HOWTO (0x77),
  158. EMPTY_HOWTO (0x78),
  159. EMPTY_HOWTO (0x79),
  160. EMPTY_HOWTO (0x7a),
  161. EMPTY_HOWTO (0x7b),
  162. EMPTY_HOWTO (0x7c),
  163. EMPTY_HOWTO (0x7d),
  164. EMPTY_HOWTO (0x7e),
  165. EMPTY_HOWTO (0x7f),
  166. RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
  167. RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
  168. RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
  169. RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
  170. RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
  171. RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
  172. RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
  173. RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
  174. RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
  175. EMPTY_HOWTO (0x89),
  176. EMPTY_HOWTO (0x8a),
  177. EMPTY_HOWTO (0x8b),
  178. EMPTY_HOWTO (0x8c),
  179. RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
  180. EMPTY_HOWTO (0x8e),
  181. EMPTY_HOWTO (0x8f),
  182. RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
  183. RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
  184. RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
  185. RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
  186. RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
  187. RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
  188. RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
  189. };
  190. /* Map BFD reloc types to RL78 ELF reloc types. */
  191. struct rl78_reloc_map
  192. {
  193. bfd_reloc_code_real_type bfd_reloc_val;
  194. unsigned int rl78_reloc_val;
  195. };
  196. static const struct rl78_reloc_map rl78_reloc_map [] =
  197. {
  198. { BFD_RELOC_NONE, R_RL78_NONE },
  199. { BFD_RELOC_8, R_RL78_DIR8S },
  200. { BFD_RELOC_16, R_RL78_DIR16S },
  201. { BFD_RELOC_24, R_RL78_DIR24S },
  202. { BFD_RELOC_32, R_RL78_DIR32 },
  203. { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
  204. { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
  205. { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
  206. { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
  207. { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
  208. { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
  209. { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
  210. { BFD_RELOC_RL78_SYM, R_RL78_SYM },
  211. { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
  212. { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
  213. { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
  214. { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
  215. { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
  216. { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
  217. { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
  218. { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
  219. { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
  220. { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
  221. { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
  222. { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
  223. { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
  224. { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
  225. };
  226. static reloc_howto_type *
  227. rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
  228. bfd_reloc_code_real_type code)
  229. {
  230. unsigned int i;
  231. if (code == BFD_RELOC_RL78_32_OP)
  232. return rl78_elf_howto_table + R_RL78_DIR32;
  233. for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
  234. if (rl78_reloc_map [i].bfd_reloc_val == code)
  235. return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
  236. return NULL;
  237. }
  238. static reloc_howto_type *
  239. rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
  240. {
  241. unsigned int i;
  242. for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
  243. if (rl78_elf_howto_table[i].name != NULL
  244. && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
  245. return rl78_elf_howto_table + i;
  246. return NULL;
  247. }
  248. /* Set the howto pointer for an RL78 ELF reloc. */
  249. static void
  250. rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
  251. arelent * cache_ptr,
  252. Elf_Internal_Rela * dst)
  253. {
  254. unsigned int r_type;
  255. r_type = ELF32_R_TYPE (dst->r_info);
  256. if (r_type >= (unsigned int) R_RL78_max)
  257. {
  258. _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
  259. r_type = 0;
  260. }
  261. cache_ptr->howto = rl78_elf_howto_table + r_type;
  262. }
  263. static bfd_vma
  264. get_symbol_value (const char * name,
  265. bfd_reloc_status_type * status,
  266. struct bfd_link_info * info,
  267. bfd * input_bfd,
  268. asection * input_section,
  269. int offset)
  270. {
  271. struct bfd_link_hash_entry * h;
  272. if (info == NULL)
  273. return 0;
  274. h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
  275. if (h == NULL
  276. || (h->type != bfd_link_hash_defined
  277. && h->type != bfd_link_hash_defweak))
  278. {
  279. bfd_reloc_status_type res;
  280. res = info->callbacks->undefined_symbol
  281. (info, name, input_bfd, input_section, offset, TRUE);
  282. if (status)
  283. * status = res;
  284. return 0;
  285. }
  286. return (h->u.def.value
  287. + h->u.def.section->output_section->vma
  288. + h->u.def.section->output_offset);
  289. }
  290. static bfd_vma
  291. get_romstart (bfd_reloc_status_type * status,
  292. struct bfd_link_info * info,
  293. bfd * abfd,
  294. asection * sec,
  295. int offset)
  296. {
  297. static bfd_boolean cached = FALSE;
  298. static bfd_vma cached_value = 0;
  299. static bfd_reloc_status_type cached_status;
  300. if (!cached)
  301. {
  302. cached_value = get_symbol_value ("_start", & cached_status, info, abfd, sec, offset);
  303. cached = TRUE;
  304. }
  305. if (status)
  306. * status = cached_status;
  307. return cached_value;
  308. }
  309. static bfd_vma
  310. get_ramstart (bfd_reloc_status_type * status,
  311. struct bfd_link_info * info,
  312. bfd * abfd,
  313. asection * sec,
  314. int offset)
  315. {
  316. static bfd_boolean cached = FALSE;
  317. static bfd_vma cached_value = 0;
  318. static bfd_reloc_status_type cached_status;
  319. if (!cached)
  320. {
  321. cached_value = get_symbol_value ("__datastart", & cached_status, info, abfd, sec, offset);
  322. cached = TRUE;
  323. }
  324. if (status)
  325. * status = cached_status;
  326. return cached_value;
  327. }
  328. #define NUM_STACK_ENTRIES 16
  329. static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
  330. static unsigned int rl78_stack_top;
  331. #define RL78_STACK_PUSH(val) \
  332. do \
  333. { \
  334. if (rl78_stack_top < NUM_STACK_ENTRIES) \
  335. rl78_stack [rl78_stack_top ++] = (val); \
  336. else \
  337. _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
  338. } \
  339. while (0)
  340. #define RL78_STACK_POP(dest) \
  341. do \
  342. { \
  343. if (rl78_stack_top > 0) \
  344. (dest) = rl78_stack [-- rl78_stack_top];\
  345. else \
  346. { \
  347. _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
  348. (dest) = 0; \
  349. } \
  350. } \
  351. while (0)
  352. /* Special handling for RL78 complex relocs. Returns the
  353. value of the reloc, or 0 for relocs which do not generate
  354. a result. SYMVAL is the value of the symbol for relocs
  355. which use a symbolic argument. */
  356. static bfd_vma
  357. rl78_compute_complex_reloc (unsigned long r_type,
  358. bfd_vma symval,
  359. asection * input_section)
  360. {
  361. int32_t tmp1, tmp2;
  362. bfd_vma relocation;
  363. switch (r_type)
  364. {
  365. default:
  366. return 0;
  367. case R_RL78_ABS24S_PCREL:
  368. case R_RL78_ABS16S_PCREL:
  369. case R_RL78_ABS8S_PCREL:
  370. RL78_STACK_POP (relocation);
  371. relocation -= input_section->output_section->vma + input_section->output_offset;
  372. return relocation;
  373. case R_RL78_ABS32:
  374. case R_RL78_ABS32_REV:
  375. case R_RL78_ABS16:
  376. case R_RL78_ABS16_REV:
  377. case R_RL78_ABS16S:
  378. case R_RL78_ABS16U:
  379. case R_RL78_ABS8:
  380. case R_RL78_ABS8U:
  381. case R_RL78_ABS8S:
  382. RL78_STACK_POP (relocation);
  383. return relocation;
  384. case R_RL78_ABS16UL:
  385. case R_RL78_ABS8UL:
  386. RL78_STACK_POP (relocation);
  387. return relocation >> 2;
  388. case R_RL78_ABS16UW:
  389. case R_RL78_ABS8UW:
  390. RL78_STACK_POP (relocation);
  391. return relocation >> 1;
  392. /* The rest of the relocs compute values and then push them onto the stack. */
  393. case R_RL78_OPramtop:
  394. case R_RL78_OPromtop:
  395. case R_RL78_SYM:
  396. RL78_STACK_PUSH (symval);
  397. return 0;
  398. case R_RL78_OPneg:
  399. RL78_STACK_POP (tmp1);
  400. tmp1 = - tmp1;
  401. RL78_STACK_PUSH (tmp1);
  402. return 0;
  403. case R_RL78_OPadd:
  404. RL78_STACK_POP (tmp2);
  405. RL78_STACK_POP (tmp1);
  406. tmp1 += tmp2;
  407. RL78_STACK_PUSH (tmp1);
  408. return 0;
  409. case R_RL78_OPsub:
  410. /* For the expression "A - B", the assembler pushes A,
  411. then B, then OPSUB. So the first op we pop is B, not A. */
  412. RL78_STACK_POP (tmp2); /* B */
  413. RL78_STACK_POP (tmp1); /* A */
  414. tmp1 -= tmp2; /* A - B */
  415. RL78_STACK_PUSH (tmp1);
  416. return 0;
  417. case R_RL78_OPmul:
  418. RL78_STACK_POP (tmp2);
  419. RL78_STACK_POP (tmp1);
  420. tmp1 *= tmp2;
  421. RL78_STACK_PUSH (tmp1);
  422. return 0;
  423. case R_RL78_OPdiv:
  424. RL78_STACK_POP (tmp2);
  425. RL78_STACK_POP (tmp1);
  426. tmp1 /= tmp2;
  427. RL78_STACK_PUSH (tmp1);
  428. return 0;
  429. case R_RL78_OPshla:
  430. RL78_STACK_POP (tmp2);
  431. RL78_STACK_POP (tmp1);
  432. tmp1 <<= tmp2;
  433. RL78_STACK_PUSH (tmp1);
  434. return 0;
  435. case R_RL78_OPshra:
  436. RL78_STACK_POP (tmp2);
  437. RL78_STACK_POP (tmp1);
  438. tmp1 >>= tmp2;
  439. RL78_STACK_PUSH (tmp1);
  440. return 0;
  441. case R_RL78_OPsctsize:
  442. RL78_STACK_PUSH (input_section->size);
  443. return 0;
  444. case R_RL78_OPscttop:
  445. RL78_STACK_PUSH (input_section->output_section->vma);
  446. return 0;
  447. case R_RL78_OPand:
  448. RL78_STACK_POP (tmp2);
  449. RL78_STACK_POP (tmp1);
  450. tmp1 &= tmp2;
  451. RL78_STACK_PUSH (tmp1);
  452. return 0;
  453. case R_RL78_OPor:
  454. RL78_STACK_POP (tmp2);
  455. RL78_STACK_POP (tmp1);
  456. tmp1 |= tmp2;
  457. RL78_STACK_PUSH (tmp1);
  458. return 0;
  459. case R_RL78_OPxor:
  460. RL78_STACK_POP (tmp2);
  461. RL78_STACK_POP (tmp1);
  462. tmp1 ^= tmp2;
  463. RL78_STACK_PUSH (tmp1);
  464. return 0;
  465. case R_RL78_OPnot:
  466. RL78_STACK_POP (tmp1);
  467. tmp1 = ~ tmp1;
  468. RL78_STACK_PUSH (tmp1);
  469. return 0;
  470. case R_RL78_OPmod:
  471. RL78_STACK_POP (tmp2);
  472. RL78_STACK_POP (tmp1);
  473. tmp1 %= tmp2;
  474. RL78_STACK_PUSH (tmp1);
  475. return 0;
  476. }
  477. }
  478. #undef RL78_STACK_PUSH
  479. #undef RL78_STACK_POP
  480. #define OP(i) (contents[reloc->address + (i)])
  481. static bfd_reloc_status_type
  482. rl78_special_reloc (bfd * input_bfd,
  483. arelent * reloc,
  484. asymbol * symbol,
  485. void * data,
  486. asection * input_section,
  487. bfd * output_bfd ATTRIBUTE_UNUSED,
  488. char ** error_message ATTRIBUTE_UNUSED)
  489. {
  490. bfd_reloc_status_type r = bfd_reloc_ok;
  491. bfd_vma relocation = 0;
  492. unsigned long r_type = reloc->howto->type;
  493. bfd_byte * contents = data;
  494. /* If necessary, compute the symbolic value of the relocation. */
  495. switch (r_type)
  496. {
  497. case R_RL78_SYM:
  498. relocation = (symbol->value
  499. + symbol->section->output_section->vma
  500. + symbol->section->output_offset
  501. + reloc->addend);
  502. break;
  503. case R_RL78_OPromtop:
  504. relocation = get_romstart (&r, NULL, input_bfd, input_section,
  505. reloc->address);
  506. break;
  507. case R_RL78_OPramtop:
  508. relocation = get_ramstart (&r, NULL, input_bfd, input_section,
  509. reloc->address);
  510. break;
  511. }
  512. /* Get the value of the relocation. */
  513. relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
  514. /* If the relocation alters the contents of the section then apply it now.
  515. Note - since this function is called from
  516. bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
  517. and not from the linker, we do not perform any range checking. The
  518. clients who are calling us are only interested in some relocated section
  519. contents, and not any linkage problems that might occur later. */
  520. switch (r_type)
  521. {
  522. case R_RL78_ABS32:
  523. OP (0) = relocation;
  524. OP (1) = relocation >> 8;
  525. OP (2) = relocation >> 16;
  526. OP (3) = relocation >> 24;
  527. break;
  528. case R_RL78_ABS32_REV:
  529. OP (3) = relocation;
  530. OP (2) = relocation >> 8;
  531. OP (1) = relocation >> 16;
  532. OP (0) = relocation >> 24;
  533. break;
  534. case R_RL78_ABS24S_PCREL:
  535. case R_RL78_ABS24S:
  536. OP (0) = relocation;
  537. OP (1) = relocation >> 8;
  538. OP (2) = relocation >> 16;
  539. break;
  540. case R_RL78_ABS16_REV:
  541. OP (1) = relocation;
  542. OP (0) = relocation >> 8;
  543. break;
  544. case R_RL78_ABS16S_PCREL:
  545. case R_RL78_ABS16:
  546. case R_RL78_ABS16S:
  547. case R_RL78_ABS16U:
  548. case R_RL78_ABS16UL:
  549. case R_RL78_ABS16UW:
  550. OP (0) = relocation;
  551. OP (1) = relocation >> 8;
  552. break;
  553. case R_RL78_ABS8S_PCREL:
  554. case R_RL78_ABS8:
  555. case R_RL78_ABS8U:
  556. case R_RL78_ABS8UL:
  557. case R_RL78_ABS8UW:
  558. case R_RL78_ABS8S:
  559. OP (0) = relocation;
  560. break;
  561. default:
  562. break;
  563. }
  564. return r;
  565. }
  566. #undef OP
  567. #define OP(i) (contents[rel->r_offset + (i)])
  568. /* Relocate an RL78 ELF section.
  569. There is some attempt to make this function usable for many architectures,
  570. both USE_REL and USE_RELA ['twould be nice if such a critter existed],
  571. if only to serve as a learning tool.
  572. The RELOCATE_SECTION function is called by the new ELF backend linker
  573. to handle the relocations for a section.
  574. The relocs are always passed as Rela structures; if the section
  575. actually uses Rel structures, the r_addend field will always be
  576. zero.
  577. This function is responsible for adjusting the section contents as
  578. necessary, and (if using Rela relocs and generating a relocatable
  579. output file) adjusting the reloc addend as necessary.
  580. This function does not have to worry about setting the reloc
  581. address or the reloc symbol index.
  582. LOCAL_SYMS is a pointer to the swapped in local symbols.
  583. LOCAL_SECTIONS is an array giving the section in the input file
  584. corresponding to the st_shndx field of each local symbol.
  585. The global hash table entry for the global symbols can be found
  586. via elf_sym_hashes (input_bfd).
  587. When generating relocatable output, this function must handle
  588. STB_LOCAL/STT_SECTION symbols specially. The output symbol is
  589. going to be the section symbol corresponding to the output
  590. section, which means that the addend must be adjusted
  591. accordingly. */
  592. static bfd_boolean
  593. rl78_elf_relocate_section
  594. (bfd * output_bfd,
  595. struct bfd_link_info * info,
  596. bfd * input_bfd,
  597. asection * input_section,
  598. bfd_byte * contents,
  599. Elf_Internal_Rela * relocs,
  600. Elf_Internal_Sym * local_syms,
  601. asection ** local_sections)
  602. {
  603. Elf_Internal_Shdr * symtab_hdr;
  604. struct elf_link_hash_entry ** sym_hashes;
  605. Elf_Internal_Rela * rel;
  606. Elf_Internal_Rela * relend;
  607. bfd *dynobj;
  608. asection *splt;
  609. symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
  610. sym_hashes = elf_sym_hashes (input_bfd);
  611. relend = relocs + input_section->reloc_count;
  612. dynobj = elf_hash_table (info)->dynobj;
  613. splt = NULL;
  614. if (dynobj != NULL)
  615. splt = bfd_get_linker_section (dynobj, ".plt");
  616. for (rel = relocs; rel < relend; rel ++)
  617. {
  618. reloc_howto_type * howto;
  619. unsigned long r_symndx;
  620. Elf_Internal_Sym * sym;
  621. asection * sec;
  622. struct elf_link_hash_entry * h;
  623. bfd_vma relocation;
  624. bfd_reloc_status_type r;
  625. const char * name = NULL;
  626. bfd_boolean unresolved_reloc = TRUE;
  627. int r_type;
  628. r_type = ELF32_R_TYPE (rel->r_info);
  629. r_symndx = ELF32_R_SYM (rel->r_info);
  630. howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
  631. h = NULL;
  632. sym = NULL;
  633. sec = NULL;
  634. relocation = 0;
  635. if (r_symndx < symtab_hdr->sh_info)
  636. {
  637. sym = local_syms + r_symndx;
  638. sec = local_sections [r_symndx];
  639. relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
  640. name = bfd_elf_string_from_elf_section
  641. (input_bfd, symtab_hdr->sh_link, sym->st_name);
  642. name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
  643. }
  644. else
  645. {
  646. bfd_boolean warned ATTRIBUTE_UNUSED;
  647. bfd_boolean ignored ATTRIBUTE_UNUSED;
  648. RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
  649. r_symndx, symtab_hdr, sym_hashes, h,
  650. sec, relocation, unresolved_reloc,
  651. warned, ignored);
  652. name = h->root.root.string;
  653. }
  654. if (sec != NULL && discarded_section (sec))
  655. RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
  656. rel, 1, relend, howto, 0, contents);
  657. if (bfd_link_relocatable (info))
  658. {
  659. /* This is a relocatable link. We don't have to change
  660. anything, unless the reloc is against a section symbol,
  661. in which case we have to adjust according to where the
  662. section symbol winds up in the output section. */
  663. if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
  664. rel->r_addend += sec->output_offset;
  665. continue;
  666. }
  667. switch (ELF32_R_TYPE (rel->r_info))
  668. {
  669. case R_RL78_DIR16S:
  670. {
  671. bfd_vma *plt_offset;
  672. if (h != NULL)
  673. plt_offset = &h->plt.offset;
  674. else
  675. plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
  676. if (! valid_16bit_address (relocation))
  677. {
  678. /* If this is the first time we've processed this symbol,
  679. fill in the plt entry with the correct symbol address. */
  680. if ((*plt_offset & 1) == 0)
  681. {
  682. unsigned int x;
  683. x = 0x000000ec; /* br !!abs24 */
  684. x |= (relocation << 8) & 0xffffff00;
  685. bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
  686. *plt_offset |= 1;
  687. }
  688. relocation = (splt->output_section->vma
  689. + splt->output_offset
  690. + (*plt_offset & -2));
  691. if (name)
  692. {
  693. char *newname = bfd_malloc (strlen(name)+5);
  694. strcpy (newname, name);
  695. strcat(newname, ".plt");
  696. _bfd_generic_link_add_one_symbol (info,
  697. input_bfd,
  698. newname,
  699. BSF_FUNCTION | BSF_WEAK,
  700. splt,
  701. (*plt_offset & -2),
  702. 0,
  703. 1,
  704. 0,
  705. 0);
  706. }
  707. }
  708. }
  709. break;
  710. }
  711. if (h != NULL && h->root.type == bfd_link_hash_undefweak)
  712. /* If the symbol is undefined and weak
  713. then the relocation resolves to zero. */
  714. relocation = 0;
  715. else
  716. {
  717. if (howto->pc_relative)
  718. {
  719. relocation -= (input_section->output_section->vma
  720. + input_section->output_offset
  721. + rel->r_offset);
  722. relocation -= bfd_get_reloc_size (howto);
  723. }
  724. relocation += rel->r_addend;
  725. }
  726. r = bfd_reloc_ok;
  727. #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
  728. /* Opcode relocs are always big endian. Data relocs are bi-endian. */
  729. switch (r_type)
  730. {
  731. case R_RL78_NONE:
  732. break;
  733. case R_RL78_RH_RELAX:
  734. break;
  735. case R_RL78_DIR8S_PCREL:
  736. RANGE (-128, 127);
  737. OP (0) = relocation;
  738. break;
  739. case R_RL78_DIR8S:
  740. RANGE (-128, 255);
  741. OP (0) = relocation;
  742. break;
  743. case R_RL78_DIR8U:
  744. RANGE (0, 255);
  745. OP (0) = relocation;
  746. break;
  747. case R_RL78_DIR16S_PCREL:
  748. RANGE (-32768, 32767);
  749. OP (0) = relocation;
  750. OP (1) = relocation >> 8;
  751. break;
  752. case R_RL78_DIR16S:
  753. if ((relocation & 0xf0000) == 0xf0000)
  754. relocation &= 0xffff;
  755. RANGE (-32768, 65535);
  756. OP (0) = relocation;
  757. OP (1) = relocation >> 8;
  758. break;
  759. case R_RL78_DIR16U:
  760. RANGE (0, 65536);
  761. OP (0) = relocation;
  762. OP (1) = relocation >> 8;
  763. break;
  764. case R_RL78_DIR16:
  765. RANGE (-32768, 65536);
  766. OP (0) = relocation;
  767. OP (1) = relocation >> 8;
  768. break;
  769. case R_RL78_DIR16_REV:
  770. RANGE (-32768, 65536);
  771. OP (1) = relocation;
  772. OP (0) = relocation >> 8;
  773. break;
  774. case R_RL78_DIR3U_PCREL:
  775. RANGE (3, 10);
  776. OP (0) &= 0xf8;
  777. OP (0) |= relocation & 0x07;
  778. break;
  779. case R_RL78_DIR24S_PCREL:
  780. RANGE (-0x800000, 0x7fffff);
  781. OP (0) = relocation;
  782. OP (1) = relocation >> 8;
  783. OP (2) = relocation >> 16;
  784. break;
  785. case R_RL78_DIR24S:
  786. RANGE (-0x800000, 0x7fffff);
  787. OP (0) = relocation;
  788. OP (1) = relocation >> 8;
  789. OP (2) = relocation >> 16;
  790. break;
  791. case R_RL78_DIR32:
  792. OP (0) = relocation;
  793. OP (1) = relocation >> 8;
  794. OP (2) = relocation >> 16;
  795. OP (3) = relocation >> 24;
  796. break;
  797. case R_RL78_DIR32_REV:
  798. OP (3) = relocation;
  799. OP (2) = relocation >> 8;
  800. OP (1) = relocation >> 16;
  801. OP (0) = relocation >> 24;
  802. break;
  803. case R_RL78_RH_SFR:
  804. RANGE (0xfff00, 0xfffff);
  805. OP (0) = relocation & 0xff;
  806. break;
  807. case R_RL78_RH_SADDR:
  808. RANGE (0xffe20, 0xfff1f);
  809. OP (0) = relocation & 0xff;
  810. break;
  811. /* Complex reloc handling: */
  812. case R_RL78_ABS32:
  813. case R_RL78_ABS32_REV:
  814. case R_RL78_ABS24S_PCREL:
  815. case R_RL78_ABS24S:
  816. case R_RL78_ABS16:
  817. case R_RL78_ABS16_REV:
  818. case R_RL78_ABS16S_PCREL:
  819. case R_RL78_ABS16S:
  820. case R_RL78_ABS16U:
  821. case R_RL78_ABS16UL:
  822. case R_RL78_ABS16UW:
  823. case R_RL78_ABS8:
  824. case R_RL78_ABS8U:
  825. case R_RL78_ABS8UL:
  826. case R_RL78_ABS8UW:
  827. case R_RL78_ABS8S_PCREL:
  828. case R_RL78_ABS8S:
  829. case R_RL78_OPneg:
  830. case R_RL78_OPadd:
  831. case R_RL78_OPsub:
  832. case R_RL78_OPmul:
  833. case R_RL78_OPdiv:
  834. case R_RL78_OPshla:
  835. case R_RL78_OPshra:
  836. case R_RL78_OPsctsize:
  837. case R_RL78_OPscttop:
  838. case R_RL78_OPand:
  839. case R_RL78_OPor:
  840. case R_RL78_OPxor:
  841. case R_RL78_OPnot:
  842. case R_RL78_OPmod:
  843. relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
  844. switch (r_type)
  845. {
  846. case R_RL78_ABS32:
  847. OP (0) = relocation;
  848. OP (1) = relocation >> 8;
  849. OP (2) = relocation >> 16;
  850. OP (3) = relocation >> 24;
  851. break;
  852. case R_RL78_ABS32_REV:
  853. OP (3) = relocation;
  854. OP (2) = relocation >> 8;
  855. OP (1) = relocation >> 16;
  856. OP (0) = relocation >> 24;
  857. break;
  858. case R_RL78_ABS24S_PCREL:
  859. case R_RL78_ABS24S:
  860. RANGE (-0x800000, 0x7fffff);
  861. OP (0) = relocation;
  862. OP (1) = relocation >> 8;
  863. OP (2) = relocation >> 16;
  864. break;
  865. case R_RL78_ABS16:
  866. RANGE (-32768, 65535);
  867. OP (0) = relocation;
  868. OP (1) = relocation >> 8;
  869. break;
  870. case R_RL78_ABS16_REV:
  871. RANGE (-32768, 65535);
  872. OP (1) = relocation;
  873. OP (0) = relocation >> 8;
  874. break;
  875. case R_RL78_ABS16S_PCREL:
  876. case R_RL78_ABS16S:
  877. RANGE (-32768, 32767);
  878. OP (0) = relocation;
  879. OP (1) = relocation >> 8;
  880. break;
  881. case R_RL78_ABS16U:
  882. case R_RL78_ABS16UL:
  883. case R_RL78_ABS16UW:
  884. RANGE (0, 65536);
  885. OP (0) = relocation;
  886. OP (1) = relocation >> 8;
  887. break;
  888. case R_RL78_ABS8:
  889. RANGE (-128, 255);
  890. OP (0) = relocation;
  891. break;
  892. case R_RL78_ABS8U:
  893. case R_RL78_ABS8UL:
  894. case R_RL78_ABS8UW:
  895. RANGE (0, 255);
  896. OP (0) = relocation;
  897. break;
  898. case R_RL78_ABS8S_PCREL:
  899. case R_RL78_ABS8S:
  900. RANGE (-128, 127);
  901. OP (0) = relocation;
  902. break;
  903. default:
  904. break;
  905. }
  906. break;
  907. case R_RL78_SYM:
  908. if (r_symndx < symtab_hdr->sh_info)
  909. relocation = sec->output_section->vma + sec->output_offset
  910. + sym->st_value + rel->r_addend;
  911. else if (h != NULL
  912. && (h->root.type == bfd_link_hash_defined
  913. || h->root.type == bfd_link_hash_defweak))
  914. relocation = h->root.u.def.value
  915. + sec->output_section->vma
  916. + sec->output_offset
  917. + rel->r_addend;
  918. else
  919. {
  920. relocation = 0;
  921. if (h->root.type != bfd_link_hash_undefweak)
  922. _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
  923. }
  924. (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
  925. break;
  926. case R_RL78_OPromtop:
  927. relocation = get_romstart (&r, info, input_bfd, input_section, rel->r_offset);
  928. (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
  929. break;
  930. case R_RL78_OPramtop:
  931. relocation = get_ramstart (&r, info, input_bfd, input_section, rel->r_offset);
  932. (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
  933. break;
  934. default:
  935. r = bfd_reloc_notsupported;
  936. break;
  937. }
  938. if (r != bfd_reloc_ok)
  939. {
  940. const char * msg = NULL;
  941. switch (r)
  942. {
  943. case bfd_reloc_overflow:
  944. /* Catch the case of a missing function declaration
  945. and emit a more helpful error message. */
  946. if (r_type == R_RL78_DIR24S_PCREL)
  947. msg = _("%B(%A): error: call to undefined function '%s'");
  948. else
  949. r = info->callbacks->reloc_overflow
  950. (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
  951. input_bfd, input_section, rel->r_offset);
  952. break;
  953. case bfd_reloc_undefined:
  954. r = info->callbacks->undefined_symbol
  955. (info, name, input_bfd, input_section, rel->r_offset,
  956. TRUE);
  957. break;
  958. case bfd_reloc_other:
  959. msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
  960. break;
  961. case bfd_reloc_outofrange:
  962. msg = _("%B(%A): internal error: out of range error");
  963. break;
  964. case bfd_reloc_notsupported:
  965. msg = _("%B(%A): internal error: unsupported relocation error");
  966. break;
  967. case bfd_reloc_dangerous:
  968. msg = _("%B(%A): internal error: dangerous relocation");
  969. break;
  970. default:
  971. msg = _("%B(%A): internal error: unknown error");
  972. break;
  973. }
  974. if (msg)
  975. _bfd_error_handler (msg, input_bfd, input_section, name);
  976. if (! r)
  977. return FALSE;
  978. }
  979. }
  980. return TRUE;
  981. }
  982. /* Function to set the ELF flag bits. */
  983. static bfd_boolean
  984. rl78_elf_set_private_flags (bfd * abfd, flagword flags)
  985. {
  986. elf_elfheader (abfd)->e_flags = flags;
  987. elf_flags_init (abfd) = TRUE;
  988. return TRUE;
  989. }
  990. static bfd_boolean no_warn_mismatch = FALSE;
  991. void bfd_elf32_rl78_set_target_flags (bfd_boolean);
  992. void
  993. bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
  994. {
  995. no_warn_mismatch = user_no_warn_mismatch;
  996. }
  997. static const char *
  998. rl78_cpu_name (flagword flags)
  999. {
  1000. switch (flags & E_FLAG_RL78_CPU_MASK)
  1001. {
  1002. default: return "";
  1003. case E_FLAG_RL78_G10: return "G10";
  1004. case E_FLAG_RL78_G13: return "G13";
  1005. case E_FLAG_RL78_G14: return "G14";
  1006. }
  1007. }
  1008. /* Merge backend specific data from an object file to the output
  1009. object file when linking. */
  1010. static bfd_boolean
  1011. rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
  1012. {
  1013. flagword new_flags;
  1014. flagword old_flags;
  1015. bfd_boolean error = FALSE;
  1016. new_flags = elf_elfheader (ibfd)->e_flags;
  1017. old_flags = elf_elfheader (obfd)->e_flags;
  1018. if (!elf_flags_init (obfd))
  1019. {
  1020. /* First call, no flags set. */
  1021. elf_flags_init (obfd) = TRUE;
  1022. elf_elfheader (obfd)->e_flags = new_flags;
  1023. }
  1024. else if (old_flags != new_flags)
  1025. {
  1026. flagword changed_flags = old_flags ^ new_flags;
  1027. if (changed_flags & E_FLAG_RL78_CPU_MASK)
  1028. {
  1029. flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
  1030. flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
  1031. if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
  1032. /* It does not matter what new_cpu may have. */;
  1033. else if (out_cpu == E_FLAG_RL78_ANY_CPU)
  1034. {
  1035. if (in_cpu == E_FLAG_RL78_G10)
  1036. {
  1037. /* G10 files can only be linked with other G10 files.
  1038. If the output is set to "any" this means that it is
  1039. a G14 file that does not use hardware multiply/divide,
  1040. but that is still incompatible with the G10 ABI. */
  1041. error = TRUE;
  1042. (*_bfd_error_handler)
  1043. (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
  1044. bfd_get_filename (ibfd),
  1045. rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
  1046. }
  1047. else
  1048. {
  1049. old_flags &= ~ E_FLAG_RL78_CPU_MASK;
  1050. old_flags |= in_cpu;
  1051. elf_elfheader (obfd)->e_flags = old_flags;
  1052. }
  1053. }
  1054. else
  1055. {
  1056. error = TRUE;
  1057. (*_bfd_error_handler)
  1058. (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
  1059. rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
  1060. rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
  1061. }
  1062. }
  1063. if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
  1064. {
  1065. (*_bfd_error_handler)
  1066. (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
  1067. if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
  1068. (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
  1069. bfd_get_filename (obfd), bfd_get_filename (ibfd));
  1070. else
  1071. (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
  1072. bfd_get_filename (ibfd), bfd_get_filename (obfd));
  1073. error = TRUE;
  1074. }
  1075. }
  1076. return !error;
  1077. }
  1078. static bfd_boolean
  1079. rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
  1080. {
  1081. FILE * file = (FILE *) ptr;
  1082. flagword flags;
  1083. BFD_ASSERT (abfd != NULL && ptr != NULL);
  1084. /* Print normal ELF private data. */
  1085. _bfd_elf_print_private_bfd_data (abfd, ptr);
  1086. flags = elf_elfheader (abfd)->e_flags;
  1087. fprintf (file, _("private flags = 0x%lx:"), (long) flags);
  1088. if (flags & E_FLAG_RL78_CPU_MASK)
  1089. fprintf (file, " [%s]", rl78_cpu_name (flags));
  1090. if (flags & E_FLAG_RL78_64BIT_DOUBLES)
  1091. fprintf (file, _(" [64-bit doubles]"));
  1092. fputc ('\n', file);
  1093. return TRUE;
  1094. }
  1095. /* Return the MACH for an e_flags value. */
  1096. static int
  1097. elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
  1098. {
  1099. return bfd_mach_rl78;
  1100. }
  1101. static bfd_boolean
  1102. rl78_elf_object_p (bfd * abfd)
  1103. {
  1104. bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
  1105. elf32_rl78_machine (abfd));
  1106. return TRUE;
  1107. }
  1108. /* support PLT for 16-bit references to 24-bit functions. */
  1109. /* We support 16-bit pointers to code above 64k by generating a thunk
  1110. below 64k containing a JMP instruction to the final address. */
  1111. static bfd_boolean
  1112. rl78_elf_check_relocs
  1113. (bfd * abfd,
  1114. struct bfd_link_info * info,
  1115. asection * sec,
  1116. const Elf_Internal_Rela * relocs)
  1117. {
  1118. Elf_Internal_Shdr * symtab_hdr;
  1119. struct elf_link_hash_entry ** sym_hashes;
  1120. const Elf_Internal_Rela * rel;
  1121. const Elf_Internal_Rela * rel_end;
  1122. bfd_vma *local_plt_offsets;
  1123. asection *splt;
  1124. bfd *dynobj;
  1125. if (bfd_link_relocatable (info))
  1126. return TRUE;
  1127. symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
  1128. sym_hashes = elf_sym_hashes (abfd);
  1129. local_plt_offsets = elf_local_got_offsets (abfd);
  1130. splt = NULL;
  1131. dynobj = elf_hash_table(info)->dynobj;
  1132. rel_end = relocs + sec->reloc_count;
  1133. for (rel = relocs; rel < rel_end; rel++)
  1134. {
  1135. struct elf_link_hash_entry *h;
  1136. unsigned long r_symndx;
  1137. bfd_vma *offset;
  1138. r_symndx = ELF32_R_SYM (rel->r_info);
  1139. if (r_symndx < symtab_hdr->sh_info)
  1140. h = NULL;
  1141. else
  1142. {
  1143. h = sym_hashes[r_symndx - symtab_hdr->sh_info];
  1144. while (h->root.type == bfd_link_hash_indirect
  1145. || h->root.type == bfd_link_hash_warning)
  1146. h = (struct elf_link_hash_entry *) h->root.u.i.link;
  1147. /* PR15323, ref flags aren't set for references in the same
  1148. object. */
  1149. h->root.non_ir_ref = 1;
  1150. }
  1151. switch (ELF32_R_TYPE (rel->r_info))
  1152. {
  1153. /* This relocation describes a 16-bit pointer to a function.
  1154. We may need to allocate a thunk in low memory; reserve memory
  1155. for it now. */
  1156. case R_RL78_DIR16S:
  1157. if (dynobj == NULL)
  1158. elf_hash_table (info)->dynobj = dynobj = abfd;
  1159. if (splt == NULL)
  1160. {
  1161. splt = bfd_get_linker_section (dynobj, ".plt");
  1162. if (splt == NULL)
  1163. {
  1164. flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
  1165. | SEC_IN_MEMORY | SEC_LINKER_CREATED
  1166. | SEC_READONLY | SEC_CODE);
  1167. splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
  1168. flags);
  1169. if (splt == NULL
  1170. || ! bfd_set_section_alignment (dynobj, splt, 1))
  1171. return FALSE;
  1172. }
  1173. }
  1174. if (h != NULL)
  1175. offset = &h->plt.offset;
  1176. else
  1177. {
  1178. if (local_plt_offsets == NULL)
  1179. {
  1180. size_t size;
  1181. unsigned int i;
  1182. size = symtab_hdr->sh_info * sizeof (bfd_vma);
  1183. local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
  1184. if (local_plt_offsets == NULL)
  1185. return FALSE;
  1186. elf_local_got_offsets (abfd) = local_plt_offsets;
  1187. for (i = 0; i < symtab_hdr->sh_info; i++)
  1188. local_plt_offsets[i] = (bfd_vma) -1;
  1189. }
  1190. offset = &local_plt_offsets[r_symndx];
  1191. }
  1192. if (*offset == (bfd_vma) -1)
  1193. {
  1194. *offset = splt->size;
  1195. splt->size += 4;
  1196. }
  1197. break;
  1198. }
  1199. }
  1200. return TRUE;
  1201. }
  1202. /* This must exist if dynobj is ever set. */
  1203. static bfd_boolean
  1204. rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
  1205. struct bfd_link_info *info)
  1206. {
  1207. bfd *dynobj;
  1208. asection *splt;
  1209. if (!elf_hash_table (info)->dynamic_sections_created)
  1210. return TRUE;
  1211. /* As an extra sanity check, verify that all plt entries have been
  1212. filled in. However, relaxing might have changed the relocs so
  1213. that some plt entries don't get filled in, so we have to skip
  1214. this check if we're relaxing. Unfortunately, check_relocs is
  1215. called before relaxation. */
  1216. if (info->relax_trip > 0)
  1217. return TRUE;
  1218. if ((dynobj = elf_hash_table (info)->dynobj) != NULL
  1219. && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
  1220. {
  1221. bfd_byte *contents = splt->contents;
  1222. unsigned int i, size = splt->size;
  1223. for (i = 0; i < size; i += 4)
  1224. {
  1225. unsigned int x = bfd_get_32 (dynobj, contents + i);
  1226. BFD_ASSERT (x != 0);
  1227. }
  1228. }
  1229. return TRUE;
  1230. }
  1231. static bfd_boolean
  1232. rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
  1233. struct bfd_link_info *info)
  1234. {
  1235. bfd *dynobj;
  1236. asection *splt;
  1237. if (bfd_link_relocatable (info))
  1238. return TRUE;
  1239. dynobj = elf_hash_table (info)->dynobj;
  1240. if (dynobj == NULL)
  1241. return TRUE;
  1242. splt = bfd_get_linker_section (dynobj, ".plt");
  1243. BFD_ASSERT (splt != NULL);
  1244. splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
  1245. if (splt->contents == NULL)
  1246. return FALSE;
  1247. return TRUE;
  1248. }
  1249. /* Handle relaxing. */
  1250. /* A subroutine of rl78_elf_relax_section. If the global symbol H
  1251. is within the low 64k, remove any entry for it in the plt. */
  1252. struct relax_plt_data
  1253. {
  1254. asection *splt;
  1255. bfd_boolean *again;
  1256. };
  1257. static bfd_boolean
  1258. rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
  1259. {
  1260. struct relax_plt_data *data = (struct relax_plt_data *) xdata;
  1261. if (h->plt.offset != (bfd_vma) -1)
  1262. {
  1263. bfd_vma address;
  1264. if (h->root.type == bfd_link_hash_undefined
  1265. || h->root.type == bfd_link_hash_undefweak)
  1266. address = 0;
  1267. else
  1268. address = (h->root.u.def.section->output_section->vma
  1269. + h->root.u.def.section->output_offset
  1270. + h->root.u.def.value);
  1271. if (valid_16bit_address (address))
  1272. {
  1273. h->plt.offset = -1;
  1274. data->splt->size -= 4;
  1275. *data->again = TRUE;
  1276. }
  1277. }
  1278. return TRUE;
  1279. }
  1280. /* A subroutine of rl78_elf_relax_section. If the global symbol H
  1281. previously had a plt entry, give it a new entry offset. */
  1282. static bfd_boolean
  1283. rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
  1284. {
  1285. bfd_vma *entry = (bfd_vma *) xdata;
  1286. if (h->plt.offset != (bfd_vma) -1)
  1287. {
  1288. h->plt.offset = *entry;
  1289. *entry += 4;
  1290. }
  1291. return TRUE;
  1292. }
  1293. static bfd_boolean
  1294. rl78_elf_relax_plt_section (bfd *dynobj,
  1295. asection *splt,
  1296. struct bfd_link_info *info,
  1297. bfd_boolean *again)
  1298. {
  1299. struct relax_plt_data relax_plt_data;
  1300. bfd *ibfd;
  1301. /* Assume nothing changes. */
  1302. *again = FALSE;
  1303. if (bfd_link_relocatable (info))
  1304. return TRUE;
  1305. /* We only relax the .plt section at the moment. */
  1306. if (dynobj != elf_hash_table (info)->dynobj
  1307. || strcmp (splt->name, ".plt") != 0)
  1308. return TRUE;
  1309. /* Quick check for an empty plt. */
  1310. if (splt->size == 0)
  1311. return TRUE;
  1312. /* Map across all global symbols; see which ones happen to
  1313. fall in the low 64k. */
  1314. relax_plt_data.splt = splt;
  1315. relax_plt_data.again = again;
  1316. elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
  1317. &relax_plt_data);
  1318. /* Likewise for local symbols, though that's somewhat less convenient
  1319. as we have to walk the list of input bfds and swap in symbol data. */
  1320. for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
  1321. {
  1322. bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
  1323. Elf_Internal_Shdr *symtab_hdr;
  1324. Elf_Internal_Sym *isymbuf = NULL;
  1325. unsigned int idx;
  1326. if (! local_plt_offsets)
  1327. continue;
  1328. symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
  1329. if (symtab_hdr->sh_info != 0)
  1330. {
  1331. isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
  1332. if (isymbuf == NULL)
  1333. isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
  1334. symtab_hdr->sh_info, 0,
  1335. NULL, NULL, NULL);
  1336. if (isymbuf == NULL)
  1337. return FALSE;
  1338. }
  1339. for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
  1340. {
  1341. Elf_Internal_Sym *isym;
  1342. asection *tsec;
  1343. bfd_vma address;
  1344. if (local_plt_offsets[idx] == (bfd_vma) -1)
  1345. continue;
  1346. isym = &isymbuf[idx];
  1347. if (isym->st_shndx == SHN_UNDEF)
  1348. continue;
  1349. else if (isym->st_shndx == SHN_ABS)
  1350. tsec = bfd_abs_section_ptr;
  1351. else if (isym->st_shndx == SHN_COMMON)
  1352. tsec = bfd_com_section_ptr;
  1353. else
  1354. tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
  1355. address = (tsec->output_section->vma
  1356. + tsec->output_offset
  1357. + isym->st_value);
  1358. if (valid_16bit_address (address))
  1359. {
  1360. local_plt_offsets[idx] = -1;
  1361. splt->size -= 4;
  1362. *again = TRUE;
  1363. }
  1364. }
  1365. if (isymbuf != NULL
  1366. && symtab_hdr->contents != (unsigned char *) isymbuf)
  1367. {
  1368. if (! info->keep_memory)
  1369. free (isymbuf);
  1370. else
  1371. {
  1372. /* Cache the symbols for elf_link_input_bfd. */
  1373. symtab_hdr->contents = (unsigned char *) isymbuf;
  1374. }
  1375. }
  1376. }
  1377. /* If we changed anything, walk the symbols again to reallocate
  1378. .plt entry addresses. */
  1379. if (*again && splt->size > 0)
  1380. {
  1381. bfd_vma entry = 0;
  1382. elf_link_hash_traverse (elf_hash_table (info),
  1383. rl78_relax_plt_realloc, &entry);
  1384. for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
  1385. {
  1386. bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
  1387. unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
  1388. unsigned int idx;
  1389. if (! local_plt_offsets)
  1390. continue;
  1391. for (idx = 0; idx < nlocals; ++idx)
  1392. if (local_plt_offsets[idx] != (bfd_vma) -1)
  1393. {
  1394. local_plt_offsets[idx] = entry;
  1395. entry += 4;
  1396. }
  1397. }
  1398. }
  1399. return TRUE;
  1400. }
  1401. /* Delete some bytes from a section while relaxing. */
  1402. static bfd_boolean
  1403. elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
  1404. Elf_Internal_Rela *alignment_rel, int force_snip)
  1405. {
  1406. Elf_Internal_Shdr * symtab_hdr;
  1407. unsigned int sec_shndx;
  1408. bfd_byte * contents;
  1409. Elf_Internal_Rela * irel;
  1410. Elf_Internal_Rela * irelend;
  1411. Elf_Internal_Sym * isym;
  1412. Elf_Internal_Sym * isymend;
  1413. bfd_vma toaddr;
  1414. unsigned int symcount;
  1415. struct elf_link_hash_entry ** sym_hashes;
  1416. struct elf_link_hash_entry ** end_hashes;
  1417. if (!alignment_rel)
  1418. force_snip = 1;
  1419. sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
  1420. contents = elf_section_data (sec)->this_hdr.contents;
  1421. /* The deletion must stop at the next alignment boundary, if
  1422. ALIGNMENT_REL is non-NULL. */
  1423. toaddr = sec->size;
  1424. if (alignment_rel)
  1425. toaddr = alignment_rel->r_offset;
  1426. irel = elf_section_data (sec)->relocs;
  1427. if (irel == NULL)
  1428. {
  1429. _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
  1430. irel = elf_section_data (sec)->relocs;
  1431. }
  1432. irelend = irel + sec->reloc_count;
  1433. /* Actually delete the bytes. */
  1434. memmove (contents + addr, contents + addr + count,
  1435. (size_t) (toaddr - addr - count));
  1436. /* If we don't have an alignment marker to worry about, we can just
  1437. shrink the section. Otherwise, we have to fill in the newly
  1438. created gap with NOP insns (0x03). */
  1439. if (force_snip)
  1440. sec->size -= count;
  1441. else
  1442. memset (contents + toaddr - count, 0x03, count);
  1443. /* Adjust all the relocs. */
  1444. for (; irel && irel < irelend; irel++)
  1445. {
  1446. /* Get the new reloc address. */
  1447. if (irel->r_offset > addr
  1448. && (irel->r_offset < toaddr
  1449. || (force_snip && irel->r_offset == toaddr)))
  1450. irel->r_offset -= count;
  1451. /* If we see an ALIGN marker at the end of the gap, we move it
  1452. to the beginning of the gap, since marking these gaps is what
  1453. they're for. */
  1454. if (irel->r_offset == toaddr
  1455. && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
  1456. && irel->r_addend & RL78_RELAXA_ALIGN)
  1457. irel->r_offset -= count;
  1458. }
  1459. /* Adjust the local symbols defined in this section. */
  1460. symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
  1461. isym = (Elf_Internal_Sym *) symtab_hdr->contents;
  1462. isymend = isym + symtab_hdr->sh_info;
  1463. for (; isym < isymend; isym++)
  1464. {
  1465. /* If the symbol is in the range of memory we just moved, we
  1466. have to adjust its value. */
  1467. if (isym->st_shndx == sec_shndx
  1468. && isym->st_value > addr
  1469. && isym->st_value < toaddr)
  1470. isym->st_value -= count;
  1471. /* If the symbol *spans* the bytes we just deleted (i.e. it's
  1472. *end* is in the moved bytes but it's *start* isn't), then we
  1473. must adjust its size. */
  1474. if (isym->st_shndx == sec_shndx
  1475. && isym->st_value < addr
  1476. && isym->st_value + isym->st_size > addr
  1477. && isym->st_value + isym->st_size < toaddr)
  1478. isym->st_size -= count;
  1479. }
  1480. /* Now adjust the global symbols defined in this section. */
  1481. symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
  1482. - symtab_hdr->sh_info);
  1483. sym_hashes = elf_sym_hashes (abfd);
  1484. end_hashes = sym_hashes + symcount;
  1485. for (; sym_hashes < end_hashes; sym_hashes++)
  1486. {
  1487. struct elf_link_hash_entry *sym_hash = *sym_hashes;
  1488. if ((sym_hash->root.type == bfd_link_hash_defined
  1489. || sym_hash->root.type == bfd_link_hash_defweak)
  1490. && sym_hash->root.u.def.section == sec)
  1491. {
  1492. /* As above, adjust the value if needed. */
  1493. if (sym_hash->root.u.def.value > addr
  1494. && sym_hash->root.u.def.value < toaddr)
  1495. sym_hash->root.u.def.value -= count;
  1496. /* As above, adjust the size if needed. */
  1497. if (sym_hash->root.u.def.value < addr
  1498. && sym_hash->root.u.def.value + sym_hash->size > addr
  1499. && sym_hash->root.u.def.value + sym_hash->size < toaddr)
  1500. sym_hash->size -= count;
  1501. }
  1502. }
  1503. return TRUE;
  1504. }
  1505. /* Used to sort relocs by address. If relocs have the same address,
  1506. we maintain their relative order, except that R_RL78_RH_RELAX
  1507. alignment relocs must be the first reloc for any given address. */
  1508. static void
  1509. reloc_bubblesort (Elf_Internal_Rela * r, int count)
  1510. {
  1511. int i;
  1512. bfd_boolean again;
  1513. bfd_boolean swappit;
  1514. /* This is almost a classic bubblesort. It's the slowest sort, but
  1515. we're taking advantage of the fact that the relocations are
  1516. mostly in order already (the assembler emits them that way) and
  1517. we need relocs with the same address to remain in the same
  1518. relative order. */
  1519. again = TRUE;
  1520. while (again)
  1521. {
  1522. again = FALSE;
  1523. for (i = 0; i < count - 1; i ++)
  1524. {
  1525. if (r[i].r_offset > r[i + 1].r_offset)
  1526. swappit = TRUE;
  1527. else if (r[i].r_offset < r[i + 1].r_offset)
  1528. swappit = FALSE;
  1529. else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
  1530. && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
  1531. swappit = TRUE;
  1532. else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
  1533. && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
  1534. && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
  1535. && (r[i].r_addend & RL78_RELAXA_ALIGN)))
  1536. swappit = TRUE;
  1537. else
  1538. swappit = FALSE;
  1539. if (swappit)
  1540. {
  1541. Elf_Internal_Rela tmp;
  1542. tmp = r[i];
  1543. r[i] = r[i + 1];
  1544. r[i + 1] = tmp;
  1545. /* If we do move a reloc back, re-scan to see if it
  1546. needs to be moved even further back. This avoids
  1547. most of the O(n^2) behavior for our cases. */
  1548. if (i > 0)
  1549. i -= 2;
  1550. again = TRUE;
  1551. }
  1552. }
  1553. }
  1554. }
  1555. #define OFFSET_FOR_RELOC(rel, lrel, scale) \
  1556. rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
  1557. lrel, abfd, sec, link_info, scale)
  1558. static bfd_vma
  1559. rl78_offset_for_reloc (bfd * abfd,
  1560. Elf_Internal_Rela * rel,
  1561. Elf_Internal_Shdr * symtab_hdr,
  1562. Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
  1563. Elf_Internal_Sym * intsyms,
  1564. Elf_Internal_Rela ** lrel,
  1565. bfd * input_bfd,
  1566. asection * input_section,
  1567. struct bfd_link_info * info,
  1568. int * scale)
  1569. {
  1570. bfd_vma symval;
  1571. *scale = 1;
  1572. /* REL is the first of 1..N relocations. We compute the symbol
  1573. value for each relocation, then combine them if needed. LREL
  1574. gets a pointer to the last relocation used. */
  1575. while (1)
  1576. {
  1577. unsigned long r_type;
  1578. /* Get the value of the symbol referred to by the reloc. */
  1579. if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
  1580. {
  1581. /* A local symbol. */
  1582. Elf_Internal_Sym *isym;
  1583. asection *ssec;
  1584. isym = intsyms + ELF32_R_SYM (rel->r_info);
  1585. if (isym->st_shndx == SHN_UNDEF)
  1586. ssec = bfd_und_section_ptr;
  1587. else if (isym->st_shndx == SHN_ABS)
  1588. ssec = bfd_abs_section_ptr;
  1589. else if (isym->st_shndx == SHN_COMMON)
  1590. ssec = bfd_com_section_ptr;
  1591. else
  1592. ssec = bfd_section_from_elf_index (abfd,
  1593. isym->st_shndx);
  1594. /* Initial symbol value. */
  1595. symval = isym->st_value;
  1596. /* GAS may have made this symbol relative to a section, in
  1597. which case, we have to add the addend to find the
  1598. symbol. */
  1599. if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
  1600. symval += rel->r_addend;
  1601. if (ssec)
  1602. {
  1603. if ((ssec->flags & SEC_MERGE)
  1604. && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
  1605. symval = _bfd_merged_section_offset (abfd, & ssec,
  1606. elf_section_data (ssec)->sec_info,
  1607. symval);
  1608. }
  1609. /* Now make the offset relative to where the linker is putting it. */
  1610. if (ssec)
  1611. symval +=
  1612. ssec->output_section->vma + ssec->output_offset;
  1613. symval += rel->r_addend;
  1614. }
  1615. else
  1616. {
  1617. unsigned long indx;
  1618. struct elf_link_hash_entry * h;
  1619. /* An external symbol. */
  1620. indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
  1621. h = elf_sym_hashes (abfd)[indx];
  1622. BFD_ASSERT (h != NULL);
  1623. if (h->root.type != bfd_link_hash_defined
  1624. && h->root.type != bfd_link_hash_defweak)
  1625. {
  1626. /* This appears to be a reference to an undefined
  1627. symbol. Just ignore it--it will be caught by the
  1628. regular reloc processing. */
  1629. if (lrel)
  1630. *lrel = rel;
  1631. return 0;
  1632. }
  1633. symval = (h->root.u.def.value
  1634. + h->root.u.def.section->output_section->vma
  1635. + h->root.u.def.section->output_offset);
  1636. symval += rel->r_addend;
  1637. }
  1638. r_type = ELF32_R_TYPE (rel->r_info);
  1639. switch (r_type)
  1640. {
  1641. case R_RL78_SYM:
  1642. (void) rl78_compute_complex_reloc (r_type, symval, input_section);
  1643. break;
  1644. case R_RL78_OPromtop:
  1645. symval = get_romstart (NULL, info, input_bfd, input_section, rel->r_offset);
  1646. (void) rl78_compute_complex_reloc (r_type, symval, input_section);
  1647. break;
  1648. case R_RL78_OPramtop:
  1649. symval = get_ramstart (NULL, info, input_bfd, input_section, rel->r_offset);
  1650. (void) rl78_compute_complex_reloc (r_type, symval, input_section);
  1651. break;
  1652. case R_RL78_OPneg:
  1653. case R_RL78_OPadd:
  1654. case R_RL78_OPsub:
  1655. case R_RL78_OPmul:
  1656. case R_RL78_OPdiv:
  1657. case R_RL78_OPshla:
  1658. case R_RL78_OPshra:
  1659. case R_RL78_OPsctsize:
  1660. case R_RL78_OPscttop:
  1661. case R_RL78_OPand:
  1662. case R_RL78_OPor:
  1663. case R_RL78_OPxor:
  1664. case R_RL78_OPnot:
  1665. case R_RL78_OPmod:
  1666. (void) rl78_compute_complex_reloc (r_type, 0, input_section);
  1667. break;
  1668. case R_RL78_DIR16UL:
  1669. case R_RL78_DIR8UL:
  1670. case R_RL78_ABS16UL:
  1671. case R_RL78_ABS8UL:
  1672. *scale = 4;
  1673. goto reloc_computes_value;
  1674. case R_RL78_DIR16UW:
  1675. case R_RL78_DIR8UW:
  1676. case R_RL78_ABS16UW:
  1677. case R_RL78_ABS8UW:
  1678. *scale = 2;
  1679. goto reloc_computes_value;
  1680. default:
  1681. reloc_computes_value:
  1682. symval = rl78_compute_complex_reloc (r_type, 0, input_section);
  1683. if (lrel)
  1684. *lrel = rel;
  1685. return symval;
  1686. }
  1687. rel ++;
  1688. }
  1689. }
  1690. struct {
  1691. int prefix; /* or -1 for "no prefix" */
  1692. int insn; /* or -1 for "end of list" */
  1693. int insn_for_saddr; /* or -1 for "no alternative" */
  1694. int insn_for_sfr; /* or -1 for "no alternative" */
  1695. } relax_addr16[] = {
  1696. { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
  1697. { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
  1698. { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
  1699. { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
  1700. { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
  1701. { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
  1702. { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
  1703. { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
  1704. { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
  1705. { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
  1706. { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
  1707. { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
  1708. { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
  1709. { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
  1710. { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
  1711. { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
  1712. { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
  1713. { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
  1714. { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
  1715. { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
  1716. { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
  1717. { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
  1718. { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
  1719. { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
  1720. { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
  1721. { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
  1722. { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
  1723. { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
  1724. { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
  1725. { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
  1726. { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
  1727. { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
  1728. { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
  1729. { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
  1730. { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
  1731. { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
  1732. { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
  1733. { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
  1734. { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
  1735. { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
  1736. { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
  1737. { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
  1738. { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
  1739. { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
  1740. { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
  1741. { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
  1742. { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
  1743. { -1, -1, -1, -1 }
  1744. };
  1745. /* Relax one section. */
  1746. static bfd_boolean
  1747. rl78_elf_relax_section
  1748. (bfd * abfd,
  1749. asection * sec,
  1750. struct bfd_link_info * link_info,
  1751. bfd_boolean * again)
  1752. {
  1753. Elf_Internal_Shdr * symtab_hdr;
  1754. Elf_Internal_Shdr * shndx_hdr;
  1755. Elf_Internal_Rela * internal_relocs;
  1756. Elf_Internal_Rela * free_relocs = NULL;
  1757. Elf_Internal_Rela * irel;
  1758. Elf_Internal_Rela * srel;
  1759. Elf_Internal_Rela * irelend;
  1760. Elf_Internal_Rela * next_alignment;
  1761. bfd_byte * contents = NULL;
  1762. bfd_byte * free_contents = NULL;
  1763. Elf_Internal_Sym * intsyms = NULL;
  1764. Elf_Internal_Sym * free_intsyms = NULL;
  1765. Elf_External_Sym_Shndx * shndx_buf = NULL;
  1766. bfd_vma pc;
  1767. bfd_vma symval ATTRIBUTE_UNUSED = 0;
  1768. int pcrel ATTRIBUTE_UNUSED = 0;
  1769. int code ATTRIBUTE_UNUSED = 0;
  1770. int section_alignment_glue;
  1771. int scale;
  1772. if (abfd == elf_hash_table (link_info)->dynobj
  1773. && strcmp (sec->name, ".plt") == 0)
  1774. return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
  1775. /* Assume nothing changes. */
  1776. *again = FALSE;
  1777. /* We don't have to do anything for a relocatable link, if
  1778. this section does not have relocs, or if this is not a
  1779. code section. */
  1780. if (bfd_link_relocatable (link_info)
  1781. || (sec->flags & SEC_RELOC) == 0
  1782. || sec->reloc_count == 0
  1783. || (sec->flags & SEC_CODE) == 0)
  1784. return TRUE;
  1785. symtab_hdr = & elf_symtab_hdr (abfd);
  1786. if (elf_symtab_shndx_list (abfd))
  1787. shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
  1788. else
  1789. shndx_hdr = NULL;
  1790. /* Get the section contents. */
  1791. if (elf_section_data (sec)->this_hdr.contents != NULL)
  1792. contents = elf_section_data (sec)->this_hdr.contents;
  1793. /* Go get them off disk. */
  1794. else
  1795. {
  1796. if (! bfd_malloc_and_get_section (abfd, sec, &contents))
  1797. goto error_return;
  1798. elf_section_data (sec)->this_hdr.contents = contents;
  1799. }
  1800. /* Read this BFD's symbols. */
  1801. /* Get cached copy if it exists. */
  1802. if (symtab_hdr->contents != NULL)
  1803. intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
  1804. else
  1805. {
  1806. intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
  1807. symtab_hdr->contents = (bfd_byte *) intsyms;
  1808. }
  1809. if (shndx_hdr && shndx_hdr->sh_size != 0)
  1810. {
  1811. bfd_size_type amt;
  1812. amt = symtab_hdr->sh_info;
  1813. amt *= sizeof (Elf_External_Sym_Shndx);
  1814. shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
  1815. if (shndx_buf == NULL)
  1816. goto error_return;
  1817. if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
  1818. || bfd_bread (shndx_buf, amt, abfd) != amt)
  1819. goto error_return;
  1820. shndx_hdr->contents = (bfd_byte *) shndx_buf;
  1821. }
  1822. /* Get a copy of the native relocations. */
  1823. internal_relocs = (_bfd_elf_link_read_relocs
  1824. (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
  1825. link_info->keep_memory));
  1826. if (internal_relocs == NULL)
  1827. goto error_return;
  1828. if (! link_info->keep_memory)
  1829. free_relocs = internal_relocs;
  1830. /* The RL_ relocs must be just before the operand relocs they go
  1831. with, so we must sort them to guarantee this. We use bubblesort
  1832. instead of qsort so we can guarantee that relocs with the same
  1833. address remain in the same relative order. */
  1834. reloc_bubblesort (internal_relocs, sec->reloc_count);
  1835. /* Walk through them looking for relaxing opportunities. */
  1836. irelend = internal_relocs + sec->reloc_count;
  1837. /* This will either be NULL or a pointer to the next alignment
  1838. relocation. */
  1839. next_alignment = internal_relocs;
  1840. /* We calculate worst case shrinkage caused by alignment directives.
  1841. No fool-proof, but better than either ignoring the problem or
  1842. doing heavy duty analysis of all the alignment markers in all
  1843. input sections. */
  1844. section_alignment_glue = 0;
  1845. for (irel = internal_relocs; irel < irelend; irel++)
  1846. if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
  1847. && irel->r_addend & RL78_RELAXA_ALIGN)
  1848. {
  1849. int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
  1850. if (section_alignment_glue < this_glue)
  1851. section_alignment_glue = this_glue;
  1852. }
  1853. /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
  1854. shrinkage. */
  1855. section_alignment_glue *= 2;
  1856. for (irel = internal_relocs; irel < irelend; irel++)
  1857. {
  1858. unsigned char *insn;
  1859. int nrelocs;
  1860. /* The insns we care about are all marked with one of these. */
  1861. if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
  1862. continue;
  1863. if (irel->r_addend & RL78_RELAXA_ALIGN
  1864. || next_alignment == internal_relocs)
  1865. {
  1866. /* When we delete bytes, we need to maintain all the alignments
  1867. indicated. In addition, we need to be careful about relaxing
  1868. jumps across alignment boundaries - these displacements
  1869. *grow* when we delete bytes. For now, don't shrink
  1870. displacements across an alignment boundary, just in case.
  1871. Note that this only affects relocations to the same
  1872. section. */
  1873. next_alignment += 2;
  1874. while (next_alignment < irelend
  1875. && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
  1876. || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
  1877. next_alignment ++;
  1878. if (next_alignment >= irelend || next_alignment->r_offset == 0)
  1879. next_alignment = NULL;
  1880. }
  1881. /* When we hit alignment markers, see if we've shrunk enough
  1882. before them to reduce the gap without violating the alignment
  1883. requirements. */
  1884. if (irel->r_addend & RL78_RELAXA_ALIGN)
  1885. {
  1886. /* At this point, the next relocation *should* be the ELIGN
  1887. end marker. */
  1888. Elf_Internal_Rela *erel = irel + 1;
  1889. unsigned int alignment, nbytes;
  1890. if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
  1891. continue;
  1892. if (!(erel->r_addend & RL78_RELAXA_ELIGN))
  1893. continue;
  1894. alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
  1895. if (erel->r_offset - irel->r_offset < alignment)
  1896. continue;
  1897. nbytes = erel->r_offset - irel->r_offset;
  1898. nbytes /= alignment;
  1899. nbytes *= alignment;
  1900. elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
  1901. next_alignment, erel->r_offset == sec->size);
  1902. *again = TRUE;
  1903. continue;
  1904. }
  1905. if (irel->r_addend & RL78_RELAXA_ELIGN)
  1906. continue;
  1907. insn = contents + irel->r_offset;
  1908. nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
  1909. /* At this point, we have an insn that is a candidate for linker
  1910. relaxation. There are NRELOCS relocs following that may be
  1911. relaxed, although each reloc may be made of more than one
  1912. reloc entry (such as gp-rel symbols). */
  1913. /* Get the value of the symbol referred to by the reloc. Just
  1914. in case this is the last reloc in the list, use the RL's
  1915. addend to choose between this reloc (no addend) or the next
  1916. (yes addend, which means at least one following reloc). */
  1917. /* srel points to the "current" reloction for this insn -
  1918. actually the last reloc for a given operand, which is the one
  1919. we need to update. We check the relaxations in the same
  1920. order that the relocations happen, so we'll just push it
  1921. along as we go. */
  1922. srel = irel;
  1923. pc = sec->output_section->vma + sec->output_offset
  1924. + srel->r_offset;
  1925. #define GET_RELOC \
  1926. BFD_ASSERT (nrelocs > 0); \
  1927. symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
  1928. pcrel = symval - pc + srel->r_addend; \
  1929. nrelocs --;
  1930. #define SNIPNR(offset, nbytes) \
  1931. elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
  1932. #define SNIP(offset, nbytes, newtype) \
  1933. SNIPNR (offset, nbytes); \
  1934. srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
  1935. /* The order of these bit tests must match the order that the
  1936. relocs appear in. Since we sorted those by offset, we can
  1937. predict them. */
  1938. /*----------------------------------------------------------------------*/
  1939. /* EF ad BR $rel8 pcrel
  1940. ED al ah BR !abs16 abs
  1941. EE al ah BR $!rel16 pcrel
  1942. EC al ah as BR !!abs20 abs
  1943. FD al ah CALL !abs16 abs
  1944. FE al ah CALL $!rel16 pcrel
  1945. FC al ah as CALL !!abs20 abs
  1946. DC ad BC $rel8
  1947. DE ad BNC $rel8
  1948. DD ad BZ $rel8
  1949. DF ad BNZ $rel8
  1950. 61 C3 ad BH $rel8
  1951. 61 D3 ad BNH $rel8
  1952. 61 C8 EF ad SKC ; BR $rel8
  1953. 61 D8 EF ad SKNC ; BR $rel8
  1954. 61 E8 EF ad SKZ ; BR $rel8
  1955. 61 F8 EF ad SKNZ ; BR $rel8
  1956. 61 E3 EF ad SKH ; BR $rel8
  1957. 61 F3 EF ad SKNH ; BR $rel8
  1958. */
  1959. if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
  1960. {
  1961. /* SKIP opcodes that skip non-branches will have a relax tag
  1962. but no corresponding symbol to relax against; we just
  1963. skip those. */
  1964. if (irel->r_addend & RL78_RELAXA_RNUM)
  1965. {
  1966. GET_RELOC;
  1967. }
  1968. switch (insn[0])
  1969. {
  1970. case 0xec: /* BR !!abs20 */
  1971. if (pcrel < 127
  1972. && pcrel > -127)
  1973. {
  1974. insn[0] = 0xef;
  1975. insn[1] = pcrel;
  1976. SNIP (2, 2, R_RL78_DIR8S_PCREL);
  1977. *again = TRUE;
  1978. }
  1979. else if (symval < 65536)
  1980. {
  1981. insn[0] = 0xed;
  1982. insn[1] = symval & 0xff;
  1983. insn[2] = symval >> 8;
  1984. SNIP (2, 1, R_RL78_DIR16S);
  1985. *again = TRUE;
  1986. }
  1987. else if (pcrel < 32767
  1988. && pcrel > -32767)
  1989. {
  1990. insn[0] = 0xee;
  1991. insn[1] = pcrel & 0xff;
  1992. insn[2] = pcrel >> 8;
  1993. SNIP (2, 1, R_RL78_DIR16S_PCREL);
  1994. *again = TRUE;
  1995. }
  1996. break;
  1997. case 0xee: /* BR $!pcrel16 */
  1998. case 0xed: /* BR $!abs16 */
  1999. if (pcrel < 127
  2000. && pcrel > -127)
  2001. {
  2002. insn[0] = 0xef;
  2003. insn[1] = pcrel;
  2004. SNIP (2, 1, R_RL78_DIR8S_PCREL);
  2005. *again = TRUE;
  2006. }
  2007. break;
  2008. case 0xfc: /* CALL !!abs20 */
  2009. if (symval < 65536)
  2010. {
  2011. insn[0] = 0xfd;
  2012. insn[1] = symval & 0xff;
  2013. insn[2] = symval >> 8;
  2014. SNIP (2, 1, R_RL78_DIR16S);
  2015. *again = TRUE;
  2016. }
  2017. else if (pcrel < 32767
  2018. && pcrel > -32767)
  2019. {
  2020. insn[0] = 0xfe;
  2021. insn[1] = pcrel & 0xff;
  2022. insn[2] = pcrel >> 8;
  2023. SNIP (2, 1, R_RL78_DIR16S_PCREL);
  2024. *again = TRUE;
  2025. }
  2026. break;
  2027. case 0x61: /* PREFIX */
  2028. /* For SKIP/BR, we change the BR opcode and delete the
  2029. SKIP. That way, we don't have to find and change the
  2030. relocation for the BR. */
  2031. /* Note that, for the case where we're skipping some
  2032. other insn, we have no "other" reloc but that's safe
  2033. here anyway. */
  2034. switch (insn[1])
  2035. {
  2036. case 0xc8: /* SKC */
  2037. if (insn[2] == 0xef)
  2038. {
  2039. insn[2] = 0xde; /* BNC */
  2040. SNIPNR (0, 2);
  2041. }
  2042. break;
  2043. case 0xd8: /* SKNC */
  2044. if (insn[2] == 0xef)
  2045. {
  2046. insn[2] = 0xdc; /* BC */
  2047. SNIPNR (0, 2);
  2048. }
  2049. break;
  2050. case 0xe8: /* SKZ */
  2051. if (insn[2] == 0xef)
  2052. {
  2053. insn[2] = 0xdf; /* BNZ */
  2054. SNIPNR (0, 2);
  2055. }
  2056. break;
  2057. case 0xf8: /* SKNZ */
  2058. if (insn[2] == 0xef)
  2059. {
  2060. insn[2] = 0xdd; /* BZ */
  2061. SNIPNR (0, 2);
  2062. }
  2063. break;
  2064. case 0xe3: /* SKH */
  2065. if (insn[2] == 0xef)
  2066. {
  2067. insn[2] = 0xd3; /* BNH */
  2068. SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
  2069. }
  2070. break;
  2071. case 0xf3: /* SKNH */
  2072. if (insn[2] == 0xef)
  2073. {
  2074. insn[2] = 0xc3; /* BH */
  2075. SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
  2076. }
  2077. break;
  2078. }
  2079. break;
  2080. }
  2081. }
  2082. if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
  2083. && nrelocs > 0)
  2084. {
  2085. /*----------------------------------------------------------------------*/
  2086. /* Some insns have both a 16-bit address operand and an 8-bit
  2087. variant if the address is within a special range:
  2088. Address 16-bit operand SADDR range SFR range
  2089. FFF00-FFFFF 0xff00-0xffff 0x00-0xff
  2090. FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
  2091. The RELAX_ADDR16[] array has the insn encodings for the
  2092. 16-bit operand version, as well as the SFR and SADDR
  2093. variants. We only need to replace the encodings and
  2094. adjust the operand.
  2095. Note: we intentionally do not attempt to decode and skip
  2096. any ES: prefix, as adding ES: means the addr16 (likely)
  2097. no longer points to saddr/sfr space.
  2098. */
  2099. int is_sfr;
  2100. int is_saddr;
  2101. int idx;
  2102. int poff;
  2103. GET_RELOC;
  2104. if (0xffe20 <= symval && symval <= 0xfffff)
  2105. {
  2106. is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
  2107. is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
  2108. for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
  2109. {
  2110. if (relax_addr16[idx].prefix != -1
  2111. && insn[0] == relax_addr16[idx].prefix
  2112. && insn[1] == relax_addr16[idx].insn)
  2113. {
  2114. poff = 1;
  2115. }
  2116. else if (relax_addr16[idx].prefix == -1
  2117. && insn[0] == relax_addr16[idx].insn)
  2118. {
  2119. poff = 0;
  2120. }
  2121. else
  2122. continue;
  2123. /* We have a matched insn, and poff is 0 or 1 depending
  2124. on the base pattern size. */
  2125. if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
  2126. {
  2127. insn[poff] = relax_addr16[idx].insn_for_sfr;
  2128. SNIP (poff+2, 1, R_RL78_RH_SFR);
  2129. }
  2130. else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
  2131. {
  2132. insn[poff] = relax_addr16[idx].insn_for_saddr;
  2133. SNIP (poff+2, 1, R_RL78_RH_SADDR);
  2134. }
  2135. }
  2136. }
  2137. }
  2138. /*----------------------------------------------------------------------*/
  2139. }
  2140. return TRUE;
  2141. error_return:
  2142. if (free_relocs != NULL)
  2143. free (free_relocs);
  2144. if (free_contents != NULL)
  2145. free (free_contents);
  2146. if (shndx_buf != NULL)
  2147. {
  2148. shndx_hdr->contents = NULL;
  2149. free (shndx_buf);
  2150. }
  2151. if (free_intsyms != NULL)
  2152. free (free_intsyms);
  2153. return TRUE;
  2154. }
  2155. #define ELF_ARCH bfd_arch_rl78
  2156. #define ELF_MACHINE_CODE EM_RL78
  2157. #define ELF_MAXPAGESIZE 0x1000
  2158. #define TARGET_LITTLE_SYM rl78_elf32_vec
  2159. #define TARGET_LITTLE_NAME "elf32-rl78"
  2160. #define elf_info_to_howto_rel NULL
  2161. #define elf_info_to_howto rl78_info_to_howto_rela
  2162. #define elf_backend_object_p rl78_elf_object_p
  2163. #define elf_backend_relocate_section rl78_elf_relocate_section
  2164. #define elf_symbol_leading_char ('_')
  2165. #define elf_backend_can_gc_sections 1
  2166. #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
  2167. #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
  2168. #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
  2169. #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
  2170. #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
  2171. #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
  2172. #define elf_backend_check_relocs rl78_elf_check_relocs
  2173. #define elf_backend_always_size_sections \
  2174. rl78_elf_always_size_sections
  2175. #define elf_backend_finish_dynamic_sections \
  2176. rl78_elf_finish_dynamic_sections
  2177. #include "elf32-target.h"