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  1. <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
    2. 

  2. "http://www.w3.org/TR/html4/strict.dtd">
    3. 

  3. <html>
    4. 

  4.  <head>
    5. 

  5.   <meta http-equiv="Content-Type" content="text/html;charset=ISO-8859-1">
    6. 

  6.   <meta http-equiv="Content-Style-Type" content="text/css">
    7. 

  7.   <title>The 6502 Instruction Set Decoded</title>
    8. 

  8.   <style type="text/css"><!--
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  9. body { color: black; background: white; font-size: 12pt }
    10. 

  10. p, h1, h2, h3, td, li { font-family: sans-serif }
    11. 

  11. a:link { color: #0000EE }
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  12. a:visited { color: #551A8B }
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  13. table { text-align: center }
    14. 

  14. .small { font-size: smaller }
    15. 

  15. .p02 { background: lime }
    16. 

  16. .pc02 { background: yellow }
    17. 

  17. .p816 { background: red }
    18. 

  18.   --></style>
    19. 

  19.  </head>
    20. 

  20.  <body>
    21. 

  21.   <p><a href="http://www.llx.com/">LLX</a> &gt;
    22. 

  22.    <a href="/~nparker/">Neil Parker</a> &gt;
    23. 

  23.    <a href="index.html">Apple II</a> &gt; 6502 Instruction Set</p>
    24. 

  24.   <h1>The 6502/65C02/65C816 Instruction Set Decoded</h1>
    25. 

  25.   <h2>Introduction</h2>
    26. 

  26.   <p>
    27. 

  27.    Though the 6502 instruction set has a number of quirks and
    28. 

  28.    irregularities, large portions of it can be broken up into regular
    29. 

  29.    patterns.  An understanding of these patterns can be beneficial to
    30. 

  30.    authors of assemblers or disassemblers for 6502 code--for example, the
    31. 

  31.    Apple II ROM uses the information described below to greatly reduce the
    32. 

  32.    size of the instruction tables used by the built-in machine language
    33. 

  33.    disassembler.
    34. 

  34.   </p>
    35. 

  35.   <p>
    36. 

  36.    Note that the discussion below assumes a knowledge of 6502
    37. 

  37.    programming.  If you're looking for a tutorial or general programming
    38. 

  38.    reference for the 6502, I recommend starting at <a
    39. 

  39.    href="http://www.6502.org">6502.org</a>.  There are also some useful
    40. 

  40.    documents at <a href="http://www.westerndesigncenter.com">Western
    41. 

  41.    Design Center</a>.
    42. 

  42.   </p>
    43. 

  43.   <ul>
    44. 

  44.    <li><a href="#chart">Instruction Chart</a></li>
    45. 

  45.    <li><a href="#ins02">6502 Instructions</a></li>
    46. 

  46.    <li><a href="#insc02">65C02 Instructions</a></li>
    47. 

  47.    <li><a href="#ins816">65C816 Instructions</a></li>
    48. 

  48.   </ul>
    49. 

  49.   <h2><a name="chart">Instruction Chart</a></h2>
    50. 

  50.   <p>
    51. 

  51.    Shown below are the instructions of the 6502, 65C02, and 65C816 processors.
    52. 

  52.    <span class="p02">GREEN UPPERCASE</span> indicates instructions found on
    53. 

  53.    all processors; <span class="pc02">Yellow Mixed Case</span> indicates
    54. 

  54.    instructions introduced on the 65C02, and <span class="p816">red
    55. 

  55.    lowercase</span> indicates instructions found only on the 65C816.  The bit
    56. 

  56.    manipulation instructions found only on the Rockwell and WDC versions of
    57. 

  57.    the 65C02 are not included in the table, nor are the "undocumented"
    58. 

  58.    instructions of the original 6502.  (However, after noting the search
    59. 

  59.    engine strings commonly used to locate this page, I have added discussions
    60. 

  60.    of these points below.)
    61. 

  61.   </p>
    62. 

  62.   <table border=1 class="small">
    63. 

  63.    <tr>
    64. 

  64.     <td>&nbsp;</td>
    65. 

  65.     <td>x0</td>
    66. 

  66.     <td>x1</td>
    67. 

  67.     <td>x2</td>
    68. 

  68.     <td>x3</td>
    69. 

  69.     <td>x4</td>
    70. 

  70.     <td>x5</td>
    71. 

  71.     <td>x6</td>
    72. 

  72.     <td>x7</td>
    73. 

  73.     <td>x8</td>
    74. 

  74.     <td>x9</td>
    75. 

  75.     <td>xA</td>
    76. 

  76.     <td>xB</td>
    77. 

  77.     <td>xC</td>
    78. 

  78.     <td>xD</td>
    79. 

  79.     <td>xE</td>
    80. 

  80.     <td>xF</td>
    81. 

  81.    </tr>
    82. 

  82.    <tr>
    83. 

  83.     <td>0x</td>
    84. 

  84.     <td class="p02">BRK b</td>
    85. 

  85.     <td class="p02">ORA (d,X)</td>
    86. 

  86.     <td class="p816">cop b</td>
    87. 

  87.     <td class="p816">ora d,S</td>
    88. 

  88.     <td class="pc02">Tsb d</td>
    89. 

  89.     <td class="p02">ORA d</td>
    90. 

  90.     <td class="p02">ASL d</td>
    91. 

  91.     <td class="p816">ora [d]</td>
    92. 

  92.     <td class="p02">PHP</td>
    93. 

  93.     <td class="p02">ORA #</td>
    94. 

  94.     <td class="p02">ASL A</td>
    95. 

  95.     <td class="p816">phd</td>
    96. 

  96.     <td class="pc02">Tsb a</td>
    97. 

  97.     <td class="p02">ORA a</td>
    98. 

  98.     <td class="p02">ASL a</td>
    99. 

  99.     <td class="p816">ora al</td>
    100. 

  100.    </tr>
    101. 

  101.    <tr>
    102. 

  102.     <td>1x</td>
    103. 

  103.     <td class="p02">BPL r</td>
    104. 

  104.     <td class="p02">ORA (d),Y</td>
    105. 

  105.     <td class="pc02">Ora (d)</td>
    106. 

  106.     <td class="p816">ora (d,S),Y</td>
    107. 

  107.     <td class="pc02">Trb d</td>
    108. 

  108.     <td class="p02">ORA d,X</td>
    109. 

  109.     <td class="p02">ASL d,X</td>
    110. 

  110.     <td class="p816">ora [d],Y</td>
    111. 

  111.     <td class="p02">CLC</td>
    112. 

  112.     <td class="p02">ORA a,Y</td>
    113. 

  113.     <td class="pc02">Inc A</td>
    114. 

  114.     <td class="p816">tcs</td>
    115. 

  115.     <td class="pc02">Trb a</td>
    116. 

  116.     <td class="p02">ORA a,X</td>
    117. 

  117.     <td class="p02">ASL a,X</td>
    118. 

  118.     <td class="p816">ora al,X</td>
    119. 

  119.    </tr>
    120. 

  120.    <tr>
    121. 

  121.     <td>2x</td>
    122. 

  122.     <td class="p02">JSR a</td>
    123. 

  123.     <td class="p02">AND (d,X)</td>
    124. 

  124.     <td class="p816">jsl al</td>
    125. 

  125.     <td class="p816">and d,S</td>
    126. 

  126.     <td class="p02">BIT d</td>
    127. 

  127.     <td class="p02">AND d</td>
    128. 

  128.     <td class="p02">ROL d</td>
    129. 

  129.     <td class="p816">and [d]</td>
    130. 

  130.     <td class="p02">PLP</td>
    131. 

  131.     <td class="p02">AND #</td>
    132. 

  132.     <td class="p02">ROL A</td>
    133. 

  133.     <td class="p816">pld</td>
    134. 

  134.     <td class="p02">BIT a</td>
    135. 

  135.     <td class="p02">AND a</td>
    136. 

  136.     <td class="p02">ROL a</td>
    137. 

  137.     <td class="p816">and al</td>
    138. 

  138.    </tr>
    139. 

  139.    <tr>
    140. 

  140.     <td>3x</td>
    141. 

  141.     <td class="p02">BMI r</td>
    142. 

  142.     <td class="p02">AND (d),Y</td>
    143. 

  143.     <td class="pc02">And (d)</td>
    144. 

  144.     <td class="p816">and (d,S),Y</td>
    145. 

  145.     <td class="pc02">Bit d,X</td>
    146. 

  146.     <td class="p02">AND d,X</td>
    147. 

  147.     <td class="p02">ROL d,X</td>
    148. 

  148.     <td class="p816">and [d],Y</td>
    149. 

  149.     <td class="p02">SEC</td>
    150. 

  150.     <td class="p02">AND a,Y</td>
    151. 

  151.     <td class="pc02">Dec A</td>
    152. 

  152.     <td class="p816">tsc</td>
    153. 

  153.     <td class="pc02">Bit a,X</td>
    154. 

  154.     <td class="p02">AND a,X</td>
    155. 

  155.     <td class="p02">ROL a,X</td>
    156. 

  156.     <td class="p816">and al,X</td>
    157. 

  157.    </tr>
    158. 

  158.    <tr>
    159. 

  159.     <td>4x</td>
    160. 

  160.     <td class="p02">RTI</td>
    161. 

  161.     <td class="p02">EOR (d,X)</td>
    162. 

  162.     <td class="p816">wdm</td>
    163. 

  163.     <td class="p816">eor d,S</td>
    164. 

  164.     <td class="p816">mvp s,d</td>
    165. 

  165.     <td class="p02">EOR d</td>
    166. 

  166.     <td class="p02">LSR d</td>
    167. 

  167.     <td class="p816">eor [d]</td>
    168. 

  168.     <td class="p02">PHA</td>
    169. 

  169.     <td class="p02">EOR #</td>
    170. 

  170.     <td class="p02">LSR A</td>
    171. 

  171.     <td class="p816">phk</td>
    172. 

  172.     <td class="p02">JMP a</td>
    173. 

  173.     <td class="p02">EOR a</td>
    174. 

  174.     <td class="p02">LSR a</td>
    175. 

  175.     <td class="p816">eor al</td>
    176. 

  176.    </tr>
    177. 

  177.    <tr>
    178. 

  178.     <td>5x</td>
    179. 

  179.     <td class="p02">BVC r</td>
    180. 

  180.     <td class="p02">EOR (d),Y</td>
    181. 

  181.     <td class="pc02">Eor (d)</td>
    182. 

  182.     <td class="p816">eor (d,S),Y</td>
    183. 

  183.     <td class="p816">mvn s,d</td>
    184. 

  184.     <td class="p02">EOR d,X</td>
    185. 

  185.     <td class="p02">LSR d,X</td>
    186. 

  186.     <td class="p816">eor [d],Y</td>
    187. 

  187.     <td class="p02">CLI</td>
    188. 

  188.     <td class="p02">EOR a,Y</td>
    189. 

  189.     <td class="pc02">Phy</td>
    190. 

  190.     <td class="p816">tcd</td>
    191. 

  191.     <td class="p816">jmp al</td>
    192. 

  192.     <td class="p02">EOR a,X</td>
    193. 

  193.     <td class="p02">LSR a,X</td>
    194. 

  194.     <td class="p816">eor al,X</td>
    195. 

  195.    </tr>
    196. 

  196.    <tr>
    197. 

  197.     <td>6x</td>
    198. 

  198.     <td class="p02">RTS</td>
    199. 

  199.     <td class="p02">ADC (d,X)</td>
    200. 

  200.     <td class="p816">per rl</td>
    201. 

  201.     <td class="p816">adc d,S</td>
    202. 

  202.     <td class="pc02">Stz d</td>
    203. 

  203.     <td class="p02">ADC d</td>
    204. 

  204.     <td class="p02">ROR d</td>
    205. 

  205.     <td class="p816">adc [d]</td>
    206. 

  206.     <td class="p02">PLA</td>
    207. 

  207.     <td class="p02">ADC #</td>
    208. 

  208.     <td class="p02">ROR A</td>
    209. 

  209.     <td class="p816">rtl</td>
    210. 

  210.     <td class="p02">JMP (a)</td>
    211. 

  211.     <td class="p02">ADC a</td>
    212. 

  212.     <td class="p02">ROR a</td>
    213. 

  213.     <td class="p816">adc al</td>
    214. 

  214.    </tr>
    215. 

  215.    <tr>
    216. 

  216.     <td>7x</td>
    217. 

  217.     <td class="p02">BVS r</td>
    218. 

  218.     <td class="p02">ADC (d),Y</td>
    219. 

  219.     <td class="pc02">Adc (d)</td>
    220. 

  220.     <td class="p816">adc (d,S),Y</td>
    221. 

  221.     <td class="pc02">Stz d,X</td>
    222. 

  222.     <td class="p02">ADC d,X</td>
    223. 

  223.     <td class="p02">ROR d,X</td>
    224. 

  224.     <td class="p816">adc [d],Y</td>
    225. 

  225.     <td class="p02">SEI</td>
    226. 

  226.     <td class="p02">ADC a,Y</td>
    227. 

  227.     <td class="pc02">Ply</td>
    228. 

  228.     <td class="p816">tdc</td>
    229. 

  229.     <td class="pc02">Jmp (a,X)</td>
    230. 

  230.     <td class="p02">ADC a,X</td>
    231. 

  231.     <td class="p02">ROR a,X</td>
    232. 

  232.     <td class="p816">adc al,X</td>
    233. 

  233.    </tr>
    234. 

  234.    <tr>
    235. 

  235.     <td>8x</td>
    236. 

  236.     <td class="pc02">Bra r</td>
    237. 

  237.     <td class="p02">STA (d,X)</td>
    238. 

  238.     <td class="p816">brl rl</td>
    239. 

  239.     <td class="p816">sta d,S</td>
    240. 

  240.     <td class="p02">STY d</td>
    241. 

  241.     <td class="p02">STA d</td>
    242. 

  242.     <td class="p02">STX d</td>
    243. 

  243.     <td class="p816">sta [d]</td>
    244. 

  244.     <td class="p02">DEY</td>
    245. 

  245.     <td class="pc02">Bit #</td>
    246. 

  246.     <td class="p02">TXA</td>
    247. 

  247.     <td class="p816">phb</td>
    248. 

  248.     <td class="p02">STY a</td>
    249. 

  249.     <td class="p02">STA a</td>
    250. 

  250.     <td class="p02">STX a</td>
    251. 

  251.     <td class="p816">sta al</td>
    252. 

  252.    </tr>
    253. 

  253.    <tr>
    254. 

  254.     <td>9x</td>
    255. 

  255.     <td class="p02">BCC r</td>
    256. 

  256.     <td class="p02">STA (d),Y</td>
    257. 

  257.     <td class="pc02">Sta (d)</td>
    258. 

  258.     <td class="p816">sta (d,S),Y</td>
    259. 

  259.     <td class="p02">STY d,X</td>
    260. 

  260.     <td class="p02">STA d,X</td>
    261. 

  261.     <td class="p02">STX d,Y</td>
    262. 

  262.     <td class="p816">sta [d],Y</td>
    263. 

  263.     <td class="p02">TYA</td>
    264. 

  264.     <td class="p02">STA a,Y</td>
    265. 

  265.     <td class="p02">TXS</td>
    266. 

  266.     <td class="p816">txy</td>
    267. 

  267.     <td class="pc02">Stz a</td>
    268. 

  268.     <td class="p02">STA a,X</td>
    269. 

  269.     <td class="pc02">Stz a,X</td>
    270. 

  270.     <td class="p816">sta al,X</td>
    271. 

  271.    </tr>
    272. 

  272.    <tr>
    273. 

  273.     <td>Ax</td>
    274. 

  274.     <td class="p02">LDY #</td>
    275. 

  275.     <td class="p02">LDA (d,X)</td>
    276. 

  276.     <td class="p02">LDX #</td>
    277. 

  277.     <td class="p816">lda d,S</td>
    278. 

  278.     <td class="p02">LDY d</td>
    279. 

  279.     <td class="p02">LDA d</td>
    280. 

  280.     <td class="p02">LDX d</td>
    281. 

  281.     <td class="p816">lda [d]</td>
    282. 

  282.     <td class="p02">TAY</td>
    283. 

  283.     <td class="p02">LDA #</td>
    284. 

  284.     <td class="p02">TAX</td>
    285. 

  285.     <td class="p816">plb</td>
    286. 

  286.     <td class="p02">LDY a</td>
    287. 

  287.     <td class="p02">LDA a</td>
    288. 

  288.     <td class="p02">LDX a</td>
    289. 

  289.     <td class="p816">lda al</td>
    290. 

  290.    </tr>
    291. 

  291.    <tr>
    292. 

  292.     <td>Bx</td>
    293. 

  293.     <td class="p02">BCS r</td>
    294. 

  294.     <td class="p02">LDA (d),Y</td>
    295. 

  295.     <td class="pc02">Lda (d)</td>
    296. 

  296.     <td class="p816">lda (d,S),Y</td>
    297. 

  297.     <td class="p02">LDY d,X</td>
    298. 

  298.     <td class="p02">LDA d,X</td>
    299. 

  299.     <td class="p02">LDX d,Y</td>
    300. 

  300.     <td class="p816">lda [d],Y</td>
    301. 

  301.     <td class="p02">CLV</td>
    302. 

  302.     <td class="p02">LDA a,Y</td>
    303. 

  303.     <td class="p02">TSX</td>
    304. 

  304.     <td class="p816">tyx</td>
    305. 

  305.     <td class="p02">LDY a,X</td>
    306. 

  306.     <td class="p02">LDA a,X</td>
    307. 

  307.     <td class="p02">LDX a,Y</td>
    308. 

  308.     <td class="p816">lda al,X</td>
    309. 

  309.    </tr>
    310. 

  310.    <tr>
    311. 

  311.     <td>Cx</td>
    312. 

  312.     <td class="p02">CPY #</td>
    313. 

  313.     <td class="p02">CMP (d,X)</td>
    314. 

  314.     <td class="p816">rep #</td>
    315. 

  315.     <td class="p816">cmp d,S</td>
    316. 

  316.     <td class="p02">CPY d</td>
    317. 

  317.     <td class="p02">CMP d</td>
    318. 

  318.     <td class="p02">DEC d</td>
    319. 

  319.     <td class="p816">cmp [d]</td>
    320. 

  320.     <td class="p02">INY</td>
    321. 

  321.     <td class="p02">CMP #</td>
    322. 

  322.     <td class="p02">DEX</td>
    323. 

  323.     <td class="p816">wai</td>
    324. 

  324.     <td class="p02">CPY a</td>
    325. 

  325.     <td class="p02">CMP a</td>
    326. 

  326.     <td class="p02">DEC a</td>
    327. 

  327.     <td class="p816">cmp al</td>
    328. 

  328.    </tr>
    329. 

  329.    <tr>
    330. 

  330.     <td>Dx</td>
    331. 

  331.     <td class="p02">BNE r</td>
    332. 

  332.     <td class="p02">CMP (d),Y</td>
    333. 

  333.     <td class="pc02">Cmp (d)</td>
    334. 

  334.     <td class="p816">cmp (d,S),Y</td>
    335. 

  335.     <td class="p816">pei d</td>
    336. 

  336.     <td class="p02">CMP d,X</td>
    337. 

  337.     <td class="p02">DEC d,X</td>
    338. 

  338.     <td class="p816">cmp [d],Y</td>
    339. 

  339.     <td class="p02">CLD</td>
    340. 

  340.     <td class="p02">CMP a,Y</td>
    341. 

  341.     <td class="pc02">Phx</td>
    342. 

  342.     <td class="p816">stp</td>
    343. 

  343.     <td class="p816">jml (a)</td>
    344. 

  344.     <td class="p02">CMP a,X</td>
    345. 

  345.     <td class="p02">DEC a,X</td>
    346. 

  346.     <td class="p816">cmp al,X</td>
    347. 

  347.    </tr>
    348. 

  348.    <tr>
    349. 

  349.     <td>Ex</td>
    350. 

  350.     <td class="p02">CPX #</td>
    351. 

  351.     <td class="p02">SBC (d,X)</td>
    352. 

  352.     <td class="p816">sep #</td>
    353. 

  353.     <td class="p816">sbc d,S</td>
    354. 

  354.     <td class="p02">CPX d</td>
    355. 

  355.     <td class="p02">SBC d</td>
    356. 

  356.     <td class="p02">INC d</td>
    357. 

  357.     <td class="p816">sbc [d]</td>
    358. 

  358.     <td class="p02">INX</td>
    359. 

  359.     <td class="p02">SBC #</td>
    360. 

  360.     <td class="p02">NOP</td>
    361. 

  361.     <td class="p816">xba</td>
    362. 

  362.     <td class="p02">CPX a</td>
    363. 

  363.     <td class="p02">SBC a</td>
    364. 

  364.     <td class="p02">INC a</td>
    365. 

  365.     <td class="p816">sbc al</td>
    366. 

  366.    </tr>
    367. 

  367.    <tr>
    368. 

  368.     <td>Fx</td>
    369. 

  369.     <td class="p02">BEQ r</td>
    370. 

  370.     <td class="p02">SBC (d),Y</td>
    371. 

  371.     <td class="pc02">Sbc (d)</td>
    372. 

  372.     <td class="p816">sbc (d,S),Y</td>
    373. 

  373.     <td class="p816">pea a</td>
    374. 

  374.     <td class="p02">SBC d,X</td>
    375. 

  375.     <td class="p02">INC d,X</td>
    376. 

  376.     <td class="p816">sbc [d],Y</td>
    377. 

  377.     <td class="p02">SED</td>
    378. 

  378.     <td class="p02">SBC a,Y</td>
    379. 

  379.     <td class="pc02">Plx</td>
    380. 

  380.     <td class="p816">xce</td>
    381. 

  381.     <td class="p816">jsr (a,X)</td>
    382. 

  382.     <td class="p02">SBC a,X</td>
    383. 

  383.     <td class="p02">INC a,X</td>
    384. 

  384.     <td class="p816">sbc al,X</td>
    385. 

  385.    </tr>
    386. 

  386.   </table>
    387. 

  387.   <h2><a name="ins02">6502 Instructions</a></h2>
    388. 

  388.   <p>
    389. 

  389.    Most instructions that explicitly reference memory locations have bit
    390. 

  390.    patterns of the form <b>aaabbbcc</b>.  The <b>aaa</b> and <b>cc</b> bits
    391. 

  391.    determine the opcode, and the <b>bbb</b> bits determine the addressing mode.
    392. 

  392.   </p>
    393. 

  393.   <p>
    394. 

  394.    Instructions with <b>cc</b> = <b>01</b> are the most regular, and are
    395. 

  395.    therefore considered first.  The <b>aaa</b> bits determine the opcode
    396. 

  396.    as follows:
    397. 

  397.   </p>
    398. 

  398.   <table border=1>
    399. 

  399.    <tr><td><b>aaa</b></td><td>opcode</td></tr>
    400. 

  400.    <tr><td>000</td><td>ORA</td></tr>
    401. 

  401.    <tr><td>001</td><td>AND</td></tr>
    402. 

  402.    <tr><td>010</td><td>EOR</td></tr>
    403. 

  403.    <tr><td>011</td><td>ADC</td></tr>
    404. 

  404.    <tr><td>100</td><td>STA</td></tr>
    405. 

  405.    <tr><td>101</td><td>LDA</td></tr>
    406. 

  406.    <tr><td>110</td><td>CMP</td></tr>
    407. 

  407.    <tr><td>111</td><td>SBC</td></tr>
    408. 

  408.   </table>
    409. 

  409.   <p>
    410. 

  410.    And the addressing mode (<b>bbb</b>) bits:
    411. 

  411.   </p>
    412. 

  412.   <table border=1>
    413. 

  413.    <tr><td><b>bbb</b></td><td>addressing mode</td></tr>
    414. 

  414.    <tr><td>000</td><td>(zero page,X)</td></tr>
    415. 

  415.    <tr><td>001</td><td>zero page</td></tr>
    416. 

  416.    <tr><td>010</td><td>#immediate</td></tr>
    417. 

  417.    <tr><td>011</td><td>absolute</td></tr>
    418. 

  418.    <tr><td>100</td><td>(zero page),Y</td></tr>
    419. 

  419.    <tr><td>101</td><td>zero page,X</td></tr>
    420. 

  420.    <tr><td>110</td><td>absolute,Y</td></tr>
    421. 

  421.    <tr><td>111</td><td>absolute,X</td></tr>
    422. 

  422.   </table>
    423. 

  423.   <p>
    424. 

  424.    Putting it all together:
    425. 

  425.   </p>
    426. 

  426.   <table border=1>
    427. 

  427.    <tr>
    428. 

  428.     <td>&nbsp;</td>
    429. 

  429.     <td>ORA</td>
    430. 

  430.     <td>AND</td>
    431. 

  431.     <td>EOR</td>
    432. 

  432.     <td>ADC</td>
    433. 

  433.     <td>STA</td>
    434. 

  434.     <td>LDA</td>
    435. 

  435.     <td>CMP</td>
    436. 

  436.     <td>SBC</td>
    437. 

  437.    </tr>
    438. 

  438.    <tr>
    439. 

  439.     <td>(zp,X)</td>
    440. 

  440.     <td>01</td>
    441. 

  441.     <td>21</td>
    442. 

  442.     <td>41</td>
    443. 

  443.     <td>61</td>
    444. 

  444.     <td>81</td>
    445. 

  445.     <td>A1</td>
    446. 

  446.     <td>C1</td>
    447. 

  447.     <td>E1</td>
    448. 

  448.    </tr>
    449. 

  449.    <tr>
    450. 

  450.     <td>zp</td>
    451. 

  451.     <td>05</td>
    452. 

  452.     <td>25</td>
    453. 

  453.     <td>45</td>
    454. 

  454.     <td>65</td>
    455. 

  455.     <td>85</td>
    456. 

  456.     <td>A5</td>
    457. 

  457.     <td>C5</td>
    458. 

  458.     <td>E5</td>
    459. 

  459.    </tr>
    460. 

  460.    <tr>
    461. 

  461.     <td>#</td>
    462. 

  462.     <td>09</td>
    463. 

  463.     <td>29</td>
    464. 

  464.     <td>49</td>
    465. 

  465.     <td>69</td>
    466. 

  466.     <td>&nbsp;</td>
    467. 

  467.     <td>A9</td>
    468. 

  468.     <td>C9</td>
    469. 

  469.     <td>E9</td>
    470. 

  470.    </tr>
    471. 

  471.    <tr>
    472. 

  472.     <td>abs</td>
    473. 

  473.     <td>0D</td>
    474. 

  474.     <td>2D</td>
    475. 

  475.     <td>4D</td>
    476. 

  476.     <td>6D</td>
    477. 

  477.     <td>8D</td>
    478. 

  478.     <td>AD</td>
    479. 

  479.     <td>CD</td>
    480. 

  480.     <td>ED</td>
    481. 

  481.    </tr>
    482. 

  482.    <tr>
    483. 

  483.     <td>(zp),Y</td>
    484. 

  484.     <td>11</td>
    485. 

  485.     <td>31</td>
    486. 

  486.     <td>51</td>
    487. 

  487.     <td>71</td>
    488. 

  488.     <td>91</td>
    489. 

  489.     <td>B1</td>
    490. 

  490.     <td>D1</td>
    491. 

  491.     <td>F1</td>
    492. 

  492.    </tr>
    493. 

  493.    <tr>
    494. 

  494.     <td>zp,X</td>
    495. 

  495.     <td>15</td>
    496. 

  496.     <td>35</td>
    497. 

  497.     <td>55</td>
    498. 

  498.     <td>75</td>
    499. 

  499.     <td>95</td>
    500. 

  500.     <td>B5</td>
    501. 

  501.     <td>D5</td>
    502. 

  502.     <td>F5</td>
    503. 

  503.    </tr>
    504. 

  504.    <tr>
    505. 

  505.     <td>abs,Y</td>
    506. 

  506.     <td>19</td>
    507. 

  507.     <td>39</td>
    508. 

  508.     <td>59</td>
    509. 

  509.     <td>79</td>
    510. 

  510.     <td>99</td>
    511. 

  511.     <td>B9</td>
    512. 

  512.     <td>D9</td>
    513. 

  513.     <td>F9</td>
    514. 

  514.    </tr>
    515. 

  515.    <tr>
    516. 

  516.     <td>abs,X</td>
    517. 

  517.     <td>1D</td>
    518. 

  518.     <td>3D</td>
    519. 

  519.     <td>5D</td>
    520. 

  520.     <td>7D</td>
    521. 

  521.     <td>9D</td>
    522. 

  522.     <td>BD</td>
    523. 

  523.     <td>DD</td>
    524. 

  524.     <td>FD</td>
    525. 

  525.    </tr>
    526. 

  526.   </table>
    527. 

  527.   <p>
    528. 

  528.    The only irregularity is the absence of the nonsensical immediate STA
    529. 

  529.    instruction.
    530. 

  530.   </p>
    531. 

  531.   <p>
    532. 

  532.    Next we consider the <b>cc</b> = <b>10</b> instructions.  These have a
    533. 

  533.    completely different set of opcodes:
    534. 

  534.   </p>
    535. 

  535.   <table border=1>
    536. 

  536.    <tr><td><b>aaa</b></td><td>opcode</td></tr>
    537. 

  537.    <tr><td>000</td><td>ASL</td></tr>
    538. 

  538.    <tr><td>001</td><td>ROL</td></tr>
    539. 

  539.    <tr><td>010</td><td>LSR</td></tr>
    540. 

  540.    <tr><td>011</td><td>ROR</td></tr>
    541. 

  541.    <tr><td>100</td><td>STX</td></tr>
    542. 

  542.    <tr><td>101</td><td>LDX</td></tr>
    543. 

  543.    <tr><td>110</td><td>DEC</td></tr>
    544. 

  544.    <tr><td>111</td><td>INC</td></tr>
    545. 

  545.   </table>
    546. 

  546.   <p>
    547. 

  547.    The addressing modes are similar to the <b>01</b> case, but not quite
    548. 

  548.    the same:
    549. 

  549.   </p>
    550. 

  550.   <table border=1>
    551. 

  551.    <tr><td><b>bbb</b></td><td>addressing mode</td></tr>
    552. 

  552.    <tr><td>000</td><td>#immediate</td></tr>
    553. 

  553.    <tr><td>001</td><td>zero page</td></tr>
    554. 

  554.    <tr><td>010</td><td>accumulator</td></tr>
    555. 

  555.    <tr><td>011</td><td>absolute</td></tr>
    556. 

  556.    <tr><td>101</td><td>zero page,X</td></tr>
    557. 

  557.    <tr><td>111</td><td>absolute,X</td></tr>
    558. 

  558.   </table>
    559. 

  559.   <p>
    560. 

  560.    Note that <b>bbb</b> = <b>100</b> and <b>110</b> are missing.  Also,
    561. 

  561.    with STX and LDX, "zero page,X" addressing becomes "zero page,Y", and
    562. 

  562.    with LDX, "absolute,X" becomes "absolute,Y".
    563. 

  563.   </p>
    564. 

  564.   <p>
    565. 

  565.    These fit together like this:
    566. 

  566.   </p>
    567. 

  567.   <table border=1>
    568. 

  568.    <tr>
    569. 

  569.     <td>&nbsp;</td>
    570. 

  570.     <td>ASL</td>
    571. 

  571.     <td>ROL</td>
    572. 

  572.     <td>LSR</td>
    573. 

  573.     <td>ROR</td>
    574. 

  574.     <td>STX</td>
    575. 

  575.     <td>LDX</td>
    576. 

  576.     <td>DEC</td>
    577. 

  577.     <td>INC</td>
    578. 

  578.    </tr>
    579. 

  579.    <tr>
    580. 

  580.     <td>#</td>
    581. 

  581.     <td>&nbsp;</td>
    582. 

  582.     <td>&nbsp;</td>
    583. 

  583.     <td>&nbsp;</td>
    584. 

  584.     <td>&nbsp;</td>
    585. 

  585.     <td>&nbsp;</td>
    586. 

  586.     <td>A2</td>
    587. 

  587.     <td>&nbsp;</td>
    588. 

  588.     <td>&nbsp;</td>
    589. 

  589.    </tr>
    590. 

  590.    <tr>
    591. 

  591.     <td>zp</td>
    592. 

  592.     <td>06</td>
    593. 

  593.     <td>26</td>
    594. 

  594.     <td>46</td>
    595. 

  595.     <td>66</td>
    596. 

  596.     <td>86</td>
    597. 

  597.     <td>A6</td>
    598. 

  598.     <td>C6</td>
    599. 

  599.     <td>E6</td>
    600. 

  600.    </tr>
    601. 

  601.    <tr>
    602. 

  602.     <td>A</td>
    603. 

  603.     <td>0A</td>
    604. 

  604.     <td>2A</td>
    605. 

  605.     <td>4A</td>
    606. 

  606.     <td>6A</td>
    607. 

  607.     <td>&nbsp;</td>
    608. 

  608.     <td>&nbsp;</td>
    609. 

  609.     <td>&nbsp;</td>
    610. 

  610.     <td>&nbsp;</td>
    611. 

  611.    </tr>
    612. 

  612.    <tr>
    613. 

  613.     <td>abs</td>
    614. 

  614.     <td>0E</td>
    615. 

  615.     <td>2E</td>
    616. 

  616.     <td>4E</td>
    617. 

  617.     <td>6E</td>
    618. 

  618.     <td>8E</td>
    619. 

  619.     <td>AE</td>
    620. 

  620.     <td>CE</td>
    621. 

  621.     <td>EE</td>
    622. 

  622.    </tr>
    623. 

  623.    <tr>
    624. 

  624.     <td>zp,X/zp,Y</td>
    625. 

  625.     <td>16</td>
    626. 

  626.     <td>36</td>
    627. 

  627.     <td>56</td>
    628. 

  628.     <td>76</td>
    629. 

  629.     <td>96</td>
    630. 

  630.     <td>B6</td>
    631. 

  631.     <td>D6</td>
    632. 

  632.     <td>F6</td>
    633. 

  633.    </tr>
    634. 

  634.    <tr>
    635. 

  635.     <td>abs,X/abs,Y</td>
    636. 

  636.     <td>1E</td>
    637. 

  637.     <td>3E</td>
    638. 

  638.     <td>5E</td>
    639. 

  639.     <td>7E</td>
    640. 

  640.     <td>&nbsp;</td>
    641. 

  641.     <td>BE</td>
    642. 

  642.     <td>DE</td>
    643. 

  643.     <td>FE</td>
    644. 

  644.    </tr>
    645. 

  645.   </table>
    646. 

  646.   <p>
    647. 

  647.    Most of the gaps in this table are easy to understand.  Immediate mode
    648. 

  648.    makes no sense for any instruction other than LDX, and accumulator mode
    649. 

  649.    for DEC and INC didn't appear until the 65C02.  The slots that "STX A"
    650. 

  650.    and "LDX A" would occupy are taken by TXA and TAX respectively, which is
    651. 

  651.    exactly what one would expect.  The only inexplicable gap is the
    652. 

  652.    absence of a "STX abs,Y" instruction.
    653. 

  653.   </p>
    654. 

  654.   <p>
    655. 

  655.    Next, the <b>cc</b> = <b>00</b> instructions.  Again, the opcodes are
    656. 

  656.    different:
    657. 

  657.   </p>
    658. 

  658.   <table border=1>
    659. 

  659.    <tr><td><b>aaa</b></td><td>opcode</td></tr>
    660. 

  660.    <tr><td>001</td><td>BIT</td></tr>
    661. 

  661.    <tr><td>010</td><td>JMP</td></tr>
    662. 

  662.    <tr><td>011</td><td>JMP (abs)</td></tr>
    663. 

  663.    <tr><td>100</td><td>STY</td></tr>
    664. 

  664.    <tr><td>101</td><td>LDY</td></tr>
    665. 

  665.    <tr><td>110</td><td>CPY</td></tr>
    666. 

  666.    <tr><td>111</td><td>CPX</td></tr>
    667. 

  667.   </table>
    668. 

  668.   <p>
    669. 

  669.    It's debatable whether the JMP instructions belong in this
    670. 

  670.    list...I've included them because they <em>do</em> seem to fit,
    671. 

  671.    provided one considers the indirect JMP a separate opcode rather than
    672. 

  672.    a different addressing mode of the absolute JMP.
    673. 

  673.   </p>
    674. 

  674.   <p>
    675. 

  675.    The addressing modes are the same as the <b>10</b> case, except that
    676. 

  676.    accumulator mode is missing.
    677. 

  677.   </p>
    678. 

  678.   <table border=1>
    679. 

  679.    <tr><td><b>bbb</b></td><td>addressing mode</td></tr>
    680. 

  680.    <tr><td>000</td><td>#immediate</td></tr>
    681. 

  681.    <tr><td>001</td><td>zero page</td></tr>
    682. 

  682.    <tr><td>011</td><td>absolute</td></tr>
    683. 

  683.    <tr><td>101</td><td>zero page,X</td></tr>
    684. 

  684.    <tr><td>111</td><td>absolute,X</td></tr>
    685. 

  685.   </table>
    686. 

  686.   <p>
    687. 

  687.    And here's how they fit together:
    688. 

  688.   </p>
    689. 

  689.   <table border=1>
    690. 

  690.    <tr>
    691. 

  691.     <td>&nbsp;</td>
    692. 

  692.     <td>BIT</td>
    693. 

  693.     <td>JMP</td>
    694. 

  694.     <td>JMP()</td>
    695. 

  695.     <td>STY</td>
    696. 

  696.     <td>LDY</td>
    697. 

  697.     <td>CPY</td>
    698. 

  698.     <td>CPX</td>
    699. 

  699.    </tr>
    700. 

  700.    <tr>
    701. 

  701.     <td>#</td>
    702. 

  702.     <td>&nbsp;</td>
    703. 

  703.     <td>&nbsp;</td>
    704. 

  704.     <td>&nbsp;</td>
    705. 

  705.     <td>&nbsp;</td>
    706. 

  706.     <td>A0</td>
    707. 

  707.     <td>C0</td>
    708. 

  708.     <td>E0</td>
    709. 

  709.    </tr>
    710. 

  710.    <tr>
    711. 

  711.     <td>zp</td>
    712. 

  712.     <td>24</td>
    713. 

  713.     <td>&nbsp;</td>
    714. 

  714.     <td>&nbsp;</td>
    715. 

  715.     <td>84</td>
    716. 

  716.     <td>A4</td>
    717. 

  717.     <td>C4</td>
    718. 

  718.     <td>E4</td>
    719. 

  719.    </tr>
    720. 

  720.    <tr>
    721. 

  721.     <td>abs</td>
    722. 

  722.     <td>2C</td>
    723. 

  723.     <td>4C</td>
    724. 

  724.     <td>6C</td>
    725. 

  725.     <td>8C</td>
    726. 

  726.     <td>AC</td>
    727. 

  727.     <td>CC</td>
    728. 

  728.     <td>EC</td>
    729. 

  729.    </tr>
    730. 

  730.    <tr>
    731. 

  731.     <td>zp,X</td>
    732. 

  732.     <td>&nbsp;</td>
    733. 

  733.     <td>&nbsp;</td>
    734. 

  734.     <td>&nbsp;</td>
    735. 

  735.     <td>94</td>
    736. 

  736.     <td>B4</td>
    737. 

  737.     <td>&nbsp;</td>
    738. 

  738.     <td>&nbsp;</td>
    739. 

  739.    </tr>
    740. 

  740.    <tr>
    741. 

  741.     <td>abs,X</td>
    742. 

  742.     <td>&nbsp;</td>
    743. 

  743.     <td>&nbsp;</td>
    744. 

  744.     <td>&nbsp;</td>
    745. 

  745.     <td>&nbsp;</td>
    746. 

  746.     <td>BC</td>
    747. 

  747.     <td>&nbsp;</td>
    748. 

  748.     <td>&nbsp;</td>
    749. 

  749.    </tr>
    750. 

  750.   </table>
    751. 

  751.   <p>
    752. 

  752.    Some of the gaps in this table are understandable (e.g. the lack of an
    753. 

  753.    immediate mode for JMP, JMP(), and STY), but others are not
    754. 

  754.    (e.g. the absence of "zp,X" for CPY and CPX, and the absence of "abs,X"
    755. 

  755.    for STY, CPY, and CPX).  Note that if accumulator mode (<b>bbb</b> =
    756. 

  756.    <b>010</b>) were available, "LDY A" would be A8, which falls in the
    757. 

  757.    slot occupied by TAY, but the pattern breaks down elsewhere--TYA is 98,
    758. 

  758.    rather than 88, which we would expect it to be if it corresponded to
    759. 

  759.    the nonexistant "STY A".
    760. 

  760.   </p>
    761. 

  761.   <p>
    762. 

  762.    No instructions have the form <b>aaabbb11</b>.
    763. 

  763.   </p>
    764. 

  764.   <p>
    765. 

  765.    The conditional branch instructions all have the form <b>xxy10000</b>.
    766. 

  766.    The flag indicated by <b>xx</b> is compared with <b>y</b>, and the
    767. 

  767.    branch is taken if they are equal.
    768. 

  768.   </p>
    769. 

  769.   <table border=1>
    770. 

  770.    <tr><td><b>xx</b></td><td>flag</td></tr>
    771. 

  771.    <tr><td>00</td><td>negative</td></tr>
    772. 

  772.    <tr><td>01</td><td>overflow</td></tr>
    773. 

  773.    <tr><td>10</td><td>carry</td></tr>
    774. 

  774.    <tr><td>11</td><td>zero</td></tr>
    775. 

  775.   </table>
    776. 

  776.   <p>
    777. 

  777.    This gives the following branches:
    778. 

  778.   </p>
    779. 

  779.   <table border=1>
    780. 

  780.    <tr><td>BPL</td><td>BMI</td><td>BVC</td><td>BVS</td><td>BCC</td><td>BCS</td>
    781. 

  781.    <td>BNE</td><td>BEQ</td></tr>
    782. 

  782.    <tr><td>10</td><td>30</td><td>50</td><td>70</td><td>90</td><td>B0</td>
    783. 

  783.    <td>D0</td><td>F0</td>
    784. 

  784.   </table>
    785. 

  785.   <p>
    786. 

  786.    The remaining instructions are probably best considered simply by
    787. 

  787.    listing them.  Here are the interrupt and subroutine instructions:
    788. 

  788.   </p>
    789. 

  789.   <table border=1>
    790. 

  790.    <tr><td>BRK</td><td>JSR abs</td><td>RTI</td><td>RTS</td></tr>
    791. 

  791.    <tr><td>00</td><td>20</td><td>40</td><td>60</td>
    792. 

  792.   </table>
    793. 

  793.   <p>
    794. 

  794.    (JSR is the only absolute-addressing instruction that doesn't fit the
    795. 

  795.    <b>aaabbbcc</b> pattern.)
    796. 

  796.   </p>
    797. 

  797.   <p>
    798. 

  798.    Other single-byte instructions:
    799. 

  799.   </p>
    800. 

  800.   <table border=1 style="margin-bottom: 10px">
    801. 

  801.    <tr>
    802. 

  802.     <td>PHP</td>
    803. 

  803.     <td>PLP</td>
    804. 

  804.     <td>PHA</td>
    805. 

  805.     <td>PLA</td>
    806. 

  806.     <td>DEY</td>
    807. 

  807.     <td>TAY</td>
    808. 

  808.     <td>INY</td>
    809. 

  809.     <td>INX</td>
    810. 

  810.    </tr>
    811. 

  811.    <tr>
    812. 

  812.     <td>08</td>
    813. 

  813.     <td>28</td>
    814. 

  814.     <td>48</td>
    815. 

  815.     <td>68</td>
    816. 

  816.     <td>88</td>
    817. 

  817.     <td>A8</td>
    818. 

  818.     <td>C8</td>
    819. 

  819.     <td>E8</td>
    820. 

  820.    </tr>
    821. 

  821.   </table>
    822. 

  822.   <table border=1 style="margin-bottom: 10px">
    823. 

  823.    <tr>
    824. 

  824.     <td>CLC</td>
    825. 

  825.     <td>SEC</td>
    826. 

  826.     <td>CLI</td>
    827. 

  827.     <td>SEI</td>
    828. 

  828.     <td>TYA</td>
    829. 

  829.     <td>CLV</td>
    830. 

  830.     <td>CLD</td>
    831. 

  831.     <td>SED</td>
    832. 

  832.    </tr>
    833. 

  833.    <tr>
    834. 

  834.     <td>18</td>
    835. 

  835.     <td>38</td>
    836. 

  836.     <td>58</td>
    837. 

  837.     <td>78</td>
    838. 

  838.     <td>98</td>
    839. 

  839.     <td>B8</td>
    840. 

  840.     <td>D8</td>
    841. 

  841.     <td>F8</td>
    842. 

  842.    </tr>
    843. 

  843.   </table>
    844. 

  844.   <table border=1>
    845. 

  845.    <tr>
    846. 

  846.     <td>TXA</td>
    847. 

  847.     <td>TXS</td>
    848. 

  848.     <td>TAX</td>
    849. 

  849.     <td>TSX</td>
    850. 

  850.     <td>DEX</td>
    851. 

  851.     <td>NOP</td>
    852. 

  852.    </tr>
    853. 

  853.    <tr>
    854. 

  854.     <td>8A</td>
    855. 

  855.     <td>9A</td>
    856. 

  856.     <td>AA</td>
    857. 

  857.     <td>BA</td>
    858. 

  858.     <td>CA</td>
    859. 

  859.     <td>EA</td>
    860. 

  860.    </tr>
    861. 

  861.   </table>
    862. 

  862.   <h3>"Undocumented" 6502 instructions</h3>
    863. 

  863.   <p>
    864. 

  864.    The above-described instructions (the ones shown in <span
    865. 

  865.    class="p02">GREEN UPPERCASE</span> in the table at the top of this
    866. 

  866.    page) are the only ones documented in any manufacturer's official data
    867. 

  867.    sheets.  The question often arises, "What do all those other leftover
    868. 

  868.    bytes do if you try to execute them as instructions?"
    869. 

  869.   <p>
    870. 

  870.    In general the behavior of instructions other than those listed above
    871. 

  871.    cannot be described exactly, as they tend to be somewhat unstable, and
    872. 

  872.    do not always behave the same way on chips made by different
    873. 

  873.    manufacturers, and some instructions don't even behave the same way
    874. 

  874.    twice on the same chip.  Those looking for a precise listing of
    875. 

  875.    "undocumented" instruction behaviors will have to look elsewhere, and
    876. 

  876.    should beware that the behaviors described on other web pages may be
    877. 

  877.    specific to 6502s made by a particular (often unspecified) manufacturer.
    878. 

  878.   </p>
    879. 

  879.   <p>
    880. 

  880.    However, there are some facts that seem to be common across all 6502s.
    881. 

  881.    The most insteresting case is the <b>cc</b> = <b>11</b> instructions:
    882. 

  882.    these execute the adjacent <b>cc</b> = <b>01</b> and <b>cc</b> =
    883. 

  883.    <b>10</b> instructions <em>simultaneously</em>.  For example, <b>AF</b>
    884. 

  884.    executes <b>AD</b> ("LDA absolute") and <b>AE</b> ("LDX absolute") at
    885. 

  885.    the same time, putting the same value in both the accumulator and the X
    886. 

  886.    register.
    887. 

  887.   </p>
    888. 

  888.   <p>
    889. 

  889.    In some cases the <b>01</b> and <b>10</b> instructions are
    890. 

  890.    incompatible.  For example, <b>8F</b> executes <b>8D</b> ("STA
    891. 

  891.    absolute") and <b>8E</b> ("STX absolute") at the same time.  So which
    892. 

  892.    register actually gets written to memory?  Usually some mixture of the
    893. 

  893.    two, in a manner that varies depending on who made the 6502, when it was
    894. 

  894.    made, the phase of the moon, and other unpredictable variables.
    895. 

  895.   </p>
    896. 

  896.   <p>
    897. 

  897.    The behavior of the <b>11</b> instructions is especially problematic in
    898. 

  898.    those cases where the adjacent <b>01</b> or <b>10</b> instruction is also
    899. 

  899.    undocumented.  Sometimes you can get a partial idea of what happens by
    900. 

  900.    looking at what the missing <b>01</b> or <b>10</b> instruction would be
    901. 

  901.    if that opcode/addressing mode combination weren't missing.
    902. 

  902.    <b>Xxxx1011</b> instructions are also problematic--some of these seem
    903. 

  903.    to mix not only the adjacent <b>01</b> and <b>10</b> instructions, but
    904. 

  904.    also the immediate mode of the corresponding <b>10</b> instruction.
    905. 

  905.   </p>
    906. 

  906.   <p>
    907. 

  907.    Most of the missing <b>00</b>, <b>01</b>, and <b>10</b> instructions
    908. 

  908.    seem to behave like NOPs, but using the addressing mode indicated by
    909. 

  909.    the <b>bbb</b> bits.  But apparently this isn't always reliable--there
    910. 

  910.    are reports of some of these instructions occasionally locking up the
    911. 

  911.    processor.
    912. 

  912.   </p>
    913. 

  913.   <p>
    914. 

  914.    Instructions of the form <b>xxxx0010</b> usually lock up the processor,
    915. 

  915.    so that a reset is required to recover.  The instructions <b>82</b>,
    916. 

  916.    <b>C2</b>, and <b>E2</b> (corresponding to the nonexistant immediate
    917. 

  917.    mode of STX, DEC, and INC) may sometimes behave as two-byte NOPs, but don't
    918. 

  918.    count on it.
    919. 

  919.   </p>
    920. 

  920.   <h2><a name="insc02">65C02 Instructions</a></h2>
    921. 

  921.   <p>
    922. 

  922.    The new instructions of the 65C02 are much less logical than those
    923. 

  923.    listed above.  The designers of the 65C02 apparently chose to continue
    924. 

  924.    leaving the <b>cc</b> = <b>11</b> instructions empty, and this didn't
    925. 

  925.    leave much space for new instructions.  Some instructions landed in
    926. 

  926.    logical places, but others had to be assigned wherever there was room,
    927. 

  927.    whether it made sense or not.
    928. 

  928.   </p>
    929. 

  929.   <p>
    930. 

  930.    The new zero-page indirect addressing mode fills the previously-unused
    931. 

  931.    <b>bbb</b> = <b>100</b> slot of the <b>cc</b> = <b>10</b> instructions,
    932. 

  932.    but the opcodes are those of the <b>cc</b> = <b>01</b> instructions.
    933. 

  933.   </p>
    934. 

  934.   <table border=1>
    935. 

  935.    <tr>
    936. 

  936.     <td>&nbsp;</td>
    937. 

  937.     <td>ORA</td>
    938. 

  938.     <td>AND</td>
    939. 

  939.     <td>EOR</td>
    940. 

  940.     <td>ADC</td>
    941. 

  941.     <td>STA</td>
    942. 

  942.     <td>LDA</td>
    943. 

  943.     <td>CMP</td>
    944. 

  944.     <td>SBC</td>
    945. 

  945.    </tr>
    946. 

  946.    <tr>
    947. 

  947.     <td>(zp)</td>
    948. 

  948.     <td>12</td>
    949. 

  949.     <td>32</td>
    950. 

  950.     <td>52</td>
    951. 

  951.     <td>72</td>
    952. 

  952.     <td>92</td>
    953. 

  953.     <td>B2</td>
    954. 

  954.     <td>D2</td>
    955. 

  955.     <td>F2</td>
    956. 

  956.    </tr>
    957. 

  957.   </table>
    958. 

  958.   <p>
    959. 

  959.    "JMP (abs,X)" is right where it ought to be (<b>011 111 00</b>), if one
    960. 

  960.    continues to regard the indirect JMP as a separate opcode from the
    961. 

  961.    absolute JMP:
    962. 

  962.   </p>
    963. 

  963.   <table border=1>
    964. 

  964.    <tr>
    965. 

  965.     <td>&nbsp;</td>
    966. 

  966.     <td>JMP()</td>
    967. 

  967.    </tr>
    968. 

  968.    <tr>
    969. 

  969.     <td>abs,X</td>
    970. 

  970.     <td>7C</td>
    971. 

  971.    </tr>
    972. 

  972.   </table>
    973. 

  973.   <p>
    974. 

  974.    "BIT zp,X" and "BIT abs,X" ended up exactly where one would expect them
    975. 

  975.    to be, but "BIT #" had to be moved because its slot was already taken by
    976. 

  976.    JSR:
    977. 

  977.   </p>
    978. 

  978.   <table border=1>
    979. 

  979.    <tr>
    980. 

  980.     <td>&nbsp;</td>
    981. 

  981.     <td>BIT</td>
    982. 

  982.    </tr>
    983. 

  983.    <tr>
    984. 

  984.     <td>#</td>
    985. 

  985.     <td>89</td>
    986. 

  986.    </tr>
    987. 

  987.    <tr>
    988. 

  988.     <td>zp,X</td>
    989. 

  989.     <td>34</td>
    990. 

  990.    </tr>
    991. 

  991.    <tr>
    992. 

  992.     <td>abs,X</td>
    993. 

  993.     <td>3C</td>
    994. 

  994.    </tr>
    995. 

  995.   </table>
    996. 

  996.   <p>
    997. 

  997.    TSB ended up in a reasonable place (<b>000bbb00</b>):
    998. 

  998.   </p>
    999. 

  999.   <table border=1>
    1000. 

  1000.    <tr>
    1001. 

  1001.     <td>&nbsp;</td>
    1002. 

  1002.     <td>TSB</td>
    1003. 

  1003.    </tr>
    1004. 

  1004.    <tr>
    1005. 

  1005.     <td>zp</td>
    1006. 

  1006.     <td>04</td>
    1007. 

  1007.    </tr>
    1008. 

  1008.    <tr>
    1009. 

  1009.     <td>abs</td>
    1010. 

  1010.     <td>0C</td>
    1011. 

  1011.    </tr>
    1012. 

  1012.   </table>
    1013. 

  1013.   <p>
    1014. 

  1014.    But the above assigments exhaust the logical possibilities for
    1015. 

  1015.    opcodes that explicity reference memory locations, so TRB and STZ had to
    1016. 

  1016.    be put wherever room could be found:
    1017. 

  1017.   </p>
    1018. 

  1018.   <table border=1>
    1019. 

  1019.    <tr>
    1020. 

  1020.     <td>&nbsp;</td>
    1021. 

  1021.     <td>TRB</td>
    1022. 

  1022.     <td>STZ</td>
    1023. 

  1023.    </tr>
    1024. 

  1024.    <tr>
    1025. 

  1025.     <td>zp</td>
    1026. 

  1026.     <td>14</td>
    1027. 

  1027.     <td>64</td>
    1028. 

  1028.    </tr>
    1029. 

  1029.    <tr>
    1030. 

  1030.     <td>abs</td>
    1031. 

  1031.     <td>1C</td>
    1032. 

  1032.     <td>9C</td>
    1033. 

  1033.    </tr>
    1034. 

  1034.    <tr>
    1035. 

  1035.     <td>zp,X</td>
    1036. 

  1036.     <td>&nbsp;</td>
    1037. 

  1037.     <td>74</td>
    1038. 

  1038.    </tr>
    1039. 

  1039.    <tr>
    1040. 

  1040.     <td>abs,X</td>
    1041. 

  1041.     <td>&nbsp;</td>
    1042. 

  1042.     <td>9E</td>
    1043. 

  1043.    </tr>
    1044. 

  1044.   </table>
    1045. 

  1045.   <p>
    1046. 

  1046.    That leaves the relative branch instruction
    1047. 

  1047.   </p>
    1048. 

  1048.   <table border=1>
    1049. 

  1049.    <tr>
    1050. 

  1050.     <td>BRA</td>
    1051. 

  1051.    </tr>
    1052. 

  1052.    <tr>
    1053. 

  1053.     <td>80</td>
    1054. 

  1054.    </tr>
    1055. 

  1055.   </table>
    1056. 

  1056.   <p>
    1057. 

  1057.    and the single-byte instructions:
    1058. 

  1058.   </p>
    1059. 

  1059.   <table border=1>
    1060. 

  1060.    <tr>
    1061. 

  1061.     <td>INC A</td>
    1062. 

  1062.     <td>DEC A</td>
    1063. 

  1063.     <td>PHY</td>
    1064. 

  1064.     <td>PLY</td>
    1065. 

  1065.     <td>PHX</td>
    1066. 

  1066.     <td>PLX</td>
    1067. 

  1067.    </tr>
    1068. 

  1068.    <tr>
    1069. 

  1069.     <td>1A</td>
    1070. 

  1070.     <td>3A</td>
    1071. 

  1071.     <td>5A</td>
    1072. 

  1072.     <td>7A</td>
    1073. 

  1073.     <td>DA</td>
    1074. 

  1074.     <td>FA</td>
    1075. 

  1075.    </tr>
    1076. 

  1076.   </table>
    1077. 

  1077.   <h3>Additional instructions found on some 65C02s</h3>
    1078. 

  1078.   <p>
    1079. 

  1079.    Actually, I lied when I said above that the designers of the 65C02
    1080. 

  1080.    chose to leave the <b>cc</b> = <b>11</b> instructions unused.  On
    1081. 

  1081.    65C02s made by Rockwell and by WDC, some of these instructions are used
    1082. 

  1082.    for additional bit setting, clearing, and testing instructions.  These
    1083. 

  1083.    instructions are missing on 65C02s made by other manufacturers.  (And
    1084. 

  1084.    since this page is part of a set of Apple II-related pages, I should
    1085. 

  1085.    point out that Apple never shipped any computers that used Rockwell or
    1086. 

  1086.    WDC 65C02s, so none of the instructions in this section are available
    1087. 

  1087.    on an unmodified Apple II.)
    1088. 

  1088.   </p>
    1089. 

  1089.   <p>
    1090. 

  1090.    The bit set and clear instructions have the form <b>xyyy0111</b>,
    1091. 

  1091.    where <b>x</b> is 0 to clear a bit or 1 to set it, and <b>yyy</b> is
    1092. 

  1092.    which bit at the memory location to set or clear.
    1093. 

  1093.   </p>
    1094. 

  1094.   <table border=1 style="margin-bottom: 10px">
    1095. 

  1095.    <tr>
    1096. 

  1096.     <td>&nbsp;</td>
    1097. 

  1097.     <td>RMB0</td>
    1098. 

  1098.     <td>RMB1</td>
    1099. 

  1099.     <td>RMB2</td>
    1100. 

  1100.     <td>RMB3</td>
    1101. 

  1101.     <td>RMB4</td>
    1102. 

  1102.     <td>RMB5</td>
    1103. 

  1103.     <td>RMB6</td>
    1104. 

  1104.     <td>RMB7</td>
    1105. 

  1105.    </tr>
    1106. 

  1106.    <tr>
    1107. 

  1107.     <td>zp</td>
    1108. 

  1108.     <td>07</td>
    1109. 

  1109.     <td>17</td>
    1110. 

  1110.     <td>27</td>
    1111. 

  1111.     <td>37</td>
    1112. 

  1112.     <td>47</td>
    1113. 

  1113.     <td>57</td>
    1114. 

  1114.     <td>67</td>
    1115. 

  1115.     <td>77</td>
    1116. 

  1116.    </tr>
    1117. 

  1117.   </table>
    1118. 

  1118.   <table border=1>
    1119. 

  1119.    <tr>
    1120. 

  1120.     <td>&nbsp;</td>
    1121. 

  1121.     <td>SMB0</td>
    1122. 

  1122.     <td>SMB1</td>
    1123. 

  1123.     <td>SMB2</td>
    1124. 

  1124.     <td>SMB3</td>
    1125. 

  1125.     <td>SMB4</td>
    1126. 

  1126.     <td>SMB5</td>
    1127. 

  1127.     <td>SMB6</td>
    1128. 

  1128.     <td>SMB7</td>
    1129. 

  1129.    </tr>
    1130. 

  1130.    <tr>
    1131. 

  1131.     <td>zp</td>
    1132. 

  1132.     <td>87</td>
    1133. 

  1133.     <td>97</td>
    1134. 

  1134.     <td>A7</td>
    1135. 

  1135.     <td>B7</td>
    1136. 

  1136.     <td>C7</td>
    1137. 

  1137.     <td>D7</td>
    1138. 

  1138.     <td>E7</td>
    1139. 

  1139.     <td>F7</td>
    1140. 

  1140.    </tr>
    1141. 

  1141.   </table>
    1142. 

  1142.   <p>
    1143. 

  1143.    Similarly, the test-and-branch instructions are of the form
    1144. 

  1144.    <b>xyyy1111</b>, where <b>x</b> is 0 to test whether the bit is 0, or
    1145. 

  1145.    1 to test whether it is 1, and <b>yyy</b> is which bit to test.
    1146. 

  1146.   </p>
    1147. 

  1147.   <table border=1 style="margin-bottom: 10px">
    1148. 

  1148.    <tr>
    1149. 

  1149.     <td>&nbsp;</td>
    1150. 

  1150.     <td>BBR0</td>
    1151. 

  1151.     <td>BBR1</td>
    1152. 

  1152.     <td>BBR2</td>
    1153. 

  1153.     <td>BBR3</td>
    1154. 

  1154.     <td>BBR4</td>
    1155. 

  1155.     <td>BBR5</td>
    1156. 

  1156.     <td>BBR6</td>
    1157. 

  1157.     <td>BBR7</td>
    1158. 

  1158.    </tr>
    1159. 

  1159.    <tr>
    1160. 

  1160.     <td>zp,rel</td>
    1161. 

  1161.     <td>0F</td>
    1162. 

  1162.     <td>1F</td>
    1163. 

  1163.     <td>2F</td>
    1164. 

  1164.     <td>3F</td>
    1165. 

  1165.     <td>4F</td>
    1166. 

  1166.     <td>5F</td>
    1167. 

  1167.     <td>6F</td>
    1168. 

  1168.     <td>7F</td>
    1169. 

  1169.    </tr>
    1170. 

  1170.   </table>
    1171. 

  1171.   <table border=1>
    1172. 

  1172.    <tr>
    1173. 

  1173.     <td>&nbsp;</td>
    1174. 

  1174.     <td>BBS0</td>
    1175. 

  1175.     <td>BBS1</td>
    1176. 

  1176.     <td>BBS2</td>
    1177. 

  1177.     <td>BBS3</td>
    1178. 

  1178.     <td>BBS4</td>
    1179. 

  1179.     <td>BBS5</td>
    1180. 

  1180.     <td>BBS6</td>
    1181. 

  1181.     <td>BBS7</td>
    1182. 

  1182.    </tr>
    1183. 

  1183.    <tr>
    1184. 

  1184.     <td>zp,rel</td>
    1185. 

  1185.     <td>8F</td>
    1186. 

  1186.     <td>9F</td>
    1187. 

  1187.     <td>AF</td>
    1188. 

  1188.     <td>BF</td>
    1189. 

  1189.     <td>CF</td>
    1190. 

  1190.     <td>DF</td>
    1191. 

  1191.     <td>EF</td>
    1192. 

  1192.     <td>FF</td>
    1193. 

  1193.    </tr>
    1194. 

  1194.   </table>
    1195. 

  1195.   <p>
    1196. 

  1196.    Additionally, the WDC version of the 65C02 includes the 65C816's STP and
    1197. 

  1197.    WAI instructions (see below).
    1198. 

  1198.   </p>
    1199. 

  1199.   <h3>"Undocumented" 65C02 Instructions</h3>
    1200. 

  1200.   <p>
    1201. 

  1201.    There aren't really any undocumented instructions on the 65C02--any
    1202. 

  1202.    instructions not listed above are documented as performing no
    1203. 

  1203.    operation.
    1204. 

  1204.   </p>
    1205. 

  1205.   <p>
    1206. 

  1206.    However, these alternate NOPs are not created equal. Some have one- or
    1207. 

  1207.    two-byte operands (which they don't do anything with), and they take
    1208. 

  1208.    different amounts of time to execute.
    1209. 

  1209.   </p>
    1210. 

  1210.   <table border=1>
    1211. 

  1211.    <tr><td>Instruction</td><td>Bytes</td><td>Cycles</td></tr>
    1212. 

  1212.    <tr><td>xxxxxx10</td><td>2</td><td>2</td></tr>
    1213. 

  1213.    <tr><td>xxxxxx11</td><td>1</td><td>1</td></tr>
    1214. 

  1214.    <tr><td>01000100</td><td>2</td><td>3</td></tr>
    1215. 

  1215.    <tr><td>x1x10100</td><td>2</td><td>4</td></tr>
    1216. 

  1216.    <tr><td>01011100</td><td>3</td><td>8</td></tr>
    1217. 

  1217.    <tr><td>11x11100</td><td>3</td><td>4</td></tr>
    1218. 

  1218.   </table>
    1219. 

  1219.   <p>Actually, it's not quite correct to say that these instructions don't do
    1220. 

  1220.    anything with their operands.  A memory read <em>does</em> occur,
    1221. 

  1221.    generally using the addressing mode you would expect from the bit
    1222. 

  1222.    patterns--which may be significant if there happens to be a memory-mapped
    1223. 

  1223.    hardware device at the target address.</p>
    1224. 

  1224.   <p>A correspondent with appropriate testing hardware reports that the
    1225. 

  1225.    behavior of 01011100 (5C) is strange:  "5C bb aa", after fetching its
    1226. 

  1226.    three bytes, accesses FFbb, and then spends four cycles accessing FFFF.</p>
    1227. 

  1227.   <h2><a name="ins816">65C816 Instructions</a></h2>
    1228. 

  1228.   <p>
    1229. 

  1229.    The 65C816 uses the <b>cc</b> = <b>11</b> instructions, but not for
    1230. 

  1230.    Rockwell bit-manipulation opcodes.
    1231. 

  1231.    Most of these are put to work supplying the new long addressing modes
    1232. 

  1232.    of the 65C816:
    1233. 

  1233.   </p>
    1234. 

  1234.   <table border=1>
    1235. 

  1235.    <tr><td><b>bbb</b></td><td>addressing mode</td></tr>
    1236. 

  1236.    <tr><td>000</td><td>offset,S</td></tr>
    1237. 

  1237.    <tr><td>001</td><td>[direct page]</td></tr>
    1238. 

  1238.    <tr><td>011</td><td>absolute long</td></tr>
    1239. 

  1239.    <tr><td>100</td><td>(offset,S),Y</td></tr>
    1240. 

  1240.    <tr><td>101</td><td>[direct page],Y</td></tr>
    1241. 

  1241.    <tr><td>111</td><td>absolute long,X</td></tr>
    1242. 

  1242.   </table>
    1243. 

  1243.   <p>
    1244. 

  1244.    These combine with the <b>01</b> opcodes:
    1245. 

  1245.   </p>
    1246. 

  1246.   <table border=1>
    1247. 

  1247.    <tr>
    1248. 

  1248.     <td>&nbsp;</td>
    1249. 

  1249.     <td>ORA</td>
    1250. 

  1250.     <td>AND</td>
    1251. 

  1251.     <td>EOR</td>
    1252. 

  1252.     <td>ADC</td>
    1253. 

  1253.     <td>STA</td>
    1254. 

  1254.     <td>LDA</td>
    1255. 

  1255.     <td>CMP</td>
    1256. 

  1256.     <td>SBC</td>
    1257. 

  1257.    </tr>
    1258. 

  1258.    <tr>
    1259. 

  1259.     <td>d,S</td>
    1260. 

  1260.     <td>03</td>
    1261. 

  1261.     <td>23</td>
    1262. 

  1262.     <td>43</td>
    1263. 

  1263.     <td>63</td>
    1264. 

  1264.     <td>83</td>
    1265. 

  1265.     <td>A3</td>
    1266. 

  1266.     <td>C3</td>
    1267. 

  1267.     <td>E3</td>
    1268. 

  1268.    </tr>
    1269. 

  1269.    <tr>
    1270. 

  1270.     <td>[dp]</td>
    1271. 

  1271.     <td>07</td>
    1272. 

  1272.     <td>27</td>
    1273. 

  1273.     <td>47</td>
    1274. 

  1274.     <td>67</td>
    1275. 

  1275.     <td>87</td>
    1276. 

  1276.     <td>A7</td>
    1277. 

  1277.     <td>C7</td>
    1278. 

  1278.     <td>E7</td>
    1279. 

  1279.    </tr>
    1280. 

  1280.    <tr>
    1281. 

  1281.     <td>al</td>
    1282. 

  1282.     <td>0F</td>
    1283. 

  1283.     <td>2F</td>
    1284. 

  1284.     <td>4F</td>
    1285. 

  1285.     <td>6F</td>
    1286. 

  1286.     <td>8F</td>
    1287. 

  1287.     <td>AF</td>
    1288. 

  1288.     <td>CF</td>
    1289. 

  1289.     <td>EF</td>
    1290. 

  1290.    </tr>
    1291. 

  1291.    <tr>
    1292. 

  1292.     <td>(d,S),Y</td>
    1293. 

  1293.     <td>13</td>
    1294. 

  1294.     <td>33</td>
    1295. 

  1295.     <td>53</td>
    1296. 

  1296.     <td>73</td>
    1297. 

  1297.     <td>93</td>
    1298. 

  1298.     <td>B3</td>
    1299. 

  1299.     <td>D3</td>
    1300. 

  1300.     <td>F3</td>
    1301. 

  1301.    </tr>
    1302. 

  1302.    <tr>
    1303. 

  1303.     <td>[dp],Y</td>
    1304. 

  1304.     <td>17</td>
    1305. 

  1305.     <td>37</td>
    1306. 

  1306.     <td>57</td>
    1307. 

  1307.     <td>77</td>
    1308. 

  1308.     <td>97</td>
    1309. 

  1309.     <td>B7</td>
    1310. 

  1310.     <td>D7</td>
    1311. 

  1311.     <td>F7</td>
    1312. 

  1312.    </tr>
    1313. 

  1313.    <tr>
    1314. 

  1314.     <td>al,X</td>
    1315. 

  1315.     <td>1F</td>
    1316. 

  1316.     <td>3F</td>
    1317. 

  1317.     <td>5F</td>
    1318. 

  1318.     <td>7F</td>
    1319. 

  1319.     <td>9F</td>
    1320. 

  1320.     <td>BF</td>
    1321. 

  1321.     <td>DF</td>
    1322. 

  1322.     <td>FF</td>
    1323. 

  1323.    </tr>
    1324. 

  1324.   </table>
    1325. 

  1325.   <p>
    1326. 

  1326.    The missing <b>010</b> and <b>110</b> instructions are all single-byte
    1327. 

  1327.    instructions:
    1328. 

  1328.   </p>
    1329. 

  1329.   <table border=1 style="margin-bottom: 10px">
    1330. 

  1330.    <tr>
    1331. 

  1331.     <td>PHD</td>
    1332. 

  1332.     <td>PLD</td>
    1333. 

  1333.     <td>PHK</td>
    1334. 

  1334.     <td>RTL</td>
    1335. 

  1335.     <td>PHB</td>
    1336. 

  1336.     <td>PLB</td>
    1337. 

  1337.     <td>WAI</td>
    1338. 

  1338.     <td>XBA</td>
    1339. 

  1339.    </tr>
    1340. 

  1340.    <tr>
    1341. 

  1341.     <td>0B</td>
    1342. 

  1342.     <td>2B</td>
    1343. 

  1343.     <td>4B</td>
    1344. 

  1344.     <td>6B</td>
    1345. 

  1345.     <td>8B</td>
    1346. 

  1346.     <td>AB</td>
    1347. 

  1347.     <td>CB</td>
    1348. 

  1348.     <td>EB</td>
    1349. 

  1349.    </tr>
    1350. 

  1350.   </table>
    1351. 

  1351.   <table border=1>
    1352. 

  1352.    <tr>
    1353. 

  1353.     <td>TCS</td>
    1354. 

  1354.     <td>TSC</td>
    1355. 

  1355.     <td>TCD</td>
    1356. 

  1356.     <td>TDC</td>
    1357. 

  1357.     <td>TXY</td>
    1358. 

  1358.     <td>TYX</td>
    1359. 

  1359.     <td>STP</td>
    1360. 

  1360.     <td>XCE</td>
    1361. 

  1361.    </tr>
    1362. 

  1362.    <tr>
    1363. 

  1363.     <td>1B</td>
    1364. 

  1364.     <td>3B</td>
    1365. 

  1365.     <td>5B</td>
    1366. 

  1366.     <td>7B</td>
    1367. 

  1367.     <td>9B</td>
    1368. 

  1368.     <td>BB</td>
    1369. 

  1369.     <td>DB</td>
    1370. 

  1370.     <td>FB</td>
    1371. 

  1371.    </tr>
    1372. 

  1372.   </table>
    1373. 

  1373.   <p>
    1374. 

  1374.    The remaining instructions are a grab-bag assigned to the few remaining
    1375. 

  1375.    unused positions:
    1376. 

  1376.   </p>
    1377. 

  1377.   <table border=1>
    1378. 

  1378.    <tr><td>COP sig</td><td>02</td></tr>
    1379. 

  1379.    <tr><td>JSL al</td><td>22</td></tr>
    1380. 

  1380.    <tr><td>WDM</td><td>42</td></tr>
    1381. 

  1381.    <tr><td>PER rl</td><td>62</td></tr>
    1382. 

  1382.    <tr><td>BRL rl</td><td>82</td></tr>
    1383. 

  1383.    <tr><td>REP #</td><td>C2</td></tr>
    1384. 

  1384.    <tr><td>SEP #</td><td>E2</td></tr>
    1385. 

  1385.    <tr><td>MVP sb,db</td><td>44</td></tr>
    1386. 

  1386.    <tr><td>MVN sb,db</td><td>54</td></tr>
    1387. 

  1387.    <tr><td>PEI dp</td><td>D4</td></tr>
    1388. 

  1388.    <tr><td>PEA abs</td><td>F4</td></tr>
    1389. 

  1389.    <tr><td>JMP al</td><td>5C</td></tr>
    1390. 

  1390.    <tr><td>JML (abs)</td><td>DC</td></tr>
    1391. 

  1391.    <tr><td>JSR (abs,X)</td><td>FC</td></tr>
    1392. 

  1392.   </table>
    1393. 

  1393.   <p><a href="http://www.llx.com/">LLX</a> &gt;
    1394. 

  1394.    <a href="/~nparker/">Neil Parker</a> &gt;
    1395. 

  1395.    <a href="index.html">Apple II</a> &gt; 6502 Instruction Set</p>
    1396. 

  1396.   <p>
    1397. 

  1397.    <small>Original: July 27, 2004<br>
    1398. 

  1398.    Modified: May 3, 2005<br>
    1399. 

  1399.    Modified: May 29, 2016--Added a new note about 65C02 "undocumented" opcodes</small>
    1400. 

  1400.   </p>
    1401. 

  1401.  </body>
    1402. 

  1402. </html>
    1403. 

  1403.