x86emu_regs.h 6.2 KB

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  1. /* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */
  2. /* $OpenBSD: x86emu_regs.h,v 1.2 2009/06/06 03:45:05 matthieu Exp $ */
  3. /****************************************************************************
  4. *
  5. * Realmode X86 Emulator Library
  6. *
  7. * Copyright (C) 1996-1999 SciTech Software, Inc.
  8. * Copyright (C) David Mosberger-Tang
  9. * Copyright (C) 1999 Egbert Eich
  10. * Copyright (C) 2007 Joerg Sonnenberger
  11. *
  12. * ========================================================================
  13. *
  14. * Permission to use, copy, modify, distribute, and sell this software and
  15. * its documentation for any purpose is hereby granted without fee,
  16. * provided that the above copyright notice appear in all copies and that
  17. * both that copyright notice and this permission notice appear in
  18. * supporting documentation, and that the name of the authors not be used
  19. * in advertising or publicity pertaining to distribution of the software
  20. * without specific, written prior permission. The authors makes no
  21. * representations about the suitability of this software for any purpose.
  22. * It is provided "as is" without express or implied warranty.
  23. *
  24. * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  25. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  26. * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  27. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
  28. * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
  29. * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  30. * PERFORMANCE OF THIS SOFTWARE.
  31. *
  32. ****************************************************************************/
  33. #ifndef __X86EMU_REGS_H
  34. #define __X86EMU_REGS_H
  35. /*---------------------- Macros and type definitions ----------------------*/
  36. /* 8 bit registers */
  37. #define R_AH register_a.I8_reg.h_reg
  38. #define R_AL register_a.I8_reg.l_reg
  39. #define R_BH register_b.I8_reg.h_reg
  40. #define R_BL register_b.I8_reg.l_reg
  41. #define R_CH register_c.I8_reg.h_reg
  42. #define R_CL register_c.I8_reg.l_reg
  43. #define R_DH register_d.I8_reg.h_reg
  44. #define R_DL register_d.I8_reg.l_reg
  45. /* 16 bit registers */
  46. #define R_AX register_a.I16_reg.x_reg
  47. #define R_BX register_b.I16_reg.x_reg
  48. #define R_CX register_c.I16_reg.x_reg
  49. #define R_DX register_d.I16_reg.x_reg
  50. /* 32 bit extended registers */
  51. #define R_EAX register_a.I32_reg.e_reg
  52. #define R_EBX register_b.I32_reg.e_reg
  53. #define R_ECX register_c.I32_reg.e_reg
  54. #define R_EDX register_d.I32_reg.e_reg
  55. /* special registers */
  56. #define R_SP register_sp.I16_reg.x_reg
  57. #define R_BP register_bp.I16_reg.x_reg
  58. #define R_SI register_si.I16_reg.x_reg
  59. #define R_DI register_di.I16_reg.x_reg
  60. #define R_IP register_ip.I16_reg.x_reg
  61. #define R_FLG register_flags
  62. /* special registers */
  63. #define R_ESP register_sp.I32_reg.e_reg
  64. #define R_EBP register_bp.I32_reg.e_reg
  65. #define R_ESI register_si.I32_reg.e_reg
  66. #define R_EDI register_di.I32_reg.e_reg
  67. #define R_EIP register_ip.I32_reg.e_reg
  68. #define R_EFLG register_flags
  69. /* segment registers */
  70. #define R_CS register_cs
  71. #define R_DS register_ds
  72. #define R_SS register_ss
  73. #define R_ES register_es
  74. #define R_FS register_fs
  75. #define R_GS register_gs
  76. /* flag conditions */
  77. #define FB_CF 0x0001 /* CARRY flag */
  78. #define FB_PF 0x0004 /* PARITY flag */
  79. #define FB_AF 0x0010 /* AUX flag */
  80. #define FB_ZF 0x0040 /* ZERO flag */
  81. #define FB_SF 0x0080 /* SIGN flag */
  82. #define FB_TF 0x0100 /* TRAP flag */
  83. #define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
  84. #define FB_DF 0x0400 /* DIR flag */
  85. #define FB_OF 0x0800 /* OVERFLOW flag */
  86. /* 80286 and above always have bit#1 set */
  87. #define F_ALWAYS_ON (0x0002) /* flag bits always on */
  88. /*
  89. * Define a mask for only those flag bits we will ever pass back
  90. * (via PUSHF)
  91. */
  92. #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
  93. /* following bits masked in to a 16bit quantity */
  94. #define F_CF 0x0001 /* CARRY flag */
  95. #define F_PF 0x0004 /* PARITY flag */
  96. #define F_AF 0x0010 /* AUX flag */
  97. #define F_ZF 0x0040 /* ZERO flag */
  98. #define F_SF 0x0080 /* SIGN flag */
  99. #define F_TF 0x0100 /* TRAP flag */
  100. #define F_IF 0x0200 /* INTERRUPT ENABLE flag */
  101. #define F_DF 0x0400 /* DIR flag */
  102. #define F_OF 0x0800 /* OVERFLOW flag */
  103. #define SET_FLAG(flag) (emu->x86.R_FLG |= (flag))
  104. #define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag))
  105. #define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag))
  106. #define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0)
  107. #define CONDITIONAL_SET_FLAG(COND,FLAG) \
  108. if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
  109. #define F_PF_CALC 0x010000 /* PARITY flag has been calced */
  110. #define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
  111. #define F_SF_CALC 0x040000 /* SIGN flag has been calced */
  112. #define F_ALL_CALC 0xff0000 /* All have been calced */
  113. /*
  114. * Emulator machine state.
  115. * Segment usage control.
  116. */
  117. #define SYSMODE_SEG_DS_SS 0x00000001
  118. #define SYSMODE_SEGOVR_CS 0x00000002
  119. #define SYSMODE_SEGOVR_DS 0x00000004
  120. #define SYSMODE_SEGOVR_ES 0x00000008
  121. #define SYSMODE_SEGOVR_FS 0x00000010
  122. #define SYSMODE_SEGOVR_GS 0x00000020
  123. #define SYSMODE_SEGOVR_SS 0x00000040
  124. #define SYSMODE_PREFIX_REPE 0x00000080
  125. #define SYSMODE_PREFIX_REPNE 0x00000100
  126. #define SYSMODE_PREFIX_DATA 0x00000200
  127. #define SYSMODE_PREFIX_ADDR 0x00000400
  128. #define SYSMODE_INTR_PENDING 0x10000000
  129. #define SYSMODE_EXTRN_INTR 0x20000000
  130. #define SYSMODE_HALTED 0x40000000
  131. #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
  132. SYSMODE_SEGOVR_CS | \
  133. SYSMODE_SEGOVR_DS | \
  134. SYSMODE_SEGOVR_ES | \
  135. SYSMODE_SEGOVR_FS | \
  136. SYSMODE_SEGOVR_GS | \
  137. SYSMODE_SEGOVR_SS)
  138. #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
  139. SYSMODE_SEGOVR_CS | \
  140. SYSMODE_SEGOVR_DS | \
  141. SYSMODE_SEGOVR_ES | \
  142. SYSMODE_SEGOVR_FS | \
  143. SYSMODE_SEGOVR_GS | \
  144. SYSMODE_SEGOVR_SS | \
  145. SYSMODE_PREFIX_DATA | \
  146. SYSMODE_PREFIX_ADDR)
  147. #define INTR_SYNCH 0x1
  148. #endif /* __X86EMU_REGS_H */