gpiosim.c 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153
  1. /* $OpenBSD: gpiosim.c,v 1.1 2008/11/23 18:46:49 mbalmer Exp $ */
  2. /*
  3. * Copyright (c) 2007 Marc Balmer <mbalmer@openbsd.org>
  4. * All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
  15. * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
  16. * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /* 32 bit wide GPIO simulator */
  19. #include <sys/param.h>
  20. #include <sys/systm.h>
  21. #include <sys/device.h>
  22. #include <sys/gpio.h>
  23. #include <sys/malloc.h>
  24. #include <sys/sysctl.h>
  25. #include <sys/ioccom.h>
  26. #include <dev/gpio/gpiovar.h>
  27. #include <dev/biovar.h>
  28. #define GPIOSIM_NPINS 32
  29. struct gpiosim_softc {
  30. struct device sc_dev;
  31. u_int32_t sc_state;
  32. struct gpio_chipset_tag sc_gpio_gc;
  33. gpio_pin_t sc_gpio_pins[GPIOSIM_NPINS];
  34. };
  35. struct gpiosim_op {
  36. void *cookie;
  37. u_int32_t mask;
  38. u_int32_t state;
  39. };
  40. #define GPIOSIMREAD _IOWR('G', 0, struct gpiosim_op)
  41. #define GPIOSIMWRITE _IOW('G', 1, struct gpiosim_op)
  42. int gpiosim_match(struct device *, void *, void *);
  43. void gpiosim_attach(struct device *, struct device *, void *);
  44. int gpiosim_ioctl(struct device *, u_long cmd, caddr_t data);
  45. int gpiosim_pin_read(void *, int);
  46. void gpiosim_pin_write(void *, int, int);
  47. void gpiosim_pin_ctl(void *, int, int);
  48. struct cfattach gpiosim_ca = {
  49. sizeof(struct gpiosim_softc), gpiosim_match, gpiosim_attach
  50. };
  51. struct cfdriver gpiosim_cd = {
  52. NULL, "gpiosim", DV_DULL
  53. };
  54. int
  55. gpiosim_match(struct device *parent, void *match, void *aux)
  56. {
  57. return 1;
  58. }
  59. void
  60. gpiosim_attach(struct device *parent, struct device *self, void *aux)
  61. {
  62. struct gpiosim_softc *sc = (void *)self;
  63. struct gpiobus_attach_args gba;
  64. int i;
  65. /* initialize pin array */
  66. for (i = 0; i < GPIOSIM_NPINS; i++) {
  67. sc->sc_gpio_pins[i].pin_num = i;
  68. sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT |
  69. GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN |
  70. GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN |
  71. GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
  72. /* read initial state */
  73. sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_INPUT;
  74. sc->sc_state = 0;
  75. /* create controller tag */
  76. sc->sc_gpio_gc.gp_cookie = sc;
  77. sc->sc_gpio_gc.gp_pin_read = gpiosim_pin_read;
  78. sc->sc_gpio_gc.gp_pin_write = gpiosim_pin_write;
  79. sc->sc_gpio_gc.gp_pin_ctl = gpiosim_pin_ctl;
  80. gba.gba_name = "gpio";
  81. gba.gba_gc = &sc->sc_gpio_gc;
  82. gba.gba_pins = sc->sc_gpio_pins;
  83. gba.gba_npins = GPIOSIM_NPINS;
  84. }
  85. printf("\n");
  86. config_found(&sc->sc_dev, &gba, gpiobus_print);
  87. bio_register(&sc->sc_dev, gpiosim_ioctl);
  88. }
  89. int
  90. gpiosim_ioctl(struct device *self, u_long cmd, caddr_t data)
  91. {
  92. struct gpiosim_softc *sc = (void *)self;
  93. struct gpiosim_op *op = (void *)data;
  94. switch (cmd) {
  95. case GPIOSIMREAD:
  96. op->state = sc->sc_state;
  97. break;
  98. case GPIOSIMWRITE:
  99. sc->sc_state = (sc->sc_state & ~op->mask) |
  100. (op->state & op->mask);
  101. break;
  102. }
  103. return 0;
  104. }
  105. int
  106. gpiosim_pin_read(void *arg, int pin)
  107. {
  108. struct gpiosim_softc *sc = (struct gpiosim_softc *)arg;
  109. if (sc->sc_state & (1 << pin))
  110. return GPIO_PIN_HIGH;
  111. else
  112. return GPIO_PIN_LOW;
  113. }
  114. void
  115. gpiosim_pin_write(void *arg, int pin, int value)
  116. {
  117. struct gpiosim_softc *sc = (struct gpiosim_softc *)arg;
  118. if (value == 0)
  119. sc->sc_state &= ~(1 << pin);
  120. else
  121. sc->sc_state |= (1 << pin);
  122. }
  123. void
  124. gpiosim_pin_ctl(void *arg, int pin, int flags)
  125. {
  126. struct gpiosim_softc *sc = (struct gpiosim_softc *)arg;
  127. sc->sc_gpio_pins[pin].pin_flags = flags;
  128. }