reload1.c 30 KB

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  1. /* Reload pseudo regs into hard regs for insns that require hard regs.
  2. Copyright (C) 1987 Free Software Foundation, Inc.
  3. This file is part of GNU CC.
  4. GNU CC is distributed in the hope that it will be useful,
  5. but WITHOUT ANY WARRANTY. No author or distributor
  6. accepts responsibility to anyone for the consequences of using it
  7. or for whether it serves any particular purpose or works at all,
  8. unless he says so in writing. Refer to the GNU CC General Public
  9. License for full details.
  10. Everyone is granted permission to copy, modify and redistribute
  11. GNU CC, but only under the conditions described in the
  12. GNU CC General Public License. A copy of this license is
  13. supposed to have been given to you along with GNU CC so you
  14. can know your rights and responsibilities. It should be in a
  15. file named COPYING. Among other things, the copyright notice
  16. and this notice must be preserved on all copies. */
  17. #include "config.h"
  18. #include "rtl.h"
  19. #include "regs.h"
  20. #include "hard-reg-set.h"
  21. #include "reload.h"
  22. #include "insn-config.h"
  23. #include "basic-block.h"
  24. #include <stdio.h>
  25. /* This file contains the reload pass of the compiler, which is
  26. run after register allocation has been done. It checks that
  27. each insn is valid (operands required to be in registers really
  28. are in registers of the proper class) and fixes up invalid ones
  29. by copying values temporarily into registers for the insns
  30. that need them.
  31. The results of register allocation are described by the vector
  32. reg_renumber; the insns still contain pseudo regs, but reg_renumber
  33. can be used to find which hard reg, if any, a pseudo reg is in.
  34. The technique we always use is to free up a few hard regs that are
  35. called ``reload regs'', and for each place where a pseudo reg
  36. must be in a hard reg, copy it temporarily into one of the reload regs.
  37. All the pseudos that were formerly allocated to the hard regs that
  38. are now in use as reload regs must be ``spilled''. This means
  39. that they go to other hard regs, or to stack slots if no other
  40. available hard regs can be found. Spilling can invalidate more
  41. insns, requiring additional need for reloads, so we must keep checking
  42. until the process stabilizes.
  43. For machines with different classes of registers, we must keep track
  44. of the register class needed for each reload, and make sure that
  45. we allocate enough reload registers of each class.
  46. The file reload.c contains the code that checks one insn for
  47. validity and reports the reloads that it needs. This file
  48. is in charge of scanning the entire rtl code, accumulating the
  49. reload needs, spilling, assigning reload registers to use for
  50. fixing up each insn, and generating the new insns to copy values
  51. into the reload registers. */
  52. /* During reload_as_needed, element N contains a REG rtx for the hard reg
  53. into which pseudo reg N has been reloaded (perhaps for a previous insn). */
  54. static rtx *reg_last_reload_reg;
  55. /* Element N is the constant value to which pseudo reg N is equivalent,
  56. or zero if pseudo reg N is not equivalent to a constant.
  57. find_reloads looks at this in order to replace pseudo reg N
  58. with the constant it stands for. */
  59. rtx *reg_equiv_constant;
  60. /* During reload_as_needed, element N contains the last pseudo regno
  61. reloaded into the Nth reload register. This vector is in parallel
  62. with spill_regs. */
  63. static int reg_reloaded_contents[FIRST_PSEUDO_REGISTER];
  64. /* In parallel with spill_regs, contains REG rtx's for those regs.
  65. Holds the last rtx used for any given reg, or 0 if it has never
  66. been used for spilling yet. This rtx is reused, provided it has
  67. the proper mode. */
  68. static rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER];
  69. /* In parallel with spill_regs, contains nonzero for a spill reg
  70. that was stored after the last time it was used.
  71. The precise value is the insn generated to do the store. */
  72. static rtx spill_reg_store[FIRST_PSEUDO_REGISTER];
  73. /* This table is the inverse mapping of spill_regs:
  74. indexed by hard reg number,
  75. it contains the position of that reg in spill_regs,
  76. or -1 for something that is not in spill_regs. */
  77. static short spill_reg_order[FIRST_PSEUDO_REGISTER];
  78. /* Describes order of use of registers for reloading
  79. of spilled pseudo-registers. `spills' is the number of
  80. elements that are actually valid; new ones are added at the end. */
  81. static char spill_regs[FIRST_PSEUDO_REGISTER];
  82. /* Describes order of preference for putting regs into spill_regs.
  83. Contains the numbers of all the hard regs, in order most preferred first.
  84. This order is different for each function.
  85. It is set up by order_regs_for_reload. */
  86. static char potential_reload_regs[FIRST_PSEUDO_REGISTER];
  87. /* Nonzero if spilling (REG n) does not require reloading it into
  88. a register in order to do (MEM (REG n)). */
  89. static char spill_indirect_ok;
  90. /* Tables describing and classifying the hardware registers. */
  91. static HARD_REG_SET reg_class_contents[] = REG_CLASS_CONTENTS;
  92. static enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES]
  93. = REG_CLASS_SUPERCLASSES;
  94. /* Indexed by hard register number, contains 1 for registers
  95. that are fixed use (stack pointer, pc, frame pointer, etc.).
  96. These are the registers that cannot be used to allocate
  97. a pseudo reg whose life does not cross calls. */
  98. static char fixed_regs[] = FIXED_REGISTERS;
  99. /* Indexed by hard register number, contains 1 for registers
  100. that are fixed use or are clobbered by function calls.
  101. These are the registers that cannot be used to allocate
  102. a pseudo reg whose life crosses calls. */
  103. static char call_clobbered_regs[] = CALL_USED_REGISTERS;
  104. static void reload_as_needed ();
  105. static void choose_reload_targets ();
  106. static void forget_old_reloads ();
  107. static void order_regs_for_reload ();
  108. /* Main entry point for the reload pass, and only entry point
  109. in this file.
  110. FIRST is the first insn of the function being compiled.
  111. GLOBAL nonzero means we were called from global_alloc
  112. and should attempt to reallocate any pseudoregs that we
  113. displace from hard regs we will use for reloads.
  114. If GLOBAL is zero, we do not have enough information to do that,
  115. so any pseudo reg that is spilled must go to the stack.
  116. DUMPFILE is the global-reg debugging dump file stream, or 0.
  117. If it is nonzero, messages are written to it to describe
  118. which registers are seized as reload regs, which pseudo regs
  119. are spilled from them, and where the pseudo regs are reallocated to. */
  120. void
  121. reload (first, global, dumpfile)
  122. rtx first;
  123. int global;
  124. FILE *dumpfile;
  125. {
  126. register int n_spills;
  127. register int class;
  128. register int i;
  129. int something_changed;
  130. int something_needs_reloads;
  131. /* Compute which hard registers are now in use
  132. as homes for pseudo registers.
  133. This is done here rather than (eg) in global_alloc
  134. because this point is reached even if not optimizing. */
  135. for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
  136. mark_home_live (i);
  137. #ifndef REGISTER_CONSTRAINTS
  138. /* If all the pseudo regs have hard regs,
  139. except for those that are never referenced,
  140. we know that no reloads are needed. */
  141. /* But that is not true if there are register constraints, since
  142. in that case some pseudos might be in the wrong kind of hard reg. */
  143. for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
  144. if (reg_renumber[i] == -1 && reg_n_refs[i] != 0)
  145. break;
  146. if (i == max_regno)
  147. return;
  148. #endif
  149. reg_equiv_constant = (rtx *) alloca (max_regno * sizeof (rtx));
  150. bzero (reg_equiv_constant, max_regno * sizeof (rtx));
  151. /* Compute the order of preference for hard registers to spill.
  152. Store them by decreasing preference in potential_reload_regs. */
  153. order_regs_for_reload ();
  154. /* So far, no hard regs have been spilled. */
  155. n_spills = 0;
  156. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  157. spill_reg_order[i] = -1;
  158. /* This loop scans the entire function each go-round
  159. and repeats until one repetition spills no additional hard regs. */
  160. /* This flag is set when a psuedo reg is spilled,
  161. to require another pass. Note that getting an additional reload
  162. reg does not necessarily imply any pseudo reg was spilled;
  163. sometimes we find a reload reg that no pseudo reg was allocated in. */
  164. something_changed = 1;
  165. /* This flag is set if there are any insns that require reloading. */
  166. something_needs_reloads = 0;
  167. while (something_changed)
  168. {
  169. register rtx insn;
  170. /* For each class, number of reload regs needed in that class.
  171. This is the maximum over all insns of the needs in that class
  172. of the individual insn. */
  173. int max_needs[N_REG_CLASSES];
  174. something_changed = 0;
  175. bzero (max_needs, sizeof max_needs);
  176. /* Compute the most additional registers needed by any instruction.
  177. Collect information separately for each class of regs. */
  178. for (insn = first; insn; insn = NEXT_INSN (insn))
  179. {
  180. if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
  181. || GET_CODE (insn) == CALL_INSN)
  182. {
  183. register int r;
  184. int insn_needs[N_REG_CLASSES];
  185. /* While we are scanning all the insns, note those that
  186. initialize a pseudo reg from constant, where the
  187. pseudo reg does not have a hard reg and its value
  188. never changes. Delete these insns and record the
  189. constant values to be substituted for the pseudoregs. */
  190. if (REG_NOTES (insn) != 0
  191. && (enum reg_note) GET_MODE (REG_NOTES (insn)) == REG_CONST)
  192. {
  193. i = REGNO (SET_DEST (PATTERN (insn)));
  194. if (reg_renumber[i] < 0)
  195. {
  196. reg_equiv_constant[i] = SET_SRC (PATTERN (insn));
  197. /* This pseudo register needs no stack slot. */
  198. reg_n_refs[i] = 0;
  199. /* Delete the insn that loads the pseudo register. */
  200. PUT_CODE (insn, NOTE);
  201. NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
  202. NOTE_SOURCE_FILE (insn) = 0;
  203. continue;
  204. }
  205. }
  206. for (i = 0; i < N_REG_CLASSES; i++)
  207. insn_needs[i] = 0;
  208. /* Analyze the instruction. */
  209. find_reloads (insn, 0, spill_indirect_ok, global, spill_reg_order);
  210. if (n_reloads == 0)
  211. continue;
  212. something_needs_reloads = 1;
  213. /* Count each reload once in every class
  214. containing the reload's own class. */
  215. for (i = 0; i < n_reloads; i++)
  216. {
  217. register enum reg_class *p;
  218. /* Don't count the dummy reloads, for which one of the
  219. regs mentioned in the insn can be used for reloading.
  220. Don't count optional reloads. */
  221. if (reload_reg_rtx[i] != 0
  222. || reload_optional[i] != 0)
  223. continue;
  224. insn_needs[(int) reload_reg_class[i]]++;
  225. p = reg_class_superclasses[(int) reload_reg_class[i]];
  226. while (*p != LIM_REG_CLASSES)
  227. insn_needs[(int) *p++]++;
  228. }
  229. /* Remember for later shortcuts which insns had any reloads. */
  230. PUT_MODE (insn, n_reloads ? QImode : VOIDmode);
  231. /* For each class, collect maximum need of any insn */
  232. for (i = 0; i < N_REG_CLASSES; i++)
  233. if (max_needs[i] < insn_needs[i])
  234. max_needs[i] = insn_needs[i];
  235. }
  236. /* Note that there is a continue statement above. */
  237. }
  238. /* Now deduct from the needs for the registers already
  239. available (already spilled). */
  240. for (i = 0; i < n_spills; i++)
  241. {
  242. register enum reg_class *p;
  243. class = (int) REGNO_REG_CLASS (spill_regs[i]);
  244. max_needs[class]--;
  245. p = reg_class_superclasses[class];
  246. while (*p != LIM_REG_CLASSES)
  247. max_needs[(int) *p++]--;
  248. }
  249. /* If all needs are met, we win. */
  250. for (i = 0; i < N_REG_CLASSES; i++)
  251. if (max_needs[i] > 0)
  252. break;
  253. if (i == N_REG_CLASSES)
  254. break;
  255. /* Not all needs are met; must spill more hard regs.
  256. Now find more reload regs to satisfy the remaining need.
  257. Count them in `spills', and add entries to
  258. `spill_regs' and `spill_reg_order'. */
  259. for (class = 0; class < N_REG_CLASSES; class++)
  260. while (max_needs[class] > 0)
  261. {
  262. register enum reg_class *p;
  263. /* Consider the potential reload regs that aren't
  264. yet in use as reload regs, in order of preference.
  265. Find the most preferred one that's in this class. */
  266. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  267. if (potential_reload_regs[i] >= 0
  268. && TEST_HARD_REG_BIT (reg_class_contents[class],
  269. potential_reload_regs[i]))
  270. break;
  271. if (i == FIRST_PSEUDO_REGISTER)
  272. abort (); /* No reload reg possible? */
  273. /* Make potential_reload_regs[i] an additional reload reg. */
  274. spill_regs[n_spills] = potential_reload_regs[i];
  275. spill_reg_order[potential_reload_regs[i]] = n_spills;
  276. potential_reload_regs[i] = -1;
  277. if (dumpfile)
  278. fprintf (dumpfile, "Spilling reg %d.\n", spill_regs[n_spills]);
  279. /* Clear off the needs we just satisfied. */
  280. max_needs[class]--;
  281. p = reg_class_superclasses[class];
  282. while (*p != LIM_REG_CLASSES)
  283. max_needs[(int) *p++]--;
  284. /* Spill every pseudo reg that was allocated to this reg
  285. or to something that overlaps this reg. */
  286. for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
  287. if (reg_renumber[i] >= 0
  288. && reg_renumber[i] <= spill_regs[n_spills]
  289. && (reg_renumber[i]
  290. + HARD_REGNO_NREGS (reg_renumber[i],
  291. PSEUDO_REGNO_MODE (i))
  292. > spill_regs[n_spills]))
  293. {
  294. /* Mark it as no longer having a hard register home. */
  295. reg_renumber[i] = -1;
  296. /* We will need to scan everything again. */
  297. something_changed = 1;
  298. if (global)
  299. {
  300. retry_global_alloc (i, spill_regs[n_spills],
  301. spill_reg_order);
  302. /* Update regs_ever_live for new home (if any). */
  303. mark_home_live (i);
  304. }
  305. if (dumpfile)
  306. {
  307. if (reg_renumber[i] == -1)
  308. fprintf (dumpfile, " Register %d now on stack.\n", i);
  309. else
  310. fprintf (dumpfile, " Register %d now in %d.\n",
  311. i, reg_renumber[i]);
  312. }
  313. if (dumpfile)
  314. fprintf (dumpfile, "\n");
  315. }
  316. regs_ever_live[spill_regs[n_spills]] = 1;
  317. n_spills++;
  318. }
  319. }
  320. /* Use the reload registers where necessary
  321. by generating move instructions to move the must-be-register
  322. values into or out of the reload registers. */
  323. if (something_needs_reloads)
  324. reload_as_needed (first, n_spills, global);
  325. }
  326. /* Mark the slots in regs_ever_live for the hard regs
  327. used by pseudo-reg number REGNO. */
  328. mark_home_live (regno)
  329. int regno;
  330. {
  331. register int i, lim;
  332. i = reg_renumber[regno];
  333. if (i < 0)
  334. return;
  335. lim = i + HARD_REGNO_NREGS (i, PSEUDO_REGNO_MODE (regno));
  336. while (i < lim)
  337. regs_ever_live[i++] = 1;
  338. }
  339. struct hard_reg_n_uses { int regno; int uses; };
  340. static int
  341. hard_reg_used_less_p (p1, p2)
  342. struct hard_reg_n_uses *p1, *p2;
  343. {
  344. return p1->uses - p2->uses;
  345. }
  346. /* Choose the order to consider regs for use as reload registers
  347. based on how much trouble would be caused by spilling one.
  348. Store them in order of decreasing preference in potential_reload_regs. */
  349. static void
  350. order_regs_for_reload ()
  351. {
  352. register int i;
  353. register int o = 0;
  354. struct hard_reg_n_uses hard_reg_n_uses[FIRST_PSEUDO_REGISTER];
  355. /* Count number of uses of each hard reg by pseudo regs allocated to it
  356. and then order them by decreasing use. */
  357. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  358. {
  359. hard_reg_n_uses[i].uses = 0;
  360. hard_reg_n_uses[i].regno = i;
  361. }
  362. for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
  363. if (reg_renumber[i] >= 0)
  364. hard_reg_n_uses[reg_renumber[i]].uses += reg_n_refs[i];
  365. qsort (hard_reg_n_uses, FIRST_PSEUDO_REGISTER,
  366. sizeof hard_reg_n_uses[0], hard_reg_used_less_p);
  367. /* Prefer registers not so far used, for use in temporary loading.
  368. Among them, prefer registers not preserved by calls. */
  369. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  370. if (regs_ever_live[i] == 0 && call_clobbered_regs[i]
  371. && ! fixed_regs[i])
  372. potential_reload_regs[o++] = i;
  373. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  374. if (regs_ever_live[i] == 0 && ! call_clobbered_regs[i])
  375. potential_reload_regs[o++] = i;
  376. /* Now add the regs that are already used,
  377. preferring those used less often. */
  378. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  379. if (regs_ever_live[hard_reg_n_uses[i].regno] != 0)
  380. potential_reload_regs[o++] = hard_reg_n_uses[i].regno;
  381. #if 0
  382. /* For regs that are used, don't prefer those not preserved by calls
  383. because those are likely to contain high priority things
  384. that are live for short periods of time. */
  385. for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
  386. if (regs_ever_live[i] != 0 && ! call_clobbered_regs[i])
  387. potential_reload_regs[o++] = i;
  388. #endif
  389. }
  390. /* Reload pseudo-registers into hard regs around each insn as needed.
  391. Additional register load insns are output before the insn that needs it
  392. and perhaps store insns after insns that modify the reloaded pseudo reg.
  393. reg_last_reload_reg and reg_reloaded_contents keep track of
  394. which pseudo-registers are already available in reload registers.
  395. We update these for the reloads that we perform,
  396. as the insns are scanned. */
  397. static void
  398. reload_as_needed (first, n_spills, live_known)
  399. rtx first;
  400. int n_spills;
  401. int live_known;
  402. {
  403. register rtx insn;
  404. register int i;
  405. /* Often (MEM (REG n)) is still valid even if (REG n) is put on the stack.
  406. Set spill_indirect_ok if so. */
  407. register rtx tem
  408. = gen_rtx (MEM, SImode,
  409. gen_rtx (PLUS, Pmode,
  410. gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM),
  411. gen_rtx (CONST_INT, VOIDmode, 4)));
  412. spill_indirect_ok = 1;
  413. GO_IF_LEGITIMATE_ADDRESS (QImode, tem, wins);
  414. spill_indirect_ok = 0;
  415. wins:
  416. bzero (spill_reg_rtx, sizeof spill_reg_rtx);
  417. reg_last_reload_reg = (rtx *) alloca (max_regno * sizeof (rtx));
  418. bzero (reg_last_reload_reg, max_regno * sizeof (rtx));
  419. for (i = 0; i < n_spills; i++)
  420. reg_reloaded_contents[i] = -1;
  421. for (insn = first; insn;)
  422. {
  423. register rtx next = NEXT_INSN (insn);
  424. if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
  425. || GET_CODE (insn) == CALL_INSN)
  426. {
  427. if (GET_MODE (insn) == VOIDmode)
  428. n_reloads = 0;
  429. /* First find the pseudo regs that must be reloaded for this insn.
  430. This info is returned in the tables reload_... (see reload.h).
  431. Also modify the body of INSN by substituting RELOAD
  432. rtx's for those pseudo regs. */
  433. else
  434. find_reloads (insn, 1, spill_indirect_ok, live_known, spill_reg_order);
  435. if (n_reloads > 0)
  436. {
  437. /* Now compute which reload regs to reload them into. Perhaps
  438. reusing reload regs from previous insns, or else output
  439. load insns to reload them. Maybe output store insns too.
  440. Record the choices of reload reg in reload_reg_rtx. */
  441. choose_reload_targets (insn, n_spills);
  442. /* Substitute the chosen reload regs from reload_reg_rtx
  443. into the insn's body (or perhaps into the bodies of other
  444. load and store insn that we just made for reloading
  445. and that we moved the structure into). */
  446. subst_reloads ();
  447. }
  448. /* Any previously reloaded spilled pseudo reg, stored in this insn,
  449. is no longer validly lying around to save a future reload.
  450. Note that this does not detect pseudos that were reloaded
  451. for this insn in order to be stored in
  452. (obeying register constraints). That is correct; such reload
  453. registers ARE still valid. */
  454. forget_old_reloads (PATTERN (insn));
  455. }
  456. /* Don't assume a spilled reg is still good after a call insn;
  457. it could be (and probably is) a call_clobbered_reg. */
  458. if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == CALL_INSN)
  459. {
  460. for (i = 0; i < n_spills; i++)
  461. reg_reloaded_contents[i] = -1;
  462. }
  463. insn = next;
  464. }
  465. }
  466. /* If we see a pseudo-reg being stored into,
  467. don't try to reuse an old reload reg
  468. which previously contained a copy of it. */
  469. static void
  470. forget_old_reloads (x)
  471. rtx x;
  472. {
  473. if (GET_CODE (x) == SET && GET_CODE (SET_DEST (x)) == REG)
  474. {
  475. register int regno = REGNO (SET_DEST (x));
  476. reg_last_reload_reg[regno] = 0;
  477. }
  478. else if (GET_CODE (x) == PARALLEL)
  479. {
  480. register int i;
  481. for (i = 0; i < XVECLEN (x, 0); i++)
  482. {
  483. register rtx y = XVECEXP (x, 0, i);
  484. if (GET_CODE (y) == SET && GET_CODE (SET_DEST (y)) == REG)
  485. {
  486. register int regno = REGNO (SET_DEST (y));
  487. reg_last_reload_reg[regno] = 0;
  488. }
  489. }
  490. }
  491. }
  492. static int
  493. reload_reg_class_lower_p (p1, p2)
  494. short *p1, *p2;
  495. {
  496. register int r1 = *p1, r2 = *p2;
  497. /* Consider required reloads before optional ones. */
  498. register int t = reload_optional[r1] - reload_optional[r2];
  499. if (t) return t;
  500. return (int) reload_reg_class[r1] - (int) reload_reg_class[r2];
  501. }
  502. /* Assign hard reg targets for the pseudo-registers we must reload
  503. into hard regs for this insn.
  504. Also output the instructions to copy them in and out of the hard regs.
  505. For machines with register classes, we are responsible for
  506. finding a reload reg in the proper class. */
  507. static void
  508. choose_reload_targets (insn, n_spills)
  509. rtx insn;
  510. int n_spills;
  511. {
  512. register int j;
  513. char reload_reg_in_use[FIRST_PSEUDO_REGISTER];
  514. short reload_order[FIRST_PSEUDO_REGISTER];
  515. char reload_inherited[FIRST_PSEUDO_REGISTER];
  516. /* For each reload, the index in spill_regs of the spill register used,
  517. or -1 if we did not need one of the spill registers for this reload. */
  518. int reload_spill_index[FIRST_PSEUDO_REGISTER];
  519. bzero (reload_inherited, FIRST_PSEUDO_REGISTER);
  520. bzero (reload_reg_in_use, FIRST_PSEUDO_REGISTER);
  521. /* In order to be certain of getting the registers we need,
  522. we must sort the reloads into order of increasing register class.
  523. Then our grabbing of reload registers will parallel the process
  524. that provided the reload registers. */
  525. /* This used to look for an existing reloaded home for all
  526. of the reloads, and only then perform any new reloads.
  527. But that could lose if the reloads were done out of reg-class order
  528. because a later reload with a looser constraint might have an old
  529. home in a register needed by an earlier reload with a tighter constraint.
  530. It would be possible with even hairier code to detect such cases
  531. and handle them, but it doesn't seem worth while yet. */
  532. for (j = 0; j < n_reloads; j++)
  533. {
  534. reload_order[j] = j;
  535. reload_spill_index[j] = -1;
  536. }
  537. if (n_reloads > 1)
  538. qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower_p);
  539. for (j = 0; j < n_reloads; j++)
  540. {
  541. register int r = reload_order[j];
  542. register int i;
  543. register rtx new;
  544. /* No need to find a reload-register if find_reloads chose one. */
  545. if (reload_reg_rtx[r] != 0)
  546. continue;
  547. /* First see if this pseudo is already available as reloaded
  548. for a previous insn. */
  549. {
  550. register int regno;
  551. if (reload_in[r] != 0
  552. && GET_CODE (reload_in[r]) == REG
  553. && (regno = REGNO (reload_in[r]),
  554. reg_last_reload_reg[regno]))
  555. {
  556. i = spill_reg_order[REGNO (reg_last_reload_reg[regno])];
  557. if (reg_reloaded_contents[i] == regno
  558. && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[r]],
  559. spill_regs[i]))
  560. {
  561. /* Mark the reload register as in use for this insn. */
  562. reload_reg_rtx[r] = reg_last_reload_reg[regno];
  563. reload_reg_in_use[i] = 1;
  564. reload_inherited[r] = 1;
  565. reload_spill_index[r] = i;
  566. }
  567. }
  568. }
  569. /* If this is not a pseudo, here's a different way to see
  570. if it is already lying around. */
  571. if (reload_in[r] != 0 && CONSTANT_ADDRESS_P (reload_in[r]))
  572. {
  573. register rtx equiv
  574. = find_equiv_reg (reload_in[r], insn, reload_reg_class[r], -1, 0);
  575. /* If we found an equivalent reg, say no code need be generated
  576. to load it, and use it as our reload reg. */
  577. if (equiv != 0)
  578. {
  579. reload_reg_rtx[r] = equiv;
  580. reload_inherited[r] = 1;
  581. /* If it is a spill reg,
  582. mark the spill reg as in use for this insn. */
  583. if ((i = spill_reg_order[REGNO (equiv)]) != 0)
  584. {
  585. reload_reg_in_use[i] = 1;
  586. }
  587. }
  588. }
  589. /* If it isn't lying around, and isn't optional,
  590. find a place to reload it into. */
  591. if (reload_reg_rtx[r] != 0 || reload_optional[r] != 0)
  592. continue;
  593. /* Value not lying around; find a register to reload it into.
  594. Here I is not a regno, it is an index into spill_regs. */
  595. for (i = 0; i < n_spills; i++)
  596. {
  597. if (reload_reg_in_use[i] == 0
  598. && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[r]],
  599. spill_regs[i]))
  600. break;
  601. }
  602. if (i == n_spills)
  603. abort ();
  604. reload_reg_in_use[i] = 1;
  605. new = spill_reg_rtx[i];
  606. if (new == 0 || GET_MODE (new) != reload_mode[r])
  607. spill_reg_rtx[i] = new = gen_rtx (REG, reload_mode[r], spill_regs[i]);
  608. reload_reg_rtx[r] = new;
  609. reload_spill_index[r] = i;
  610. reg_reloaded_contents[i] = -1;
  611. }
  612. /* Now for all the spill regs newly used in this instruction,
  613. record what psuedo-regs they contain copies of,
  614. to save code for reloads of subsequent instructions.
  615. If reload_reg_rtx[r] is 0, this is an optional reload
  616. that we opted to ignore. */
  617. for (j = 0; j < n_reloads; j++)
  618. {
  619. register int r = reload_order[j];
  620. register int i = reload_spill_index[r];
  621. if (i >= 0 && reload_reg_rtx[r] != 0)
  622. {
  623. if (reload_out[r] != 0 && GET_CODE (reload_out[r]) == REG)
  624. {
  625. register int nregno = REGNO (reload_out[r]);
  626. reg_last_reload_reg[nregno] = reload_reg_rtx[r];
  627. reg_reloaded_contents[i] = nregno;
  628. }
  629. if (reload_out[r] == 0 && GET_CODE (reload_in[r]) == REG)
  630. {
  631. register int nregno = REGNO (reload_in[r]);
  632. reg_last_reload_reg[nregno] = reload_reg_rtx[r];
  633. reg_reloaded_contents[i] = nregno;
  634. }
  635. }
  636. }
  637. /* Now output the instructions to copy the data into and out of the
  638. reload registers. Do these in the order that the reloads were reported,
  639. since reloads of base and index registers precede reloads of operands
  640. and the operands may need the base and index registers reloaded. */
  641. for (j = 0; j < n_reloads; j++)
  642. {
  643. register rtx old;
  644. old = reload_in[j];
  645. if (old != 0 && ! reload_inherited[j]
  646. && reload_reg_rtx[j] != old
  647. && reload_reg_rtx[j] != 0)
  648. {
  649. register rtx reloadreg = reload_reg_rtx[j];
  650. /* Encapsulate RELOADREG so its machine mode matches what
  651. is being copied into it.
  652. Except, if OLD is multiple regs and we are only using one,
  653. reload only that one. */
  654. if (GET_CODE (old) == SUBREG
  655. && !(GET_MODE_SIZE (GET_MODE (SUBREG_REG (old))) > UNITS_PER_WORD
  656. && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (old)))
  657. > GET_MODE_SIZE (GET_MODE (old)))))
  658. old = SUBREG_REG (old);
  659. if (GET_MODE (old) != VOIDmode
  660. && GET_MODE (reloadreg) != GET_MODE (old))
  661. reloadreg = gen_rtx (SUBREG, GET_MODE (old), reloadreg, 0);
  662. emit_insn_before (gen_move_insn (reloadreg, old), insn);
  663. /* If this reload wants reload_in[j] incremented by a constant,
  664. output code to get this done before the insn reloaded for. */
  665. if (reload_inc[j] != 0)
  666. {
  667. /* If reload_in[j] is a register, assume we can
  668. output an insn to increment it directly. */
  669. if (GET_CODE (old) == REG &&
  670. (REGNO (old) < FIRST_PSEUDO_REGISTER
  671. || reg_renumber[REGNO (old)] >= 0))
  672. emit_insn_before (gen_add2_insn (old,
  673. gen_rtx (CONST_INT, VOIDmode,
  674. reload_inc[j])),
  675. insn);
  676. else
  677. /* Else we must not assume we can increment reload_in[j]
  678. (even though on many target machines we can);
  679. increment the copy in the reload register,
  680. save that back, then decrement the reload register
  681. so it has its original contents. */
  682. {
  683. emit_insn_before (gen_add2_insn (reloadreg,
  684. gen_rtx (CONST_INT, VOIDmode,
  685. reload_inc[j])),
  686. insn);
  687. emit_insn_before (gen_move_insn (old, reloadreg), insn);
  688. emit_insn_before (gen_sub2_insn (reloadreg,
  689. gen_rtx (CONST_INT, VOIDmode,
  690. reload_inc[j])),
  691. insn);
  692. }
  693. }
  694. }
  695. /* If we are reloading a register that was recently
  696. reloaded for writing, see if we can prove there was
  697. actually no need to store the old value in it. */
  698. if (reload_inherited[j] && reload_spill_index[j] >= 0
  699. && spill_reg_store[reload_spill_index[j]] != 0
  700. && dead_or_set_p (insn, reload_in[j]))
  701. {
  702. register rtx i1;
  703. /* If the spilled-reg we are reloading is no longer referenced
  704. anywhere between the store into it and here,
  705. we can delete that store. */
  706. for (i1 = NEXT_INSN (spill_reg_store[reload_spill_index[j]]);
  707. i1 != insn; i1 = NEXT_INSN (i1))
  708. if ((GET_CODE (i1) == INSN || GET_CODE (i1) == JUMP_INSN
  709. || GET_CODE (i1) == CALL_INSN)
  710. && reg_mentioned_p (reload_in[j], PATTERN (i1)))
  711. break;
  712. if (i1 == insn)
  713. {
  714. delete_insn (spill_reg_store[reload_spill_index[j]]);
  715. /* See if the spilled-reg has been completely replaced
  716. with reload regs. If so, set its reg_n_refs to 0
  717. so no stack slot will be made for it. */
  718. if (reg_n_deaths[REGNO (reload_in[j])] == 1
  719. && reg_basic_block[REGNO (reload_in[j])] >= 0)
  720. {
  721. /* We know that it was used only between here
  722. and the beginning of the current basic block.
  723. Search that range; see if any ref remains. */
  724. for (i1 = PREV_INSN (insn); i1; i1 = PREV_INSN (i1))
  725. {
  726. if (GET_CODE (i1) == CODE_LABEL
  727. || GET_CODE (i1) == JUMP_INSN)
  728. break;
  729. if ((GET_CODE (i1) == INSN || GET_CODE (i1) == CALL_INSN)
  730. && reg_mentioned_p (reload_in[j], PATTERN (i1)))
  731. goto still_used;
  732. }
  733. reg_n_refs[REGNO (reload_in[j])] = 0;
  734. still_used: ;
  735. }
  736. }
  737. }
  738. old = reload_out[j];
  739. if (old != 0
  740. && reload_reg_rtx[j] != old
  741. && reload_reg_rtx[j] != 0)
  742. {
  743. register rtx reloadreg = reload_reg_rtx[j];
  744. if (GET_CODE (old) == SUBREG
  745. && !(GET_MODE_SIZE (GET_MODE (SUBREG_REG (old))) > UNITS_PER_WORD
  746. && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (old)))
  747. > GET_MODE_SIZE (GET_MODE (old)))))
  748. old = SUBREG_REG (old);
  749. if (GET_MODE (reloadreg) != GET_MODE (old))
  750. reloadreg = gen_rtx (SUBREG, GET_MODE (old), reloadreg, 0);
  751. spill_reg_store[reload_spill_index[j]]
  752. = emit_insn_after (gen_move_insn (old, reloadreg), insn);
  753. }
  754. else
  755. spill_reg_store[reload_spill_index[j]] = 0;
  756. }
  757. }