md 40 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644
  1. ;;- Machine description for GNU compiler
  2. ;;- Vax Version
  3. ;; Copyright (C) 1987 Free Software Foundation, Inc.
  4. ;; This file is part of GNU CC.
  5. ;; GNU CC is distributed in the hope that it will be useful,
  6. ;; but WITHOUT ANY WARRANTY. No author or distributor
  7. ;; accepts responsibility to anyone for the consequences of using it
  8. ;; or for whether it serves any particular purpose or works at all,
  9. ;; unless he says so in writing. Refer to the GNU CC General Public
  10. ;; License for full details.
  11. ;; Everyone is granted permission to copy, modify and redistribute
  12. ;; GNU CC, but only under the conditions described in the
  13. ;; GNU CC General Public License. A copy of this license is
  14. ;; supposed to have been given to you along with GNU CC so you
  15. ;; can know your rights and responsibilities. It should be in a
  16. ;; file named COPYING. Among other things, the copyright notice
  17. ;; and this notice must be preserved on all copies.
  18. ;;- Instruction patterns. When multiple patterns apply,
  19. ;;- the first one in the file is chosen.
  20. ;;-
  21. ;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
  22. ;;-
  23. ;;- cpp macro #define NOTICE_UPDATE_CC in file tm.h handles condition code
  24. ;;- updates for most instructions.
  25. (define_insn "tstdf"
  26. [(set (cc0)
  27. (match_operand:DF 0 "general_operand" "gF"))]
  28. ""
  29. "tstd %0")
  30. (define_insn "tstsf"
  31. [(set (cc0)
  32. (match_operand:SF 0 "general_operand" "gF"))]
  33. ""
  34. "tstf %0")
  35. (define_insn "tstsi"
  36. [(set (cc0)
  37. (match_operand:SI 0 "general_operand" "g"))]
  38. ""
  39. "tstl %0")
  40. (define_insn "tsthi"
  41. [(set (cc0)
  42. (match_operand:HI 0 "general_operand" "g"))]
  43. ""
  44. "tstw %0")
  45. (define_insn "tstqi"
  46. [(set (cc0)
  47. (match_operand:QI 0 "general_operand" "g"))]
  48. ""
  49. "tstb %0")
  50. (define_insn "cmpdf"
  51. [(set (cc0)
  52. (minus (match_operand:DF 0 "general_operand" "gF")
  53. (match_operand:DF 1 "general_operand" "gF")))]
  54. ""
  55. "cmpd %0,%1")
  56. (define_insn "cmpsf"
  57. [(set (cc0)
  58. (minus (match_operand:SF 0 "general_operand" "gF")
  59. (match_operand:SF 1 "general_operand" "gF")))]
  60. ""
  61. "cmpf %0,%1")
  62. (define_insn "cmpsi"
  63. [(set (cc0)
  64. (minus (match_operand:SI 0 "general_operand" "g")
  65. (match_operand:SI 1 "general_operand" "g")))]
  66. ""
  67. "cmpl %0,%1")
  68. (define_insn "cmphi"
  69. [(set (cc0)
  70. (minus (match_operand:HI 0 "general_operand" "g")
  71. (match_operand:HI 1 "general_operand" "g")))]
  72. ""
  73. "cmpw %0,%1")
  74. (define_insn "cmpqi"
  75. [(set (cc0)
  76. (minus (match_operand:QI 0 "general_operand" "g")
  77. (match_operand:QI 1 "general_operand" "g")))]
  78. ""
  79. "cmpb %0,%1")
  80. (define_insn ""
  81. [(set (cc0)
  82. (and:SI (match_operand:SI 0 "general_operand" "g")
  83. (match_operand:SI 1 "general_operand" "g")))]
  84. ""
  85. "bitl %0,%1")
  86. (define_insn ""
  87. [(set (cc0)
  88. (and:HI (match_operand:HI 0 "general_operand" "g")
  89. (match_operand:HI 1 "general_operand" "g")))]
  90. ""
  91. "bitw %0,%1")
  92. (define_insn ""
  93. [(set (cc0)
  94. (and:QI (match_operand:QI 0 "general_operand" "g")
  95. (match_operand:QI 1 "general_operand" "g")))]
  96. ""
  97. "bitb %0,%1")
  98. (define_insn "movdf"
  99. [(set (match_operand:DF 0 "general_operand" "=g")
  100. (match_operand:DF 1 "general_operand" "gF"))]
  101. ""
  102. "*
  103. {
  104. if (operands[1] == dconst0_rtx)
  105. return \"clrd %0\";
  106. return \"movd %1,%0\";
  107. }")
  108. (define_insn "movsf"
  109. [(set (match_operand:SF 0 "general_operand" "=g")
  110. (match_operand:SF 1 "general_operand" "gF"))]
  111. ""
  112. "*
  113. {
  114. if (operands[1] == fconst0_rtx)
  115. return \"clrf %0\";
  116. return \"movf %1,%0\";
  117. }")
  118. (define_insn "movti"
  119. [(set (match_operand:TI 0 "general_operand" "=g")
  120. (match_operand:TI 1 "general_operand" "g"))]
  121. ""
  122. "movh %1,%0")
  123. (define_insn "movdi"
  124. [(set (match_operand:DI 0 "general_operand" "=g")
  125. (match_operand:DI 1 "general_operand" "g"))]
  126. ""
  127. "movd %1,%0")
  128. (define_insn "movsi"
  129. [(set (match_operand:SI 0 "general_operand" "=g")
  130. (match_operand:SI 1 "general_operand" "g"))]
  131. ""
  132. "*
  133. { if (operands[1] == const1_rtx
  134. && GET_MODE (REG_NOTES (insn)) == (enum machine_mode) REG_WAS_0)
  135. return \"incl %0\";
  136. if (GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == CONST)
  137. {
  138. if (push_operand (operands[0], SImode))
  139. return \"pushab %a1\";
  140. return \"movab %a1,%0\";
  141. }
  142. if (operands[1] == const0_rtx)
  143. return \"clrl %0\";
  144. if (GET_CODE (operands[1]) == CONST_INT
  145. && (unsigned) INTVAL (operands[1]) >= 64)
  146. {
  147. int i = INTVAL (operands[1]);
  148. if ((unsigned)(-i) < 64)
  149. {
  150. operands[1] = gen_rtx (CONST_INT, VOIDmode, -i);
  151. return \"mnegl %1,%0\";
  152. }
  153. if ((unsigned)i < 0x100)
  154. return \"movzbl %1,%0\";
  155. if (i >= -0x80 && i < 0)
  156. return \"cvtbl %1,%0\";
  157. if ((unsigned)i < 0x10000)
  158. return \"movzwl %1,%0\";
  159. if (i >= -0x8000 && i < 0)
  160. return \"cvtwl %1,%0\";
  161. }
  162. if (push_operand (operands[0], SImode))
  163. return \"pushl %1\";
  164. return \"movl %1,%0\";
  165. }")
  166. (define_insn "movhi"
  167. [(set (match_operand:HI 0 "general_operand" "=g")
  168. (match_operand:HI 1 "general_operand" "g"))]
  169. ""
  170. "*
  171. {
  172. if (operands[1] == const1_rtx
  173. && GET_MODE (REG_NOTES (insn)) == (enum machine_mode) REG_WAS_0)
  174. return \"incw %0\";
  175. if (operands[1] == const0_rtx)
  176. return \"clrw %0\";
  177. if (GET_CODE (operands[1]) == CONST_INT
  178. && (unsigned) INTVAL (operands[1]) >= 64)
  179. {
  180. int i = INTVAL (operands[1]);
  181. if ((unsigned)(-i) < 64)
  182. {
  183. operands[1] = gen_rtx (CONST_INT, VOIDmode, -i);
  184. return \"mnegw %1,%0\";
  185. }
  186. if ((unsigned)i < 0x100)
  187. return \"movzbw %1,%0\";
  188. if (i >= -0x80 && i < 0)
  189. return \"cvtbw %1,%0\";
  190. }
  191. return \"movw %1,%0\";
  192. }")
  193. (define_insn "movqi"
  194. [(set (match_operand:QI 0 "general_operand" "=g")
  195. (match_operand:QI 1 "general_operand" "g"))]
  196. ""
  197. "*
  198. {
  199. if (operands[1] == const0_rtx)
  200. return \"clrb %0\";
  201. return \"movb %1,%0\";
  202. }")
  203. ;; The definition of this insn does not really explain what it does,
  204. ;; but it should suffice
  205. ;; that anything generated as this insn will be recognized as one
  206. ;; and that it won't successfully combine with anything.
  207. (define_insn "movstrhi"
  208. [(set (match_operand:BLK 0 "general_operand" "=g")
  209. (match_operand:BLK 1 "general_operand" "g"))
  210. (use (match_operand:HI 2 "general_operand" "g"))
  211. (clobber (nil)) ;;- Clobber everything in memory
  212. (clobber (reg 0))
  213. (clobber (reg 1))
  214. (clobber (reg 2))
  215. (clobber (reg 3))
  216. (clobber (reg 4))
  217. (clobber (reg 5))]
  218. ""
  219. "movc3 %2,%1,%0")
  220. ;;- load or push effective address
  221. ;; These come after the move patterns
  222. ;; because we don't want pushl $1 turned into pushad 1.
  223. (define_insn ""
  224. [(set (match_operand:SI 0 "general_operand" "=g")
  225. (match_operand:QI 1 "address_operand" "p"))]
  226. ""
  227. "*
  228. {
  229. if (push_operand (operands[0], SImode))
  230. return \"pushab %a1\";
  231. return \"movab %a1,%0\";
  232. }")
  233. (define_insn ""
  234. [(set (match_operand:SI 0 "general_operand" "=g")
  235. (match_operand:HI 1 "address_operand" "p"))]
  236. ""
  237. "*
  238. {
  239. if (push_operand (operands[0], SImode))
  240. return \"pushaw %a1\";
  241. return \"movaw %a1,%0\";
  242. }")
  243. (define_insn ""
  244. [(set (match_operand:SI 0 "general_operand" "=g")
  245. (match_operand:SI 1 "address_operand" "p"))]
  246. ""
  247. "*
  248. {
  249. if (push_operand (operands[0], SImode))
  250. return \"pushal %a1\";
  251. return \"moval %a1,%0\";
  252. }")
  253. (define_insn ""
  254. [(set (match_operand:SI 0 "general_operand" "=g")
  255. (match_operand:SF 1 "address_operand" "p"))]
  256. ""
  257. "*
  258. {
  259. if (push_operand (operands[0], SImode))
  260. return \"pushaf %a1\";
  261. return \"movaf %a1,%0\";
  262. }")
  263. (define_insn ""
  264. [(set (match_operand:SI 0 "general_operand" "=g")
  265. (match_operand:DF 1 "address_operand" "p"))]
  266. ""
  267. "*
  268. {
  269. if (push_operand (operands[0], SImode))
  270. return \"pushad %a1\";
  271. return \"movad %a1,%0\";
  272. }")
  273. (define_insn "extendqihi2"
  274. [(set (match_operand:HI 0 "general_operand" "=g")
  275. (sign_extend:HI (match_operand:QI 1 "general_operand" "g")))]
  276. ""
  277. "cvtbw %1,%0")
  278. (define_insn "extendqisi2"
  279. [(set (match_operand:SI 0 "general_operand" "=g")
  280. (sign_extend:SI (match_operand:QI 1 "general_operand" "g")))]
  281. ""
  282. "cvtbl %1,%0")
  283. (define_insn "floatqisf2"
  284. [(set (match_operand:SF 0 "general_operand" "=g")
  285. (float:SF (match_operand:QI 1 "general_operand" "g")))]
  286. ""
  287. "cvtbf %1,%0")
  288. (define_insn "floatqidf2"
  289. [(set (match_operand:DF 0 "general_operand" "=g")
  290. (float:DF (match_operand:QI 1 "general_operand" "g")))]
  291. ""
  292. "cvtbd %1,%0")
  293. (define_insn "trunchiqi2"
  294. [(set (match_operand:QI 0 "general_operand" "=g")
  295. (truncate:QI (match_operand:HI 1 "general_operand" "g")))]
  296. ""
  297. "cvtwb %1,%0")
  298. (define_insn "extendhisi2"
  299. [(set (match_operand:SI 0 "general_operand" "=g")
  300. (sign_extend:SI (match_operand:HI 1 "general_operand" "g")))]
  301. ""
  302. "cvtwl %1,%0")
  303. (define_insn "floathisf2"
  304. [(set (match_operand:SF 0 "general_operand" "=g")
  305. (float:SF (match_operand:HI 1 "general_operand" "g")))]
  306. ""
  307. "cvtwf %1,%0")
  308. (define_insn "floathidf2"
  309. [(set (match_operand:DF 0 "general_operand" "=g")
  310. (float:DF (match_operand:HI 1 "general_operand" "g")))]
  311. ""
  312. "cvtwd %1,%0")
  313. (define_insn "truncsiqi2"
  314. [(set (match_operand:QI 0 "general_operand" "=g")
  315. (truncate:QI (match_operand:SI 1 "general_operand" "g")))]
  316. ""
  317. "cvtlb %1,%0")
  318. (define_insn "truncsihi2"
  319. [(set (match_operand:HI 0 "general_operand" "=g")
  320. (truncate:HI (match_operand:SI 1 "general_operand" "g")))]
  321. ""
  322. "cvtlw %1,%0")
  323. (define_insn "floatsisf2"
  324. [(set (match_operand:SF 0 "general_operand" "=g")
  325. (float:SF (match_operand:SI 1 "general_operand" "g")))]
  326. ""
  327. "cvtlf %1,%0")
  328. (define_insn "floatsidf2"
  329. [(set (match_operand:DF 0 "general_operand" "=g")
  330. (float:DF (match_operand:SI 1 "general_operand" "g")))]
  331. ""
  332. "cvtld %1,%0")
  333. (define_insn "fixsfqi2"
  334. [(set (match_operand:QI 0 "general_operand" "=g")
  335. (fix:QI (match_operand:SF 1 "general_operand" "gF")))]
  336. ""
  337. "cvtfb %1,%0")
  338. (define_insn "fixsfhi2"
  339. [(set (match_operand:HI 0 "general_operand" "=g")
  340. (fix:HI (match_operand:SF 1 "general_operand" "gF")))]
  341. ""
  342. "cvtfw %1,%0")
  343. (define_insn "fixsfsi2"
  344. [(set (match_operand:SI 0 "general_operand" "=g")
  345. (fix:SI (match_operand:SF 1 "general_operand" "gF")))]
  346. ""
  347. "cvtfl %1,%0")
  348. (define_insn "extendsfdf2"
  349. [(set (match_operand:DF 0 "general_operand" "=g")
  350. (float_extend:DF (match_operand:SF 1 "general_operand" "gF")))]
  351. ""
  352. "cvtfd %1,%0")
  353. (define_insn "fixdfqi2"
  354. [(set (match_operand:QI 0 "general_operand" "=g")
  355. (fix:QI (match_operand:DF 1 "general_operand" "gF")))]
  356. ""
  357. "cvtdb %1,%0")
  358. (define_insn "fixdfhi2"
  359. [(set (match_operand:HI 0 "general_operand" "=g")
  360. (fix:HI (match_operand:DF 1 "general_operand" "gF")))]
  361. ""
  362. "cvtdw %1,%0")
  363. (define_insn "fixdfsi2"
  364. [(set (match_operand:SI 0 "general_operand" "=g")
  365. (fix:SI (match_operand:DF 1 "general_operand" "gF")))]
  366. ""
  367. "cvtdl %1,%0")
  368. (define_insn "truncdfsf2"
  369. [(set (match_operand:SF 0 "general_operand" "=g")
  370. (float_truncate:SF (match_operand:DF 1 "general_operand" "gF")))]
  371. ""
  372. "cvtdf %1,%0")
  373. (define_insn "zero_extendqihi2"
  374. [(set (match_operand:HI 0 "general_operand" "=g")
  375. (zero_extend:HI (match_operand:QI 1 "general_operand" "g")))]
  376. ""
  377. "movzbw %1,%0")
  378. (define_insn "zero_extendqisi2"
  379. [(set (match_operand:SI 0 "general_operand" "=g")
  380. (zero_extend:SI (match_operand:QI 1 "general_operand" "g")))]
  381. ""
  382. "movzbl %1,%0")
  383. (define_insn "zero_extendhisi2"
  384. [(set (match_operand:SI 0 "general_operand" "=g")
  385. (zero_extend:SI (match_operand:HI 1 "general_operand" "g")))]
  386. ""
  387. "movzwl %1,%0")
  388. ;;- All kinds of add instructions.
  389. (define_insn "adddf3"
  390. [(set (match_operand:DF 0 "general_operand" "=g")
  391. (plus:DF (match_operand:DF 1 "general_operand" "gF")
  392. (match_operand:DF 2 "general_operand" "gF")))]
  393. ""
  394. "*
  395. {
  396. if (rtx_equal_p (operands[0], operands[1]))
  397. return \"addd2 %2,%0\";
  398. if (rtx_equal_p (operands[0], operands[2]))
  399. return \"addd2 %1,%0\";
  400. return \"addd3 %1,%2,%0\";
  401. }")
  402. (define_insn "addsf3"
  403. [(set (match_operand:SF 0 "general_operand" "=g")
  404. (plus:SF (match_operand:SF 1 "general_operand" "gF")
  405. (match_operand:SF 2 "general_operand" "gF")))]
  406. ""
  407. "*
  408. {
  409. if (rtx_equal_p (operands[0], operands[1]))
  410. return \"addf2 %2,%0\";
  411. if (rtx_equal_p (operands[0], operands[2]))
  412. return \"addf2 %1,%0\";
  413. return \"addf3 %1,%2,%0\";
  414. }")
  415. (define_insn "addsi3"
  416. [(set (match_operand:SI 0 "general_operand" "=g")
  417. (plus:SI (match_operand:SI 1 "general_operand" "g")
  418. (match_operand:SI 2 "general_operand" "g")))]
  419. ""
  420. "*
  421. {
  422. if (rtx_equal_p (operands[0], operands[1]))
  423. {
  424. if (operands[2] == const1_rtx)
  425. return \"incl %0\";
  426. if (GET_CODE (operands[1]) == CONST_INT
  427. && INTVAL (operands[1]) == -1)
  428. return \"decl %0\";
  429. if (GET_CODE (operands[2]) == CONST_INT
  430. && (unsigned) (- INTVAL (operands[2])) < 64)
  431. return \"subl2 $%n2,%0\";
  432. return \"addl2 %2,%0\";
  433. }
  434. if (rtx_equal_p (operands[0], operands[2]))
  435. return \"addl2 %1,%0\";
  436. if (GET_CODE (operands[2]) == CONST_INT
  437. && GET_CODE (operands[1]) == REG)
  438. {
  439. if (push_operand (operands[0], SImode))
  440. return \"pushab %c2(%1)\";
  441. return \"movab %c2(%1),%0\";
  442. }
  443. if (GET_CODE (operands[2]) == CONST_INT
  444. && (unsigned) (- INTVAL (operands[2])) < 64)
  445. return \"subl3 $%n2,%1,%0\";
  446. return \"addl3 %1,%2,%0\";
  447. }")
  448. (define_insn "addhi3"
  449. [(set (match_operand:HI 0 "general_operand" "=g")
  450. (plus:HI (match_operand:HI 1 "general_operand" "g")
  451. (match_operand:HI 2 "general_operand" "g")))]
  452. ""
  453. "*
  454. {
  455. if (rtx_equal_p (operands[0], operands[1]))
  456. {
  457. if (operands[2] == const1_rtx)
  458. return \"incw %0\";
  459. if (GET_CODE (operands[1]) == CONST_INT
  460. && INTVAL (operands[1]) == -1)
  461. return \"decw %0\";
  462. if (GET_CODE (operands[2]) == CONST_INT
  463. && (unsigned) (- INTVAL (operands[2])) < 64)
  464. return \"subw2 $%n2,%0\";
  465. return \"addw2 %2,%0\";
  466. }
  467. if (rtx_equal_p (operands[0], operands[2]))
  468. return \"addw2 %1,%0\";
  469. if (GET_CODE (operands[2]) == CONST_INT
  470. && (unsigned) (- INTVAL (operands[2])) < 64)
  471. return \"subw3 $%n2,%1,%0\";
  472. return \"addw3 %1,%2,%0\";
  473. }")
  474. (define_insn "addqi3"
  475. [(set (match_operand:QI 0 "general_operand" "=g")
  476. (plus:QI (match_operand:QI 1 "general_operand" "g")
  477. (match_operand:QI 2 "general_operand" "g")))]
  478. ""
  479. "*
  480. {
  481. if (rtx_equal_p (operands[0], operands[1]))
  482. {
  483. if (operands[2] == const1_rtx)
  484. return \"incb %0\";
  485. if (GET_CODE (operands[1]) == CONST_INT
  486. && INTVAL (operands[1]) == -1)
  487. return \"decb %0\";
  488. if (GET_CODE (operands[2]) == CONST_INT
  489. && (unsigned) (- INTVAL (operands[2])) < 64)
  490. return \"subb2 $%n2,%0\";
  491. return \"addb2 %2,%0\";
  492. }
  493. if (rtx_equal_p (operands[0], operands[2]))
  494. return \"addb2 %1,%0\";
  495. if (GET_CODE (operands[2]) == CONST_INT
  496. && (unsigned) (- INTVAL (operands[2])) < 64)
  497. return \"subb3 $%n2,%1,%0\";
  498. return \"addb3 %1,%2,%0\";
  499. }")
  500. ;;- All kinds of subtract instructions.
  501. (define_insn "subdf3"
  502. [(set (match_operand:DF 0 "general_operand" "=g")
  503. (minus:DF (match_operand:DF 1 "general_operand" "gF")
  504. (match_operand:DF 2 "general_operand" "gF")))]
  505. ""
  506. "*
  507. {
  508. if (rtx_equal_p (operands[0], operands[1]))
  509. return \"subd2 %2,%0\";
  510. return \"subd3 %2,%1,%0\";
  511. }")
  512. (define_insn "subsf3"
  513. [(set (match_operand:SF 0 "general_operand" "=g")
  514. (minus:SF (match_operand:SF 1 "general_operand" "gF")
  515. (match_operand:SF 2 "general_operand" "gF")))]
  516. ""
  517. "*
  518. {
  519. if (rtx_equal_p (operands[0], operands[1]))
  520. return \"subf2 %2,%0\";
  521. return \"subf3 %2,%1,%0\";
  522. }")
  523. (define_insn "subsi3"
  524. [(set (match_operand:SI 0 "general_operand" "=g")
  525. (minus:SI (match_operand:SI 1 "general_operand" "g")
  526. (match_operand:SI 2 "general_operand" "g")))]
  527. ""
  528. "*
  529. {
  530. if (rtx_equal_p (operands[0], operands[1]))
  531. {
  532. if (operands[2] == const1_rtx)
  533. return \"decl %0\";
  534. return \"subl2 %2,%0\";
  535. }
  536. return \"subl3 %2,%1,%0\";
  537. }")
  538. (define_insn "subhi3"
  539. [(set (match_operand:HI 0 "general_operand" "=g")
  540. (minus:HI (match_operand:HI 1 "general_operand" "g")
  541. (match_operand:HI 2 "general_operand" "g")))]
  542. ""
  543. "*
  544. {
  545. if (rtx_equal_p (operands[0], operands[1]))
  546. {
  547. if (operands[2] == const1_rtx)
  548. return \"decw %0\";
  549. return \"subw2 %2,%0\";
  550. }
  551. return \"subw3 %2,%1,%0\";
  552. }")
  553. (define_insn "subqi3"
  554. [(set (match_operand:QI 0 "general_operand" "=g")
  555. (minus:QI (match_operand:QI 1 "general_operand" "g")
  556. (match_operand:QI 2 "general_operand" "g")))]
  557. ""
  558. "*
  559. {
  560. if (rtx_equal_p (operands[0], operands[1]))
  561. {
  562. if (operands[2] == const1_rtx)
  563. return \"decb %0\";
  564. return \"subb2 %2,%0\";
  565. }
  566. return \"subb3 %2,%1,%0\";
  567. }")
  568. ;;- Multiply instructions.
  569. (define_insn "muldf3"
  570. [(set (match_operand:DF 0 "general_operand" "=g")
  571. (mult:DF (match_operand:DF 1 "general_operand" "gF")
  572. (match_operand:DF 2 "general_operand" "gF")))]
  573. ""
  574. "*
  575. {
  576. if (rtx_equal_p (operands[0], operands[1]))
  577. return \"muld2 %2,%0\";
  578. if (rtx_equal_p (operands[0], operands[2]))
  579. return \"muld2 %1,%0\";
  580. return \"muld3 %1,%2,%0\";
  581. }")
  582. (define_insn "mulsf3"
  583. [(set (match_operand:SF 0 "general_operand" "=g")
  584. (mult:SF (match_operand:SF 1 "general_operand" "gF")
  585. (match_operand:SF 2 "general_operand" "gF")))]
  586. ""
  587. "*
  588. {
  589. if (rtx_equal_p (operands[0], operands[1]))
  590. return \"mulf2 %2,%0\";
  591. if (rtx_equal_p (operands[0], operands[2]))
  592. return \"mulf2 %1,%0\";
  593. return \"mulf3 %1,%2,%0\";
  594. }")
  595. (define_insn "mulsi3"
  596. [(set (match_operand:SI 0 "general_operand" "=g")
  597. (mult:SI (match_operand:SI 1 "general_operand" "g")
  598. (match_operand:SI 2 "general_operand" "g")))]
  599. ""
  600. "*
  601. {
  602. if (rtx_equal_p (operands[0], operands[1]))
  603. return \"mull2 %2,%0\";
  604. if (rtx_equal_p (operands[0], operands[2]))
  605. return \"mull2 %1,%0\";
  606. return \"mull3 %1,%2,%0\";
  607. }")
  608. (define_insn "mulhi3"
  609. [(set (match_operand:HI 0 "general_operand" "=g")
  610. (mult:HI (match_operand:HI 1 "general_operand" "g")
  611. (match_operand:HI 2 "general_operand" "g")))]
  612. ""
  613. "*
  614. {
  615. if (rtx_equal_p (operands[0], operands[1]))
  616. return \"mulw2 %2,%0\";
  617. if (rtx_equal_p (operands[0], operands[2]))
  618. return \"mulw2 %1,%0\";
  619. return \"mulw3 %1,%2,%0\";
  620. }")
  621. (define_insn "mulqi3"
  622. [(set (match_operand:QI 0 "general_operand" "=g")
  623. (mult:QI (match_operand:QI 1 "general_operand" "g")
  624. (match_operand:QI 2 "general_operand" "g")))]
  625. ""
  626. "*
  627. {
  628. if (rtx_equal_p (operands[0], operands[1]))
  629. return \"mulb2 %2,%0\";
  630. if (rtx_equal_p (operands[0], operands[2]))
  631. return \"mulb2 %1,%0\";
  632. return \"mulb3 %1,%2,%0\";
  633. }")
  634. ;;- Divide instructions.
  635. (define_insn "divdf3"
  636. [(set (match_operand:DF 0 "general_operand" "=g")
  637. (div:DF (match_operand:DF 1 "general_operand" "gF")
  638. (match_operand:DF 2 "general_operand" "gF")))]
  639. ""
  640. "*
  641. {
  642. if (rtx_equal_p (operands[0], operands[1]))
  643. return \"divd2 %2,%0\";
  644. return \"divd3 %2,%1,%0\";
  645. }")
  646. (define_insn "divsf3"
  647. [(set (match_operand:SF 0 "general_operand" "=g")
  648. (div:SF (match_operand:SF 1 "general_operand" "gF")
  649. (match_operand:SF 2 "general_operand" "gF")))]
  650. ""
  651. "*
  652. {
  653. if (rtx_equal_p (operands[0], operands[1]))
  654. return \"divf2 %2,%0\";
  655. return \"divf3 %2,%1,%0\";
  656. }")
  657. (define_insn "divsi3"
  658. [(set (match_operand:SI 0 "general_operand" "=g")
  659. (div:SI (match_operand:SI 1 "general_operand" "g")
  660. (match_operand:SI 2 "general_operand" "g")))]
  661. ""
  662. "*
  663. {
  664. if (rtx_equal_p (operands[0], operands[1]))
  665. return \"divl2 %2,%0\";
  666. return \"divl3 %2,%1,%0\";
  667. }")
  668. (define_insn "divhi3"
  669. [(set (match_operand:HI 0 "general_operand" "=g")
  670. (div:HI (match_operand:HI 1 "general_operand" "g")
  671. (match_operand:HI 2 "general_operand" "g")))]
  672. ""
  673. "*
  674. {
  675. if (rtx_equal_p (operands[0], operands[1]))
  676. return \"divw2 %2,%0\";
  677. return \"divw3 %2,%1,%0\";
  678. }")
  679. (define_insn "divqi3"
  680. [(set (match_operand:QI 0 "general_operand" "=g")
  681. (div:QI (match_operand:QI 1 "general_operand" "g")
  682. (match_operand:QI 2 "general_operand" "g")))]
  683. ""
  684. "*
  685. {
  686. if (rtx_equal_p (operands[0], operands[1]))
  687. return \"divb2 %2,%0\";
  688. return \"divb3 %2,%1,%0\";
  689. }")
  690. ;This is left out because it is very slow;
  691. ;we are better off programming around the "lack" of this insn.
  692. ;(define_insn "divmoddisi4"
  693. ; [(set (match_operand:SI 0 "general_operand" "=g")
  694. ; (div:SI (match_operand:DI 1 "general_operand" "g")
  695. ; (match_operand:SI 2 "general_operand" "g")))
  696. ; (set (match_operand:SI 3 "general_operand" "=g")
  697. ; (mod:SI (match_operand:DI 1 "general_operand" "g")
  698. ; (match_operand:SI 2 "general_operand" "g")))]
  699. ; ""
  700. ; "ediv %2,%1,%0,%3")
  701. (define_insn "andcbsi3"
  702. [(set (match_operand:SI 0 "general_operand" "=g")
  703. (and:SI (match_operand:SI 1 "general_operand" "g")
  704. (not:SI (match_operand:SI 2 "general_operand" "g"))))]
  705. ""
  706. "*
  707. {
  708. if (rtx_equal_p (operands[0], operands[1]))
  709. return \"bicl2 %2,%0\";
  710. return \"bicl3 %2,%1,%0\";
  711. }")
  712. (define_insn "andcbhi3"
  713. [(set (match_operand:HI 0 "general_operand" "=g")
  714. (and:HI (match_operand:HI 1 "general_operand" "g")
  715. (not:HI (match_operand:HI 2 "general_operand" "g"))))]
  716. ""
  717. "*
  718. {
  719. if (rtx_equal_p (operands[0], operands[1]))
  720. return \"bicw2 %2,%0\";
  721. return \"bicw3 %2,%1,%0\";
  722. }")
  723. (define_insn "andcbqi3"
  724. [(set (match_operand:QI 0 "general_operand" "=g")
  725. (and:QI (match_operand:QI 1 "general_operand" "g")
  726. (not:QI (match_operand:QI 2 "general_operand" "g"))))]
  727. ""
  728. "*
  729. {
  730. if (rtx_equal_p (operands[0], operands[1]))
  731. return \"bicb2 %2,%0\";
  732. return \"bicb3 %2,%1,%0\";
  733. }")
  734. ;; The following are needed because constant propagation can
  735. ;; create them starting from the bic insn patterns above.
  736. (define_insn ""
  737. [(set (match_operand:SI 0 "general_operand" "=g")
  738. (and:SI (match_operand:SI 1 "general_operand" "g")
  739. (match_operand:SI 2 "general_operand" "g")))]
  740. "GET_CODE (operands[2]) == CONST_INT"
  741. "*
  742. { operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2]));
  743. if (rtx_equal_p (operands[1], operands[0]))
  744. return \"bicl2 %2,%0\";
  745. return \"bicl3 %2,%1,%0\";
  746. }")
  747. (define_insn ""
  748. [(set (match_operand:HI 0 "general_operand" "=g")
  749. (and:HI (match_operand:HI 1 "general_operand" "g")
  750. (match_operand:HI 2 "general_operand" "g")))]
  751. "GET_CODE (operands[2]) == CONST_INT"
  752. "*
  753. { operands[2] = gen_rtx (CONST_INT, VOIDmode, 0xffff & ~INTVAL (operands[2]));
  754. if (rtx_equal_p (operands[1], operands[0]))
  755. return \"bicw2 %2,%0\";
  756. return \"bicw3 %2,%1,%0\";
  757. }")
  758. (define_insn ""
  759. [(set (match_operand:QI 0 "general_operand" "=g")
  760. (and:QI (match_operand:QI 1 "general_operand" "g")
  761. (match_operand:QI 2 "general_operand" "g")))]
  762. "GET_CODE (operands[2]) == CONST_INT"
  763. "*
  764. { operands[2] = gen_rtx (CONST_INT, VOIDmode, 0xff & ~INTVAL (operands[2]));
  765. if (rtx_equal_p (operands[1], operands[0]))
  766. return \"bicb2 %2,%0\";
  767. return \"bicb3 %2,%1,%0\";
  768. }")
  769. ;;- Bit set instructions.
  770. (define_insn "iorsi3"
  771. [(set (match_operand:SI 0 "general_operand" "=g")
  772. (ior:SI (match_operand:SI 1 "general_operand" "g")
  773. (match_operand:SI 2 "general_operand" "g")))]
  774. ""
  775. "*
  776. {
  777. if (rtx_equal_p (operands[0], operands[1]))
  778. return \"bisl2 %2,%0\";
  779. if (rtx_equal_p (operands[0], operands[2]))
  780. return \"bisl2 %1,%0\";
  781. return \"bisl3 %2,%1,%0\";
  782. }")
  783. (define_insn "iorhi3"
  784. [(set (match_operand:HI 0 "general_operand" "=g")
  785. (ior:HI (match_operand:HI 1 "general_operand" "g")
  786. (match_operand:HI 2 "general_operand" "g")))]
  787. ""
  788. "*
  789. {
  790. if (rtx_equal_p (operands[0], operands[1]))
  791. return \"bisw2 %2,%0\";
  792. if (rtx_equal_p (operands[0], operands[2]))
  793. return \"bisw2 %1,%0\";
  794. return \"bisw3 %2,%1,%0\";
  795. }")
  796. (define_insn "iorqi3"
  797. [(set (match_operand:QI 0 "general_operand" "=g")
  798. (ior:QI (match_operand:QI 1 "general_operand" "g")
  799. (match_operand:QI 2 "general_operand" "g")))]
  800. ""
  801. "*
  802. {
  803. if (rtx_equal_p (operands[0], operands[1]))
  804. return \"bisb2 %2,%0\";
  805. if (rtx_equal_p (operands[0], operands[2]))
  806. return \"bisb2 %1,%0\";
  807. return \"bisb3 %2,%1,%0\";
  808. }")
  809. ;;- xor instructions.
  810. (define_insn "xorsi3"
  811. [(set (match_operand:SI 0 "general_operand" "=g")
  812. (xor:SI (match_operand:SI 1 "general_operand" "g")
  813. (match_operand:SI 2 "general_operand" "g")))]
  814. ""
  815. "*
  816. {
  817. if (rtx_equal_p (operands[0], operands[1]))
  818. return \"xorl2 %2,%0\";
  819. if (rtx_equal_p (operands[0], operands[2]))
  820. return \"xorl2 %1,%0\";
  821. return \"xorl3 %2,%1,%0\";
  822. }")
  823. (define_insn "xorhi3"
  824. [(set (match_operand:HI 0 "general_operand" "=g")
  825. (xor:HI (match_operand:HI 1 "general_operand" "g")
  826. (match_operand:HI 2 "general_operand" "g")))]
  827. ""
  828. "*
  829. {
  830. if (rtx_equal_p (operands[0], operands[1]))
  831. return \"xorw2 %2,%0\";
  832. if (rtx_equal_p (operands[0], operands[2]))
  833. return \"xorw2 %1,%0\";
  834. return \"xorw3 %2,%1,%0\";
  835. }")
  836. (define_insn "xorqi3"
  837. [(set (match_operand:QI 0 "general_operand" "=g")
  838. (xor:QI (match_operand:QI 1 "general_operand" "g")
  839. (match_operand:QI 2 "general_operand" "g")))]
  840. ""
  841. "*
  842. {
  843. if (rtx_equal_p (operands[0], operands[1]))
  844. return \"xorb2 %2,%0\";
  845. if (rtx_equal_p (operands[0], operands[2]))
  846. return \"xorb2 %1,%0\";
  847. return \"xorb3 %2,%1,%0\";
  848. }")
  849. (define_insn "negdf2"
  850. [(set (match_operand:DF 0 "general_operand" "=g")
  851. (neg:DF (match_operand:DF 1 "general_operand" "gF")))]
  852. ""
  853. "mnegd %1,%0")
  854. (define_insn "negsf2"
  855. [(set (match_operand:SF 0 "general_operand" "=g")
  856. (neg:SF (match_operand:SF 1 "general_operand" "gF")))]
  857. ""
  858. "mnegf %1,%0")
  859. (define_insn "negsi2"
  860. [(set (match_operand:SI 0 "general_operand" "=g")
  861. (neg:SI (match_operand:SI 1 "general_operand" "g")))]
  862. ""
  863. "mnegl %1,%0")
  864. (define_insn "neghi2"
  865. [(set (match_operand:HI 0 "general_operand" "=g")
  866. (neg:HI (match_operand:HI 1 "general_operand" "g")))]
  867. ""
  868. "mnegw %1,%0")
  869. (define_insn "negqi2"
  870. [(set (match_operand:QI 0 "general_operand" "=g")
  871. (neg:QI (match_operand:QI 1 "general_operand" "g")))]
  872. ""
  873. "mnegb %1,%0")
  874. (define_insn "one_cmplsi2"
  875. [(set (match_operand:SI 0 "general_operand" "=g")
  876. (not:SI (match_operand:SI 1 "general_operand" "g")))]
  877. ""
  878. "mcoml %1,%0")
  879. (define_insn "one_cmplhi2"
  880. [(set (match_operand:HI 0 "general_operand" "=g")
  881. (not:HI (match_operand:HI 1 "general_operand" "g")))]
  882. ""
  883. "mcomw %1,%0")
  884. (define_insn "one_cmplqi2"
  885. [(set (match_operand:QI 0 "general_operand" "=g")
  886. (not:QI (match_operand:QI 1 "general_operand" "g")))]
  887. ""
  888. "mcomb %1,%0")
  889. (define_insn "ashlsi3"
  890. [(set (match_operand:SI 0 "general_operand" "=g")
  891. (ashift:SI (match_operand:SI 1 "general_operand" "g")
  892. (match_operand:QI 2 "general_operand" "g")))]
  893. ""
  894. "ashl %2,%1,%0")
  895. (define_insn "ashldi3"
  896. [(set (match_operand:DI 0 "general_operand" "=g")
  897. (ashift:DI (match_operand:DI 1 "general_operand" "g")
  898. (match_operand:QI 2 "general_operand" "g")))]
  899. ""
  900. "ashq %2,%1,%0")
  901. (define_insn "rotlsi3"
  902. [(set (match_operand:SI 0 "general_operand" "=g")
  903. (rotate:SI (match_operand:SI 1 "general_operand" "g")
  904. (match_operand:QI 2 "general_operand" "g")))]
  905. ""
  906. "rotl %2,%1,%0")
  907. (define_insn "rotldi3"
  908. [(set (match_operand:DI 0 "general_operand" "=g")
  909. (rotate:DI (match_operand:DI 1 "general_operand" "g")
  910. (match_operand:QI 2 "general_operand" "g")))]
  911. ""
  912. "rotq %2,%1,%0")
  913. (define_insn ""
  914. [(set (match_operand:SI 0 "general_operand" "=g")
  915. (mult:SI (plus:SI (match_operand:SI 1 "general_operand" "g")
  916. (match_operand:SI 2 "general_operand" "g"))
  917. (match_operand:SI 3 "general_operand" "g")))]
  918. ""
  919. "index %1,$??,$??,%3,%2,%0")
  920. (define_insn ""
  921. [(set (cc0)
  922. (minus
  923. (sign_extract:SI (match_operand:QI 0 "general_operand" "g")
  924. (match_operand:SI 1 "general_operand" "g")
  925. (match_operand:SI 2 "general_operand" "g"))
  926. (match_operand:SI 3 "general_operand" "g")))]
  927. ""
  928. "cmpv %2,%1,%0,%3")
  929. (define_insn ""
  930. [(set (cc0)
  931. (minus
  932. (zero_extract:SI (match_operand:QI 0 "general_operand" "g")
  933. (match_operand:SI 1 "general_operand" "g")
  934. (match_operand:SI 2 "general_operand" "g"))
  935. (match_operand:SI 3 "general_operand" "g")))]
  936. ""
  937. "cmpzv %2,%1,%0,%3")
  938. (define_insn "extv"
  939. [(set (match_operand:SI 0 "general_operand" "=g")
  940. (sign_extract:SI (match_operand:QI 1 "general_operand" "g")
  941. (match_operand:SI 2 "general_operand" "g")
  942. (match_operand:SI 3 "general_operand" "g")))]
  943. ""
  944. "extv %3,%2,%1,%0")
  945. (define_insn "extzv"
  946. [(set (match_operand:SI 0 "general_operand" "=g")
  947. (zero_extract:SI (match_operand:QI 1 "general_operand" "g")
  948. (match_operand:SI 2 "general_operand" "g")
  949. (match_operand:SI 3 "general_operand" "g")))]
  950. ""
  951. "extzv %3,%2,%1,%0")
  952. (define_insn ""
  953. [(set (match_operand:SI 0 "general_operand" "=g")
  954. (sign_extract:SI (match_operand:SI 1 "general_operand" "r")
  955. (match_operand:SI 2 "general_operand" "g")
  956. (match_operand:SI 3 "general_operand" "g")))]
  957. ""
  958. "extv %3,%2,%1,%0")
  959. (define_insn ""
  960. [(set (match_operand:SI 0 "general_operand" "=g")
  961. (zero_extract:SI (match_operand:SI 1 "general_operand" "r")
  962. (match_operand:SI 2 "general_operand" "g")
  963. (match_operand:SI 3 "general_operand" "g")))]
  964. ""
  965. "extzv %3,%2,%1,%0")
  966. (define_insn "insv"
  967. [(set (zero_extract:SI (match_operand:QI 0 "general_operand" "=g")
  968. (match_operand:SI 1 "general_operand" "g")
  969. (match_operand:SI 2 "general_operand" "g"))
  970. (match_operand:SI 3 "general_operand" "g"))]
  971. ""
  972. "insv %3,%2,%1,%0")
  973. (define_insn ""
  974. [(set (zero_extract:SI (match_operand:SI 0 "general_operand" "=r")
  975. (match_operand:SI 1 "general_operand" "g")
  976. (match_operand:SI 2 "general_operand" "g"))
  977. (match_operand:SI 3 "general_operand" "g"))]
  978. ""
  979. "insv %3,%2,%1,%0")
  980. (define_insn "jump"
  981. [(set (pc)
  982. (label_ref (match_operand 0 "" "")))]
  983. ""
  984. "jbr %l0")
  985. (define_insn "beq"
  986. [(set (pc)
  987. (if_then_else (eq (cc0)
  988. (const_int 0))
  989. (label_ref (match_operand 0 "" ""))
  990. (pc)))]
  991. ""
  992. "jeql %l0")
  993. (define_insn "bne"
  994. [(set (pc)
  995. (if_then_else (ne (cc0)
  996. (const_int 0))
  997. (label_ref (match_operand 0 "" ""))
  998. (pc)))]
  999. ""
  1000. "jneq %l0")
  1001. (define_insn "bgt"
  1002. [(set (pc)
  1003. (if_then_else (gt (cc0)
  1004. (const_int 0))
  1005. (label_ref (match_operand 0 "" ""))
  1006. (pc)))]
  1007. ""
  1008. "jgtr %l0")
  1009. (define_insn "bgtu"
  1010. [(set (pc)
  1011. (if_then_else (gtu (cc0)
  1012. (const_int 0))
  1013. (label_ref (match_operand 0 "" ""))
  1014. (pc)))]
  1015. ""
  1016. "jgtru %l0")
  1017. (define_insn "blt"
  1018. [(set (pc)
  1019. (if_then_else (lt (cc0)
  1020. (const_int 0))
  1021. (label_ref (match_operand 0 "" ""))
  1022. (pc)))]
  1023. ""
  1024. "jlss %l0")
  1025. (define_insn "bltu"
  1026. [(set (pc)
  1027. (if_then_else (ltu (cc0)
  1028. (const_int 0))
  1029. (label_ref (match_operand 0 "" ""))
  1030. (pc)))]
  1031. ""
  1032. "jlssu %l0")
  1033. (define_insn "bge"
  1034. [(set (pc)
  1035. (if_then_else (ge (cc0)
  1036. (const_int 0))
  1037. (label_ref (match_operand 0 "" ""))
  1038. (pc)))]
  1039. ""
  1040. "jgeq %l0")
  1041. (define_insn "bgeu"
  1042. [(set (pc)
  1043. (if_then_else (geu (cc0)
  1044. (const_int 0))
  1045. (label_ref (match_operand 0 "" ""))
  1046. (pc)))]
  1047. ""
  1048. "jgequ %l0")
  1049. (define_insn "ble"
  1050. [(set (pc)
  1051. (if_then_else (le (cc0)
  1052. (const_int 0))
  1053. (label_ref (match_operand 0 "" ""))
  1054. (pc)))]
  1055. ""
  1056. "jleq %l0")
  1057. (define_insn "bleu"
  1058. [(set (pc)
  1059. (if_then_else (leu (cc0)
  1060. (const_int 0))
  1061. (label_ref (match_operand 0 "" ""))
  1062. (pc)))]
  1063. ""
  1064. "jlequ %l0")
  1065. (define_insn ""
  1066. [(set (pc)
  1067. (if_then_else (eq (cc0)
  1068. (const_int 0))
  1069. (pc)
  1070. (label_ref (match_operand 0 "" ""))))]
  1071. ""
  1072. "jneq %l0")
  1073. (define_insn ""
  1074. [(set (pc)
  1075. (if_then_else (ne (cc0)
  1076. (const_int 0))
  1077. (pc)
  1078. (label_ref (match_operand 0 "" ""))))]
  1079. ""
  1080. "jeql %l0")
  1081. (define_insn ""
  1082. [(set (pc)
  1083. (if_then_else (gt (cc0)
  1084. (const_int 0))
  1085. (pc)
  1086. (label_ref (match_operand 0 "" ""))))]
  1087. ""
  1088. "jleq %l0")
  1089. (define_insn ""
  1090. [(set (pc)
  1091. (if_then_else (gtu (cc0)
  1092. (const_int 0))
  1093. (pc)
  1094. (label_ref (match_operand 0 "" ""))))]
  1095. ""
  1096. "jlequ %l0")
  1097. (define_insn ""
  1098. [(set (pc)
  1099. (if_then_else (lt (cc0)
  1100. (const_int 0))
  1101. (pc)
  1102. (label_ref (match_operand 0 "" ""))))]
  1103. ""
  1104. "jgeq %l0")
  1105. (define_insn ""
  1106. [(set (pc)
  1107. (if_then_else (ltu (cc0)
  1108. (const_int 0))
  1109. (pc)
  1110. (label_ref (match_operand 0 "" ""))))]
  1111. ""
  1112. "jgequ %l0")
  1113. (define_insn ""
  1114. [(set (pc)
  1115. (if_then_else (ge (cc0)
  1116. (const_int 0))
  1117. (pc)
  1118. (label_ref (match_operand 0 "" ""))))]
  1119. ""
  1120. "jlss %l0")
  1121. (define_insn ""
  1122. [(set (pc)
  1123. (if_then_else (geu (cc0)
  1124. (const_int 0))
  1125. (pc)
  1126. (label_ref (match_operand 0 "" ""))))]
  1127. ""
  1128. "jlssu %l0")
  1129. (define_insn ""
  1130. [(set (pc)
  1131. (if_then_else (le (cc0)
  1132. (const_int 0))
  1133. (pc)
  1134. (label_ref (match_operand 0 "" ""))))]
  1135. ""
  1136. "jgtr %l0")
  1137. (define_insn ""
  1138. [(set (pc)
  1139. (if_then_else (leu (cc0)
  1140. (const_int 0))
  1141. (pc)
  1142. (label_ref (match_operand 0 "" ""))))]
  1143. ""
  1144. "jgtru %l0")
  1145. ;; Recognize jbs and jbc instructions.
  1146. (define_insn ""
  1147. [(set (pc)
  1148. (if_then_else
  1149. (ne (sign_extract:SI (match_operand:QI 0 "general_operand" "g")
  1150. (const_int 1)
  1151. (match_operand:SI 1 "general_operand" "g"))
  1152. (const_int 0))
  1153. (label_ref (match_operand 2 "" ""))
  1154. (pc)))]
  1155. ""
  1156. "jbs %1,%0,%l2")
  1157. (define_insn ""
  1158. [(set (pc)
  1159. (if_then_else
  1160. (eq (sign_extract:SI (match_operand:QI 0 "general_operand" "g")
  1161. (const_int 1)
  1162. (match_operand:SI 1 "general_operand" "g"))
  1163. (const_int 0))
  1164. (label_ref (match_operand 2 "" ""))
  1165. (pc)))]
  1166. ""
  1167. "jbc %1,%0,%l2")
  1168. (define_insn ""
  1169. [(set (pc)
  1170. (if_then_else
  1171. (ne (sign_extract:SI (match_operand:QI 0 "general_operand" "g")
  1172. (const_int 1)
  1173. (match_operand:SI 1 "general_operand" "g"))
  1174. (const_int 0))
  1175. (pc)
  1176. (label_ref (match_operand 2 "" ""))))]
  1177. ""
  1178. "jbc %1,%0,%l2")
  1179. (define_insn ""
  1180. [(set (pc)
  1181. (if_then_else
  1182. (eq (sign_extract:SI (match_operand:QI 0 "general_operand" "g")
  1183. (const_int 1)
  1184. (match_operand:SI 1 "general_operand" "g"))
  1185. (const_int 0))
  1186. (pc)
  1187. (label_ref (match_operand 2 "" ""))))]
  1188. ""
  1189. "jbs %1,%0,%l2")
  1190. (define_insn ""
  1191. [(set (pc)
  1192. (if_then_else
  1193. (ne (sign_extract:SI (match_operand:SI 0 "general_operand" "r")
  1194. (const_int 1)
  1195. (match_operand:SI 1 "general_operand" "g"))
  1196. (const_int 0))
  1197. (label_ref (match_operand 2 "" ""))
  1198. (pc)))]
  1199. ""
  1200. "jbs %1,%0,%l2")
  1201. (define_insn ""
  1202. [(set (pc)
  1203. (if_then_else
  1204. (eq (sign_extract:SI (match_operand:SI 0 "general_operand" "r")
  1205. (const_int 1)
  1206. (match_operand:SI 1 "general_operand" "g"))
  1207. (const_int 0))
  1208. (label_ref (match_operand 2 "" ""))
  1209. (pc)))]
  1210. ""
  1211. "jbc %1,%0,%l2")
  1212. (define_insn ""
  1213. [(set (pc)
  1214. (if_then_else
  1215. (ne (sign_extract:SI (match_operand:SI 0 "general_operand" "r")
  1216. (const_int 1)
  1217. (match_operand:SI 1 "general_operand" "g"))
  1218. (const_int 0))
  1219. (pc)
  1220. (label_ref (match_operand 2 "" ""))))]
  1221. ""
  1222. "jbc %1,%0,%l2")
  1223. (define_insn ""
  1224. [(set (pc)
  1225. (if_then_else
  1226. (eq (sign_extract:SI (match_operand:SI 0 "general_operand" "r")
  1227. (const_int 1)
  1228. (match_operand:SI 1 "general_operand" "g"))
  1229. (const_int 0))
  1230. (pc)
  1231. (label_ref (match_operand 2 "" ""))))]
  1232. ""
  1233. "jbs %1,%0,%l2")
  1234. (define_insn ""
  1235. [(set (pc)
  1236. (if_then_else
  1237. (ne (and:SI (match_operand:SI 0 "general_operand" "g")
  1238. (const_int 1))
  1239. (const_int 0))
  1240. (label_ref (match_operand 1 "" ""))
  1241. (pc)))]
  1242. ""
  1243. "jlbs %0,%l1")
  1244. (define_insn ""
  1245. [(set (pc)
  1246. (if_then_else
  1247. (eq (and:SI (match_operand:SI 0 "general_operand" "g")
  1248. (const_int 1))
  1249. (const_int 0))
  1250. (label_ref (match_operand 1 "" ""))
  1251. (pc)))]
  1252. ""
  1253. "jlbc %0,%l1")
  1254. (define_insn ""
  1255. [(set (pc)
  1256. (if_then_else
  1257. (ne (and:SI (match_operand:SI 0 "general_operand" "g")
  1258. (const_int 1))
  1259. (const_int 0))
  1260. (pc)
  1261. (label_ref (match_operand 1 "" ""))))]
  1262. ""
  1263. "jlbc %0,%l1")
  1264. (define_insn ""
  1265. [(set (pc)
  1266. (if_then_else
  1267. (eq (and:SI (match_operand:SI 0 "general_operand" "g")
  1268. (const_int 1))
  1269. (const_int 0))
  1270. (pc)
  1271. (label_ref (match_operand 1 "" ""))))]
  1272. ""
  1273. "jlbs %0,%l1")
  1274. ;; These four entries allow a jlbc or jlbs to be made
  1275. ;; by combination with a bic.
  1276. (define_insn ""
  1277. [(set (pc)
  1278. (if_then_else
  1279. (ne (and:SI (match_operand:SI 0 "general_operand" "g")
  1280. (not:SI (const_int -2)))
  1281. (const_int 0))
  1282. (label_ref (match_operand 1 "" ""))
  1283. (pc)))]
  1284. ""
  1285. "jlbs %0,%l1")
  1286. (define_insn ""
  1287. [(set (pc)
  1288. (if_then_else
  1289. (eq (and:SI (match_operand:SI 0 "general_operand" "g")
  1290. (not:SI (const_int -2)))
  1291. (const_int 0))
  1292. (label_ref (match_operand 1 "" ""))
  1293. (pc)))]
  1294. ""
  1295. "jlbc %0,%l1")
  1296. (define_insn ""
  1297. [(set (pc)
  1298. (if_then_else
  1299. (ne (and:SI (match_operand:SI 0 "general_operand" "g")
  1300. (not:SI (const_int -2)))
  1301. (const_int 0))
  1302. (pc)
  1303. (label_ref (match_operand 1 "" ""))))]
  1304. ""
  1305. "jlbc %0,%l1")
  1306. (define_insn ""
  1307. [(set (pc)
  1308. (if_then_else
  1309. (eq (and:SI (match_operand:SI 0 "general_operand" "g")
  1310. (not:SI (const_int -2)))
  1311. (const_int 0))
  1312. (pc)
  1313. (label_ref (match_operand 1 "" ""))))]
  1314. ""
  1315. "jlbs %0,%l1")
  1316. ;; Subtract-and-jump and Add-and-jump insns.
  1317. ;; These are not used when output is for the Unix assembler
  1318. ;; because it does not know how to modify them to reach far.
  1319. ;; Normal sob insns.
  1320. (define_insn ""
  1321. [(set (pc)
  1322. (if_then_else
  1323. (gt (minus:SI (match_operand:SI 0 "general_operand" "+g")
  1324. (const_int 1))
  1325. (const_int 0))
  1326. (label_ref (match_operand 1 "" ""))
  1327. (pc)))
  1328. (set (match_dup 0)
  1329. (minus:SI (match_dup 0)
  1330. (const_int 1)))]
  1331. "!TARGET_UNIX_ASM"
  1332. "jsobgtr %0,%l1")
  1333. (define_insn ""
  1334. [(set (pc)
  1335. (if_then_else
  1336. (ge (minus:SI (match_operand:SI 0 "general_operand" "+g")
  1337. (const_int 1))
  1338. (const_int 0))
  1339. (label_ref (match_operand 1 "" ""))
  1340. (pc)))
  1341. (set (match_dup 0)
  1342. (minus:SI (match_dup 0)
  1343. (const_int 1)))]
  1344. "!TARGET_UNIX_ASM"
  1345. "jsobgeq %0,%l1")
  1346. ;; Reversed sob insns.
  1347. (define_insn ""
  1348. [(set (pc)
  1349. (if_then_else
  1350. (le (minus:SI (match_operand:SI 0 "general_operand" "+g")
  1351. (const_int 1))
  1352. (const_int 0))
  1353. (pc)
  1354. (label_ref (match_operand 1 "" ""))))
  1355. (set (match_dup 0)
  1356. (minus:SI (match_dup 0)
  1357. (const_int 1)))]
  1358. "!TARGET_UNIX_ASM"
  1359. "jsobgtr %0,%l1")
  1360. (define_insn ""
  1361. [(set (pc)
  1362. (if_then_else
  1363. (lt (minus:SI (match_operand:SI 0 "general_operand" "+g")
  1364. (const_int 1))
  1365. (const_int 0))
  1366. (pc)
  1367. (label_ref (match_operand 1 "" ""))))
  1368. (set (match_dup 0)
  1369. (minus:SI (match_dup 0)
  1370. (const_int 1)))]
  1371. "!TARGET_UNIX_ASM"
  1372. "jsobgeq %0,%l1")
  1373. ;; Normal aob insns.
  1374. (define_insn ""
  1375. [(set (pc)
  1376. (if_then_else
  1377. (lt (minus (plus:SI (match_operand:SI 0 "general_operand" "+g")
  1378. (const_int 1))
  1379. (match_operand:SI 1 "general_operand" "g"))
  1380. (const_int 0))
  1381. (label_ref (match_operand 2 "" ""))
  1382. (pc)))
  1383. (set (match_dup 0)
  1384. (plus:SI (match_dup 0)
  1385. (const_int 1)))]
  1386. "!TARGET_UNIX_ASM"
  1387. "jaoblss %1,%0,%l2")
  1388. (define_insn ""
  1389. [(set (pc)
  1390. (if_then_else
  1391. (le (minus (plus:SI (match_operand:SI 0 "general_operand" "+g")
  1392. (const_int 1))
  1393. (match_operand:SI 1 "general_operand" "g"))
  1394. (const_int 0))
  1395. (label_ref (match_operand 2 "" ""))
  1396. (pc)))
  1397. (set (match_dup 0)
  1398. (plus:SI (match_dup 0)
  1399. (const_int 1)))]
  1400. "!TARGET_UNIX_ASM"
  1401. "jaobleq %1,%0,%l2")
  1402. ;; Reverse aob insns.
  1403. (define_insn ""
  1404. [(set (pc)
  1405. (if_then_else
  1406. (ge (minus (plus:SI (match_operand:SI 0 "general_operand" "+g")
  1407. (const_int 1))
  1408. (match_operand:SI 1 "general_operand" "g"))
  1409. (const_int 0))
  1410. (pc)
  1411. (label_ref (match_operand 2 "" ""))))
  1412. (set (match_dup 0)
  1413. (plus:SI (match_dup 0)
  1414. (const_int 1)))]
  1415. "!TARGET_UNIX_ASM"
  1416. "jaoblss %1,%0,%l2")
  1417. (define_insn ""
  1418. [(set (pc)
  1419. (if_then_else
  1420. (gt (minus (plus:SI (match_operand:SI 0 "general_operand" "+g")
  1421. (const_int 1))
  1422. (match_operand:SI 1 "general_operand" "g"))
  1423. (const_int 0))
  1424. (pc)
  1425. (label_ref (match_operand 2 "" ""))))
  1426. (set (match_dup 0)
  1427. (plus:SI (match_dup 0)
  1428. (const_int 1)))]
  1429. "!TARGET_UNIX_ASM"
  1430. "jaobleq %1,%0,%l2")
  1431. (define_insn "call"
  1432. [(call (match_operand:QI 0 "general_operand" "g")
  1433. (match_operand:QI 1 "general_operand" "g"))]
  1434. ""
  1435. "calls %1,%0")
  1436. (define_insn "return"
  1437. [(return)]
  1438. ""
  1439. "ret")
  1440. (define_insn "casesi"
  1441. [(set (pc)
  1442. (if_then_else (le (minus:SI (match_operand:SI 0 "general_operand" "g")
  1443. (match_operand:SI 1 "general_operand" "g"))
  1444. (match_operand:SI 2 "general_operand" "g"))
  1445. (plus:SI (label_ref:SI (match_operand 3 "" ""))
  1446. (sign_extend:SI
  1447. (mem:HI (plus:SI (pc)
  1448. (minus:SI (match_dup 0)
  1449. (match_dup 1))))))
  1450. (pc)))]
  1451. ""
  1452. "casel %0,%1,%2")
  1453. ;; This arises from the preceding by simplification if operand 1 is zero.
  1454. (define_insn ""
  1455. [(set (pc)
  1456. (if_then_else (le (match_operand:SI 0 "general_operand" "g")
  1457. (match_operand:SI 1 "general_operand" "g"))
  1458. (plus:SI (label_ref:SI (match_operand 3 "" ""))
  1459. (sign_extend:SI
  1460. (mem:HI (plus:SI (pc)
  1461. (match_dup 0)))))
  1462. (pc)))]
  1463. ""
  1464. "casel %0,$0,%1")
  1465. ;;- Local variables:
  1466. ;;- mode:emacs-lisp
  1467. ;;- comment-start: ";;- "
  1468. ;;- eval: (set-syntax-table (copy-sequence (syntax-table)))
  1469. ;;- eval: (modify-syntax-entry ?[ "(]")
  1470. ;;- eval: (modify-syntax-entry ?] ")[")
  1471. ;;- eval: (modify-syntax-entry ?{ "(}")
  1472. ;;- eval: (modify-syntax-entry ?} "){")
  1473. ;;- End: