basys3top_drc_routed.rpt 2.4 KB

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  1. Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
  2. ---------------------------------------------------------------------------------------------------------------------------------------------
  3. | Tool Version : Vivado v.2023.1 (win64) Build 3865809 Sun May 7 15:05:29 MDT 2023
  4. | Date : Thu Jun 8 10:54:21 2023
  5. | Host : DESKTOP-5QEHRRG running 64-bit major release (build 9200)
  6. | Command : report_drc -file basys3top_drc_routed.rpt -pb basys3top_drc_routed.pb -rpx basys3top_drc_routed.rpx
  7. | Design : basys3top
  8. | Device : xc7a35tcpg236-1
  9. | Speed File : -1
  10. | Design State : Fully Routed
  11. ---------------------------------------------------------------------------------------------------------------------------------------------
  12. Report DRC
  13. Table of Contents
  14. -----------------
  15. 1. REPORT SUMMARY
  16. 2. REPORT DETAILS
  17. 1. REPORT SUMMARY
  18. -----------------
  19. Netlist: netlist
  20. Floorplan: design_1
  21. Design limits: <entire design considered>
  22. Ruledeck: default
  23. Max violations: <unlimited>
  24. Violations found: 1
  25. +----------+----------+-----------------------------------------------------+------------+
  26. | Rule | Severity | Description | Violations |
  27. +----------+----------+-----------------------------------------------------+------------+
  28. | CFGBVS-1 | Warning | Missing CFGBVS and CONFIG_VOLTAGE Design Properties | 1 |
  29. +----------+----------+-----------------------------------------------------+------------+
  30. 2. REPORT DETAILS
  31. -----------------
  32. CFGBVS-1#1 Warning
  33. Missing CFGBVS and CONFIG_VOLTAGE Design Properties
  34. Neither the CFGBVS nor CONFIG_VOLTAGE voltage property is set in the current_design. Configuration bank voltage select (CFGBVS) must be set to VCCO or GND, and CONFIG_VOLTAGE must be set to the correct configuration voltage, in order to determine the I/O voltage support for the pins in bank 0. It is suggested to specify these either using the 'Edit Device Properties' function in the GUI or directly in the XDC file using the following syntax:
  35. set_property CFGBVS value1 [current_design]
  36. #where value1 is either VCCO or GND
  37. set_property CONFIG_VOLTAGE value2 [current_design]
  38. #where value2 is the voltage provided to configuration bank 0
  39. Refer to the device configuration user guide for more information.
  40. Related violations: <none>