pic16f1933dip28.py 3.3 KB

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  1. """
  2. # TOP2049 Open Source programming suite
  3. #
  4. # Microchip PIC16F1933 dip28
  5. #
  6. # Copyright (c) 2013 Pavel Stemberk <stemberk@gmail.com>
  7. #
  8. # This program is free software; you can redistribute it and/or modify
  9. # it under the terms of the GNU General Public License as published by
  10. # the Free Software Foundation; either version 2 of the License, or
  11. # (at your option) any later version.
  12. #
  13. # This program is distributed in the hope that it will be useful,
  14. # but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. # GNU General Public License for more details.
  17. #
  18. # You should have received a copy of the GNU General Public License along
  19. # with this program; if not, write to the Free Software Foundation, Inc.,
  20. # 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  21. """
  22. from .microchip8_splittedPMarea_hasResetPC import *
  23. class Chip_Pic16F1933dip28(microchip8_splittedPMarea_hasResetPC):
  24. nLatches = 8
  25. hasEEPROM = True
  26. def __init__(self):
  27. microchip8_splittedPMarea_hasResetPC.__init__(self,
  28. chipPackage="dip28",
  29. chipPinVCC=20,
  30. chipPinsVPP=1,
  31. chipPinGND=19,
  32. signature=b"\x68\x23",
  33. flashPageSize=0x1000,
  34. flashPages=1,
  35. eepromPageSize=256,
  36. eepromPages=1,
  37. fuseBytes=4
  38. )
  39. fuseDesc = (
  40. BitDescription(0, "FOSC[0], 000=LP, 001=XT, 010=HS, 011=EXTRC"),
  41. BitDescription(1, "FOSC[1], 100=INTOSC, 101=ECL - Low power mode"),
  42. BitDescription(2, "FOSC[2], 110=ECM - Medium power mode, 111=ECH - High power mode"),
  43. BitDescription(3, "WDTE[0], 00=WDT disabled, 11=WDT enabled"),
  44. BitDescription(4, "WDTE[1]"),
  45. BitDescription(5, "nPWRTE"),
  46. BitDescription(6, "MCLRE, 1=nMCLR/Vpp pin is nMCLR, weak pull-up enabled, ignored if LVP=1 "),
  47. BitDescription(7, "nCP 1=program memory code protection is disabled"),
  48. BitDescription(8, "nCPD, 1=data memory code protection is disabled"),
  49. BitDescription(9, "BOREN[0], 00=BOR disabled"),
  50. BitDescription(10, "BOREN[1]"),
  51. BitDescription(11, "nCLKOUTEN, 0=CLKOUT is enabled on CLKOUT pin"),
  52. BitDescription(12, "IESO, 0=Internal/External Switchover mode is disabled"),
  53. BitDescription(13, "FCMEM, 0=Fail-Safe Clock Monitor is disabled"),
  54. BitDescription(14, "NA"),
  55. BitDescription(15, "NA"),
  56. BitDescription(16, "WRT[0], 11=Write protection off"),
  57. BitDescription(17, "WRT[1]"),
  58. BitDescription(18, "Unused"),
  59. BitDescription(19, "Unused"),
  60. BitDescription(20, "VCAPEN[0] - only for PIC16F193x, 00=Vcap enabled on RA0"),
  61. BitDescription(21, "VCAPEN[1], 01=Vcap enabled on RA5, 10=Vcap enabled on RA6, 11=disabled "),
  62. BitDescription(22, "Unused"),
  63. BitDescription(23, "Unused"),
  64. BitDescription(24, "PLLEN, 0=4xPLL disabled"),
  65. BitDescription(25, "STVREN, 1=Stack overflow or underflow will cause a reset"),
  66. BitDescription(26, "BORV, 1=Brown-out Reset voltage set to 1.9V"),
  67. BitDescription(27, "Unused"),
  68. BitDescription(28, "nDEBUG, 0=ICSPCLK and ICSPDAT are dedicated to the debugger"),
  69. BitDescription(29, "LVP 1=Low-voltage programming enabled"),
  70. BitDescription(30, "NA"),
  71. BitDescription(31, "NA"),
  72. )
  73. ChipDescription(
  74. Chip_Pic16F1933dip28,
  75. bitfile="microchip01dip28",
  76. chipID="pic16f1933dip28",
  77. runtimeID=(0xDE07, 0x01),
  78. chipVendors="Microchip",
  79. description="PIC16F1933, PIC16LF1933",
  80. packages=(("dip28", ""),),
  81. fuseDesc=fuseDesc,
  82. maintainer="Pavel Stemberk <stemberk@gmail.com>",
  83. )