pic18f1220dip18.py 5.1 KB

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  1. """
  2. # TOP2049 Open Source programming suite
  3. #
  4. # Microchip PIC18F1220 DIP18
  5. #
  6. # Copyright (c) 2013 Pavel Stemberk <stemberk@gmail.com>
  7. #
  8. # This program is free software; you can redistribute it and/or modify
  9. # it under the terms of the GNU General Public License as published by
  10. # the Free Software Foundation; either version 2 of the License, or
  11. # (at your option) any later version.
  12. #
  13. # This program is distributed in the hope that it will be useful,
  14. # but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. # GNU General Public License for more details.
  17. #
  18. # You should have received a copy of the GNU General Public License along
  19. # with this program; if not, write to the Free Software Foundation, Inc.,
  20. # 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  21. """
  22. from .microchip8_18f1220family import *
  23. class Chip_PIC18F1220dip18(microchip8_18f1220family):
  24. hasEEPROM = True
  25. writeBufferSize = 8
  26. eraseBufferSize = 64
  27. def __init__(self):
  28. microchip8_18f1220family.__init__(self,
  29. chipPackage="DIP18",
  30. chipPinVCC=14,
  31. chipPinsVPP=4,
  32. chipPinGND=5,
  33. signature=b"\xE7\x07",
  34. flashPageSize=0x1000,
  35. flashPages=1,
  36. eepromPageSize=0x100,
  37. eepromPages=1,
  38. fuseBytes=14
  39. )
  40. fuseDesc = (
  41. BitDescription(0o00, "NA"),
  42. BitDescription(0o01, "NA"),
  43. BitDescription(0o02, "NA"),
  44. BitDescription(0o03, "NA"),
  45. BitDescription(0o04, "NA"),
  46. BitDescription(0o05, "NA"),
  47. BitDescription(0o06, "NA"),
  48. BitDescription(0o07, "NA"),
  49. BitDescription(0o10, "FOSC[0], 0000=LP, 1000=internal RC oscillator, RA6=CLKO"),
  50. BitDescription(0o11, "FOSC[1]"),
  51. BitDescription(0o12, "FOSC[2]"),
  52. BitDescription(0o13, "FOSC[3]"),
  53. BitDescription(0o14, "NA"),
  54. BitDescription(0o15, "NA"),
  55. BitDescription(0o16, "FSCM, 0=Fail-Safe Clock Monitor is disabled"),
  56. BitDescription(0o17, "IESO, 0=Internal/External Switchover mode is disabled"),
  57. BitDescription(0o20, "nPWRT"),
  58. BitDescription(0o21, "BOR"),
  59. BitDescription(0o22, "BORV[0]"),
  60. BitDescription(0o23, "BORV[1]"),
  61. BitDescription(0o24, "NA"),
  62. BitDescription(0o25, "NA"),
  63. BitDescription(0o26, "NA"),
  64. BitDescription(0o27, "NA"),
  65. BitDescription(0o30, "WDT, 0=WDT disabled, 1=WDT enabled"),
  66. BitDescription(0o31, "WDTPS[0]"),
  67. BitDescription(0o32, "WDTPS[1]"),
  68. BitDescription(0o33, "WDTPS[2]"),
  69. BitDescription(0o34, "WDTPS[3]"),
  70. BitDescription(0o35, "NA"),
  71. BitDescription(0o36, "NA"),
  72. BitDescription(0o37, "NA"),
  73. BitDescription(0o40, "NA"),
  74. BitDescription(0o41, "NA"),
  75. BitDescription(0o42, "NA"),
  76. BitDescription(0o43, "NA"),
  77. BitDescription(0o44, "NA"),
  78. BitDescription(0o45, "NA"),
  79. BitDescription(0o46, "NA"),
  80. BitDescription(0o47, "NA"),
  81. BitDescription(0o50, "NA"),
  82. BitDescription(0o51, "NA"),
  83. BitDescription(0o52, "NA"),
  84. BitDescription(0o53, "NA"),
  85. BitDescription(0o54, "NA"),
  86. BitDescription(0o55, "NA"),
  87. BitDescription(0o56, "NA"),
  88. BitDescription(0o57, "MCLRE"),
  89. BitDescription(0o60, "STVR"),
  90. BitDescription(0o61, "NA"),
  91. BitDescription(0o62, "LVP"),
  92. BitDescription(0o63, "NA"),
  93. BitDescription(0o64, "NA"),
  94. BitDescription(0o65, "NA"),
  95. BitDescription(0o66, "NA"),
  96. BitDescription(0o67, "nDEBUG"),
  97. BitDescription(0o70, "NA"),
  98. BitDescription(0o71, "NA"),
  99. BitDescription(0o72, "NA"),
  100. BitDescription(0o73, "NA"),
  101. BitDescription(0o74, "NA"),
  102. BitDescription(0o75, "NA"),
  103. BitDescription(0o76, "NA"),
  104. BitDescription(0o77, "NA"),
  105. BitDescription(0o100, "CP[0]"),
  106. BitDescription(0o101, "CP[1]"),
  107. BitDescription(0o102, "NA"),
  108. BitDescription(0o103, "NA"),
  109. BitDescription(0o104, "NA"),
  110. BitDescription(0o105, "NA"),
  111. BitDescription(0o106, "NA"),
  112. BitDescription(0o107, "NA"),
  113. BitDescription(0o110, "NA"),
  114. BitDescription(0o111, "NA"),
  115. BitDescription(0o112, "NA"),
  116. BitDescription(0o113, "NA"),
  117. BitDescription(0o114, "NA"),
  118. BitDescription(0o115, "NA"),
  119. BitDescription(0o116, "CPB"),
  120. BitDescription(0o117, "CPD"),
  121. BitDescription(0o120, "WRT[0]"),
  122. BitDescription(0o121, "WRT[1]"),
  123. BitDescription(0o122, "NA"),
  124. BitDescription(0o123, "NA"),
  125. BitDescription(0o124, "NA"),
  126. BitDescription(0o125, "NA"),
  127. BitDescription(0o126, "NA"),
  128. BitDescription(0o127, "NA"),
  129. BitDescription(0o130, "NA"),
  130. BitDescription(0o131, "NA"),
  131. BitDescription(0o132, "NA"),
  132. BitDescription(0o133, "NA"),
  133. BitDescription(0o134, "NA"),
  134. BitDescription(0o135, "WRTC"),
  135. BitDescription(0o136, "WRTB"),
  136. BitDescription(0o137, "WRTD"),
  137. BitDescription(0o140, "EBTR[0]"),
  138. BitDescription(0o141, "EBTR[1]"),
  139. BitDescription(0o142, "NA"),
  140. BitDescription(0o143, "NA"),
  141. BitDescription(0o144, "NA"),
  142. BitDescription(0o145, "NA"),
  143. BitDescription(0o146, "NA"),
  144. BitDescription(0o147, "NA"),
  145. BitDescription(0o150, "NA"),
  146. BitDescription(0o151, "NA"),
  147. BitDescription(0o152, "NA"),
  148. BitDescription(0o153, "NA"),
  149. BitDescription(0o154, "NA"),
  150. BitDescription(0o155, "NA"),
  151. BitDescription(0o156, "EBTRB"),
  152. BitDescription(0o157, "NA"),
  153. )
  154. ChipDescription(
  155. Chip_PIC18F1220dip18,
  156. bitfile="microchip01dip18",
  157. chipID="PIC18F1220dip18",
  158. runtimeID=(0xDE04, 0x01),
  159. chipVendors="Microchip",
  160. description="PIC18F1220",
  161. packages=(("DIP18", ""),),
  162. fuseDesc=fuseDesc,
  163. maintainer="Pavel Stemberk <stemberk@gmail.com>",
  164. )