awlsim/tests/tc100_instructions/insn_Z.awl

ORGANIZATION_BLOCK OB 1
BEGIN

	// Test C# immediate
	L		C#123
	__ASSERT==	__ACCU 1,	291


	// Test down counter (ZR)
	CLR
	FR		Z 10
	SET
	R		Z 10
	FR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	0
	L		C#123
	SET
	S		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	CLR
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	123
	SET
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	122
	CLR
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	122
	LC		Z 10
	__ASSERT==	__ACCU 1,	C#122
	L		C#1
	CLR
	S		Z 10
	SET
	S		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	1
	CLR
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	SET
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	0
	L		Z 10
	__ASSERT==	__ACCU 1,	0
	CLR
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	0
	SET
	ZR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	0
	L		Z 10
	__ASSERT==	__ACCU 1,	0


	// Test up counter (ZV)
	CLR
	FR		Z 10
	SET
	R		Z 10
	FR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	0
	L		C#123
	SET
	S		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	CLR
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	123
	SET
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	124
	CLR
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	124
	LC		Z 10
	__ASSERT==	__ACCU 1,	C#124
	L		C#998
	CLR
	S		Z 10
	SET
	S		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	998
	CLR
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	SET
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	999
	CLR
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	SET
	ZV		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	1
	L		Z 10
	__ASSERT==	__ACCU 1,	999


	// Test FR
	CLR
	FR		Z 10
	SET
	R		Z 10
	FR		Z 10
	U		Z 10
	__ASSERT==	__STW VKE,	0
	SET
	ZV		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	1
	CLR
	FR		Z 10
	SET
	FR		Z 10
	ZV		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	2
	ZR		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	1
	CLR
	FR		Z 10
	SET
	FR		Z 10
	ZR		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	0
	SET
	L		C#321
	S		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	321
	CLR
	FR		Z 10
	SET
	FR		Z 10
	L		C#123
	S		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	123
	SET
	FR		Z 10
	L		C#888
	S		Z 10
	L		Z 10
	__ASSERT==	__ACCU 1,	123


	// Test counter parameter
	AUF		DB 1
	L		DBW 0
	__ASSERT==	__ACCU 1,	24
	CALL FB 1, DB 1 (
		COUNTER_VAR	:= Z 42
	)


	CALL SFC 46 // STOP CPU
END_ORGANIZATION_BLOCK


FUNCTION_BLOCK FB 1
	VAR_INPUT
		COUNTER_VAR	: COUNTER;
	END_VAR
BEGIN
	L		DIW 0
	__ASSERT==	__ACCU 1,	42
	L		#COUNTER_VAR
	__ASSERT==	__ACCU 1,	0
	U		#COUNTER_VAR
	__ASSERT==	__STW VKE,	0
	SET
	ZV		Z 42
	CLR
	ZV		Z 42
	U		#COUNTER_VAR
	__ASSERT==	__STW VKE,	1
	L		#COUNTER_VAR
	__ASSERT==	__ACCU 1,	1

	ZV		#COUNTER_VAR
	ZR		#COUNTER_VAR
	FR		#COUNTER_VAR
END_FUNCTION_BLOCK


DATA_BLOCK DB 1
	FB 1
BEGIN
	COUNTER_VAR	:= Z 24;
END_DATA_BLOCK