t480-thunderbolt-20241206-unstable.patch 5.6 KB

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  1. From 67b0219a665462ae71f6ba5104edc55ad6245ca7 Mon Sep 17 00:00:00 2001
  2. From: Mate Kukri <km@mkukri.xyz>
  3. Date: Thu, 5 Dec 2024 20:42:40 +0000
  4. Subject: [PATCH] thunderbolt fix-ish
  5. it shows up, but resume is no dice.
  6. Change-Id: I2d91a1d290b35e7ea3a1193b4be7b4ba936e4a15
  7. ---
  8. src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 1 +
  9. src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 13 +++++++++++++
  10. .../lenovo/sklkbl_thinkpad/variants/t480/gpio.c | 8 ++++----
  11. .../sklkbl_thinkpad/variants/t480/overridetree.cb | 4 ++++
  12. .../lenovo/sklkbl_thinkpad/variants/t480s/gpio.c | 8 ++++----
  13. .../sklkbl_thinkpad/variants/t480s/overridetree.cb | 4 ++++
  14. 6 files changed, 30 insertions(+), 8 deletions(-)
  15. diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
  16. index 21076315ab..0766c03716 100644
  17. --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
  18. +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
  19. @@ -19,6 +19,7 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
  20. select SOC_INTEL_COMMON_BLOCK_HDA_VERB
  21. select SPD_READ_BY_WORD
  22. select SYSTEM_TYPE_LAPTOP
  23. + select DRIVERS_INTEL_DTBT
  24. config BOARD_LENOVO_E460
  25. bool
  26. diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
  27. index 237500775f..849540d32d 100644
  28. --- a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
  29. +++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
  30. @@ -35,4 +35,17 @@ DefinitionBlock(
  31. }
  32. #include <southbridge/intel/common/acpi/sleepstates.asl>
  33. +
  34. + Scope (\_SB)
  35. + {
  36. + External (\TBTS, MethodObj)
  37. +
  38. + Method (MPTS, 1, Serialized)
  39. + {
  40. + If (CondRefOf (\TBTS))
  41. + {
  42. + \TBTS()
  43. + }
  44. + }
  45. + }
  46. }
  47. diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
  48. index f7c29e1f39..edfa09fbb7 100644
  49. --- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
  50. +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
  51. @@ -86,7 +86,7 @@ static const struct pad_config gpio_table[] = {
  52. PAD_NC(GPP_C18, NONE),
  53. PAD_NC(GPP_C19, NONE),
  54. PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */
  55. - PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */
  56. + PAD_CFG_GPO(GPP_C21, 1, DEEP), /* TBT_FORCE_PWR */
  57. PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */
  58. PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */
  59. @@ -191,9 +191,9 @@ static const struct pad_config gpio_table[] = {
  60. PAD_NC(GPP_G1, NONE),
  61. PAD_NC(GPP_G2, NONE),
  62. PAD_NC(GPP_G3, NONE),
  63. - PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */
  64. - PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */
  65. - PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */
  66. + PAD_CFG_GPO(GPP_G4, 1, DEEP), /* TBT_RTD3_PWR_EN */
  67. + PAD_CFG_GPO(GPP_G5, 1, DEEP), /* TBT_FORCE_USB_PWR (TBT_RTD3_USB_PWR_EN) */
  68. + PAD_CFG_GPO(GPP_G6, 1, DEEP), /* -TBT_PERST */
  69. PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */
  70. };
  71. diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
  72. index 2f0b20d91a..6d8725ad5a 100644
  73. --- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
  74. +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
  75. @@ -106,6 +106,10 @@ chip soc/intel/skylake
  76. register "PcieRpAdvancedErrorReporting[8]" = "1"
  77. register "PcieRpLtrEnable[8]" = "1"
  78. register "PcieRpHotPlug[8]" = "1"
  79. +
  80. + chip drivers/intel/dtbt
  81. + device pci 0.0 on end
  82. + end
  83. end
  84. # M.2 2280 caddy - x2
  85. diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
  86. index a98dd2bc4e..732917ebfa 100644
  87. --- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
  88. +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
  89. @@ -82,7 +82,7 @@ static const struct pad_config gpio_table[] = {
  90. PAD_NC(GPP_C18, NONE),
  91. PAD_NC(GPP_C19, NONE),
  92. PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */
  93. - PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */
  94. + PAD_CFG_GPO(GPP_C21, 1, DEEP), /* TBT_FORCE_PWR */
  95. PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */
  96. PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */
  97. @@ -187,9 +187,9 @@ static const struct pad_config gpio_table[] = {
  98. PAD_NC(GPP_G1, NONE),
  99. PAD_NC(GPP_G2, NONE),
  100. PAD_NC(GPP_G3, NONE),
  101. - PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */
  102. - PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */
  103. - PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */
  104. + PAD_CFG_GPO(GPP_G4, 1, DEEP), /* TBT_RTD3_PWR_EN */
  105. + PAD_CFG_GPO(GPP_G5, 1, DEEP), /* TBT_FORCE_USB_PWR (TBT_RTD3_USB_PWR_EN) */
  106. + PAD_CFG_GPO(GPP_G6, 1, DEEP), /* -TBT_PERST */
  107. PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */
  108. };
  109. diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
  110. index cea5e485d2..9b952215c5 100644
  111. --- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
  112. +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
  113. @@ -106,6 +106,10 @@ chip soc/intel/skylake
  114. register "PcieRpAdvancedErrorReporting[4]" = "1"
  115. register "PcieRpLtrEnable[4]" = "1"
  116. register "PcieRpHotPlug[4]" = "1"
  117. +
  118. + chip drivers/intel/dtbt
  119. + device pci 0.0 on end
  120. + end
  121. end
  122. # M.2 2280 SSD - x2
  123. --
  124. 2.39.5