pnav10.c 12 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/export.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/irq.h>
  17. #include <asm/dma.h>
  18. #include <asm/bfin5xx_spi.h>
  19. #include <asm/portmux.h>
  20. #include <linux/spi/ad7877.h>
  21. /*
  22. * Name the Board for the /proc/cpuinfo
  23. */
  24. const char bfin_board_name[] = "ADI PNAV-1.0";
  25. /*
  26. * Driver needs to know address, irq and flag pin.
  27. */
  28. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  29. static struct resource bfin_pcmcia_cf_resources[] = {
  30. {
  31. .start = 0x20310000, /* IO PORT */
  32. .end = 0x20312000,
  33. .flags = IORESOURCE_MEM,
  34. }, {
  35. .start = 0x20311000, /* Attribute Memory */
  36. .end = 0x20311FFF,
  37. .flags = IORESOURCE_MEM,
  38. }, {
  39. .start = IRQ_PF4,
  40. .end = IRQ_PF4,
  41. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  42. }, {
  43. .start = 6, /* Card Detect PF6 */
  44. .end = 6,
  45. .flags = IORESOURCE_IRQ,
  46. },
  47. };
  48. static struct platform_device bfin_pcmcia_cf_device = {
  49. .name = "bfin_cf_pcmcia",
  50. .id = -1,
  51. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  52. .resource = bfin_pcmcia_cf_resources,
  53. };
  54. #endif
  55. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  56. static struct platform_device rtc_device = {
  57. .name = "rtc-bfin",
  58. .id = -1,
  59. };
  60. #endif
  61. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  62. #include <linux/smc91x.h>
  63. static struct smc91x_platdata smc91x_info = {
  64. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  65. .leda = RPC_LED_100_10,
  66. .ledb = RPC_LED_TX_RX,
  67. };
  68. static struct resource smc91x_resources[] = {
  69. {
  70. .name = "smc91x-regs",
  71. .start = 0x20300300,
  72. .end = 0x20300300 + 16,
  73. .flags = IORESOURCE_MEM,
  74. }, {
  75. .start = IRQ_PF7,
  76. .end = IRQ_PF7,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. },
  79. };
  80. static struct platform_device smc91x_device = {
  81. .name = "smc91x",
  82. .id = 0,
  83. .num_resources = ARRAY_SIZE(smc91x_resources),
  84. .resource = smc91x_resources,
  85. .dev = {
  86. .platform_data = &smc91x_info,
  87. },
  88. };
  89. #endif
  90. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  91. #include <linux/bfin_mac.h>
  92. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  93. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  94. {
  95. .addr = 1,
  96. .irq = IRQ_MAC_PHYINT,
  97. },
  98. };
  99. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  100. .phydev_number = 1,
  101. .phydev_data = bfin_phydev_data,
  102. .phy_mode = PHY_INTERFACE_MODE_RMII,
  103. .mac_peripherals = bfin_mac_peripherals,
  104. };
  105. static struct platform_device bfin_mii_bus = {
  106. .name = "bfin_mii_bus",
  107. .dev = {
  108. .platform_data = &bfin_mii_bus_data,
  109. }
  110. };
  111. static struct platform_device bfin_mac_device = {
  112. .name = "bfin_mac",
  113. .dev = {
  114. .platform_data = &bfin_mii_bus,
  115. }
  116. };
  117. #endif
  118. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  119. static struct resource net2272_bfin_resources[] = {
  120. {
  121. .start = 0x20300000,
  122. .end = 0x20300000 + 0x100,
  123. .flags = IORESOURCE_MEM,
  124. }, {
  125. .start = IRQ_PF7,
  126. .end = IRQ_PF7,
  127. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  128. },
  129. };
  130. static struct platform_device net2272_bfin_device = {
  131. .name = "net2272",
  132. .id = -1,
  133. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  134. .resource = net2272_bfin_resources,
  135. };
  136. #endif
  137. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  138. /* all SPI peripherals info goes here */
  139. #if defined(CONFIG_MTD_M25P80) \
  140. || defined(CONFIG_MTD_M25P80_MODULE)
  141. static struct mtd_partition bfin_spi_flash_partitions[] = {
  142. {
  143. .name = "bootloader(spi)",
  144. .size = 0x00020000,
  145. .offset = 0,
  146. .mask_flags = MTD_CAP_ROM
  147. }, {
  148. .name = "linux kernel(spi)",
  149. .size = 0xe0000,
  150. .offset = 0x20000
  151. }, {
  152. .name = "file system(spi)",
  153. .size = 0x700000,
  154. .offset = 0x00100000,
  155. }
  156. };
  157. static struct flash_platform_data bfin_spi_flash_data = {
  158. .name = "m25p80",
  159. .parts = bfin_spi_flash_partitions,
  160. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  161. .type = "m25p64",
  162. };
  163. /* SPI flash chip (m25p64) */
  164. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  165. .enable_dma = 0, /* use dma transfer with this chip*/
  166. };
  167. #endif
  168. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  169. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  170. .enable_dma = 0,
  171. };
  172. #endif
  173. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  174. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  175. .model = 7877,
  176. .vref_delay_usecs = 50, /* internal, no capacitor */
  177. .x_plate_ohms = 419,
  178. .y_plate_ohms = 486,
  179. .pressure_max = 1000,
  180. .pressure_min = 0,
  181. .stopacq_polarity = 1,
  182. .first_conversion_delay = 3,
  183. .acquisition_time = 1,
  184. .averaging = 1,
  185. .pen_down_acc_interval = 1,
  186. };
  187. #endif
  188. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  189. #if defined(CONFIG_MTD_M25P80) \
  190. || defined(CONFIG_MTD_M25P80_MODULE)
  191. {
  192. /* the modalias must be the same as spi device driver name */
  193. .modalias = "m25p80", /* Name of spi_driver for this device */
  194. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  195. .bus_num = 0, /* Framework bus number */
  196. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  197. .platform_data = &bfin_spi_flash_data,
  198. .controller_data = &spi_flash_chip_info,
  199. .mode = SPI_MODE_3,
  200. },
  201. #endif
  202. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  203. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  204. {
  205. .modalias = "ad183x",
  206. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  207. .bus_num = 0,
  208. .chip_select = 4,
  209. },
  210. #endif
  211. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  212. {
  213. .modalias = "mmc_spi",
  214. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  215. .bus_num = 0,
  216. .chip_select = 5,
  217. .controller_data = &mmc_spi_chip_info,
  218. .mode = SPI_MODE_3,
  219. },
  220. #endif
  221. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  222. {
  223. .modalias = "ad7877",
  224. .platform_data = &bfin_ad7877_ts_info,
  225. .irq = IRQ_PF2,
  226. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  227. .bus_num = 0,
  228. .chip_select = 5,
  229. },
  230. #endif
  231. };
  232. /* SPI (0) */
  233. static struct resource bfin_spi0_resource[] = {
  234. [0] = {
  235. .start = SPI0_REGBASE,
  236. .end = SPI0_REGBASE + 0xFF,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [1] = {
  240. .start = CH_SPI,
  241. .end = CH_SPI,
  242. .flags = IORESOURCE_DMA,
  243. },
  244. [2] = {
  245. .start = IRQ_SPI,
  246. .end = IRQ_SPI,
  247. .flags = IORESOURCE_IRQ,
  248. },
  249. };
  250. /* SPI controller data */
  251. static struct bfin5xx_spi_master bfin_spi0_info = {
  252. .num_chipselect = 8,
  253. .enable_dma = 1, /* master has the ability to do dma transfer */
  254. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  255. };
  256. static struct platform_device bfin_spi0_device = {
  257. .name = "bfin-spi",
  258. .id = 0, /* Bus number */
  259. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  260. .resource = bfin_spi0_resource,
  261. .dev = {
  262. .platform_data = &bfin_spi0_info, /* Passed to driver */
  263. },
  264. };
  265. #endif /* spi master and devices */
  266. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  267. static struct platform_device bfin_fb_device = {
  268. .name = "bf537-lq035",
  269. };
  270. #endif
  271. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  272. #ifdef CONFIG_SERIAL_BFIN_UART0
  273. static struct resource bfin_uart0_resources[] = {
  274. {
  275. .start = UART0_THR,
  276. .end = UART0_GCTL+2,
  277. .flags = IORESOURCE_MEM,
  278. },
  279. {
  280. .start = IRQ_UART0_TX,
  281. .end = IRQ_UART0_TX,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. {
  285. .start = IRQ_UART0_RX,
  286. .end = IRQ_UART0_RX,
  287. .flags = IORESOURCE_IRQ,
  288. },
  289. {
  290. .start = IRQ_UART0_ERROR,
  291. .end = IRQ_UART0_ERROR,
  292. .flags = IORESOURCE_IRQ,
  293. },
  294. {
  295. .start = CH_UART0_TX,
  296. .end = CH_UART0_TX,
  297. .flags = IORESOURCE_DMA,
  298. },
  299. {
  300. .start = CH_UART0_RX,
  301. .end = CH_UART0_RX,
  302. .flags = IORESOURCE_DMA,
  303. },
  304. };
  305. static unsigned short bfin_uart0_peripherals[] = {
  306. P_UART0_TX, P_UART0_RX, 0
  307. };
  308. static struct platform_device bfin_uart0_device = {
  309. .name = "bfin-uart",
  310. .id = 0,
  311. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  312. .resource = bfin_uart0_resources,
  313. .dev = {
  314. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  315. },
  316. };
  317. #endif
  318. #ifdef CONFIG_SERIAL_BFIN_UART1
  319. static struct resource bfin_uart1_resources[] = {
  320. {
  321. .start = UART1_THR,
  322. .end = UART1_GCTL+2,
  323. .flags = IORESOURCE_MEM,
  324. },
  325. {
  326. .start = IRQ_UART1_TX,
  327. .end = IRQ_UART1_TX,
  328. .flags = IORESOURCE_IRQ,
  329. },
  330. {
  331. .start = IRQ_UART1_RX,
  332. .end = IRQ_UART1_RX,
  333. .flags = IORESOURCE_IRQ,
  334. },
  335. {
  336. .start = IRQ_UART1_ERROR,
  337. .end = IRQ_UART1_ERROR,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. {
  341. .start = CH_UART1_TX,
  342. .end = CH_UART1_TX,
  343. .flags = IORESOURCE_DMA,
  344. },
  345. {
  346. .start = CH_UART1_RX,
  347. .end = CH_UART1_RX,
  348. .flags = IORESOURCE_DMA,
  349. },
  350. };
  351. static unsigned short bfin_uart1_peripherals[] = {
  352. P_UART1_TX, P_UART1_RX, 0
  353. };
  354. static struct platform_device bfin_uart1_device = {
  355. .name = "bfin-uart",
  356. .id = 1,
  357. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  358. .resource = bfin_uart1_resources,
  359. .dev = {
  360. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  361. },
  362. };
  363. #endif
  364. #endif
  365. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  366. #ifdef CONFIG_BFIN_SIR0
  367. static struct resource bfin_sir0_resources[] = {
  368. {
  369. .start = 0xFFC00400,
  370. .end = 0xFFC004FF,
  371. .flags = IORESOURCE_MEM,
  372. },
  373. {
  374. .start = IRQ_UART0_RX,
  375. .end = IRQ_UART0_RX+1,
  376. .flags = IORESOURCE_IRQ,
  377. },
  378. {
  379. .start = CH_UART0_RX,
  380. .end = CH_UART0_RX+1,
  381. .flags = IORESOURCE_DMA,
  382. },
  383. };
  384. static struct platform_device bfin_sir0_device = {
  385. .name = "bfin_sir",
  386. .id = 0,
  387. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  388. .resource = bfin_sir0_resources,
  389. };
  390. #endif
  391. #ifdef CONFIG_BFIN_SIR1
  392. static struct resource bfin_sir1_resources[] = {
  393. {
  394. .start = 0xFFC02000,
  395. .end = 0xFFC020FF,
  396. .flags = IORESOURCE_MEM,
  397. },
  398. {
  399. .start = IRQ_UART1_RX,
  400. .end = IRQ_UART1_RX+1,
  401. .flags = IORESOURCE_IRQ,
  402. },
  403. {
  404. .start = CH_UART1_RX,
  405. .end = CH_UART1_RX+1,
  406. .flags = IORESOURCE_DMA,
  407. },
  408. };
  409. static struct platform_device bfin_sir1_device = {
  410. .name = "bfin_sir",
  411. .id = 1,
  412. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  413. .resource = bfin_sir1_resources,
  414. };
  415. #endif
  416. #endif
  417. static struct platform_device *stamp_devices[] __initdata = {
  418. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  419. &bfin_pcmcia_cf_device,
  420. #endif
  421. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  422. &rtc_device,
  423. #endif
  424. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  425. &smc91x_device,
  426. #endif
  427. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  428. &bfin_mii_bus,
  429. &bfin_mac_device,
  430. #endif
  431. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  432. &net2272_bfin_device,
  433. #endif
  434. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  435. &bfin_spi0_device,
  436. #endif
  437. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  438. &bfin_fb_device,
  439. #endif
  440. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  441. #ifdef CONFIG_SERIAL_BFIN_UART0
  442. &bfin_uart0_device,
  443. #endif
  444. #ifdef CONFIG_SERIAL_BFIN_UART1
  445. &bfin_uart1_device,
  446. #endif
  447. #endif
  448. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  449. #ifdef CONFIG_BFIN_SIR0
  450. &bfin_sir0_device,
  451. #endif
  452. #ifdef CONFIG_BFIN_SIR1
  453. &bfin_sir1_device,
  454. #endif
  455. #endif
  456. };
  457. static int __init pnav_init(void)
  458. {
  459. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  460. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  461. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  462. spi_register_board_info(bfin_spi_board_info,
  463. ARRAY_SIZE(bfin_spi_board_info));
  464. #endif
  465. return 0;
  466. }
  467. arch_initcall(pnav_init);
  468. static struct platform_device *stamp_early_devices[] __initdata = {
  469. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  470. #ifdef CONFIG_SERIAL_BFIN_UART0
  471. &bfin_uart0_device,
  472. #endif
  473. #ifdef CONFIG_SERIAL_BFIN_UART1
  474. &bfin_uart1_device,
  475. #endif
  476. #endif
  477. };
  478. void __init native_machine_early_platform_add_devices(void)
  479. {
  480. printk(KERN_INFO "register early platform devices\n");
  481. early_platform_add_devices(stamp_early_devices,
  482. ARRAY_SIZE(stamp_early_devices));
  483. }
  484. int bfin_get_ether_addr(char *addr)
  485. {
  486. return 1;
  487. }
  488. EXPORT_SYMBOL(bfin_get_ether_addr);