icp-native.c 6.6 KB

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  1. /*
  2. * Copyright 2011 IBM Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. *
  9. */
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/irq.h>
  13. #include <linux/smp.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/init.h>
  16. #include <linux/cpu.h>
  17. #include <linux/of.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/module.h>
  20. #include <asm/prom.h>
  21. #include <asm/io.h>
  22. #include <asm/smp.h>
  23. #include <asm/irq.h>
  24. #include <asm/errno.h>
  25. #include <asm/xics.h>
  26. #include <asm/kvm_ppc.h>
  27. struct icp_ipl {
  28. union {
  29. u32 word;
  30. u8 bytes[4];
  31. } xirr_poll;
  32. union {
  33. u32 word;
  34. u8 bytes[4];
  35. } xirr;
  36. u32 dummy;
  37. union {
  38. u32 word;
  39. u8 bytes[4];
  40. } qirr;
  41. u32 link_a;
  42. u32 link_b;
  43. u32 link_c;
  44. };
  45. static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
  46. static inline unsigned int icp_native_get_xirr(void)
  47. {
  48. int cpu = smp_processor_id();
  49. return in_be32(&icp_native_regs[cpu]->xirr.word);
  50. }
  51. static inline void icp_native_set_xirr(unsigned int value)
  52. {
  53. int cpu = smp_processor_id();
  54. out_be32(&icp_native_regs[cpu]->xirr.word, value);
  55. }
  56. static inline void icp_native_set_cppr(u8 value)
  57. {
  58. int cpu = smp_processor_id();
  59. out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
  60. }
  61. static inline void icp_native_set_qirr(int n_cpu, u8 value)
  62. {
  63. out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
  64. }
  65. static void icp_native_set_cpu_priority(unsigned char cppr)
  66. {
  67. xics_set_base_cppr(cppr);
  68. icp_native_set_cppr(cppr);
  69. iosync();
  70. }
  71. static void icp_native_eoi(struct irq_data *d)
  72. {
  73. unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
  74. iosync();
  75. icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
  76. }
  77. static void icp_native_teardown_cpu(void)
  78. {
  79. int cpu = smp_processor_id();
  80. /* Clear any pending IPI */
  81. icp_native_set_qirr(cpu, 0xff);
  82. }
  83. static void icp_native_flush_ipi(void)
  84. {
  85. /* We take the ipi irq but and never return so we
  86. * need to EOI the IPI, but want to leave our priority 0
  87. *
  88. * should we check all the other interrupts too?
  89. * should we be flagging idle loop instead?
  90. * or creating some task to be scheduled?
  91. */
  92. icp_native_set_xirr((0x00 << 24) | XICS_IPI);
  93. }
  94. static unsigned int icp_native_get_irq(void)
  95. {
  96. unsigned int xirr = icp_native_get_xirr();
  97. unsigned int vec = xirr & 0x00ffffff;
  98. unsigned int irq;
  99. if (vec == XICS_IRQ_SPURIOUS)
  100. return NO_IRQ;
  101. irq = irq_radix_revmap_lookup(xics_host, vec);
  102. if (likely(irq != NO_IRQ)) {
  103. xics_push_cppr(vec);
  104. return irq;
  105. }
  106. /* We don't have a linux mapping, so have rtas mask it. */
  107. xics_mask_unknown_vec(vec);
  108. /* We might learn about it later, so EOI it */
  109. icp_native_set_xirr(xirr);
  110. return NO_IRQ;
  111. }
  112. #ifdef CONFIG_SMP
  113. static void icp_native_cause_ipi(int cpu, unsigned long data)
  114. {
  115. icp_native_set_qirr(cpu, IPI_PRIORITY);
  116. }
  117. void xics_wake_cpu(int cpu)
  118. {
  119. icp_native_set_qirr(cpu, IPI_PRIORITY);
  120. }
  121. EXPORT_SYMBOL_GPL(xics_wake_cpu);
  122. static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
  123. {
  124. int cpu = smp_processor_id();
  125. icp_native_set_qirr(cpu, 0xff);
  126. return smp_ipi_demux();
  127. }
  128. #endif /* CONFIG_SMP */
  129. static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
  130. unsigned long size)
  131. {
  132. char *rname;
  133. int i, cpu = -1;
  134. /* This may look gross but it's good enough for now, we don't quite
  135. * have a hard -> linux processor id matching.
  136. */
  137. for_each_possible_cpu(i) {
  138. if (!cpu_present(i))
  139. continue;
  140. if (hw_id == get_hard_smp_processor_id(i)) {
  141. cpu = i;
  142. break;
  143. }
  144. }
  145. /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
  146. * with way more entries in there than you have CPUs
  147. */
  148. if (cpu == -1)
  149. return 0;
  150. rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
  151. cpu, hw_id);
  152. if (!request_mem_region(addr, size, rname)) {
  153. pr_warning("icp_native: Could not reserve ICP MMIO"
  154. " for CPU %d, interrupt server #0x%x\n",
  155. cpu, hw_id);
  156. return -EBUSY;
  157. }
  158. icp_native_regs[cpu] = ioremap(addr, size);
  159. kvmppc_set_xics_phys(cpu, addr);
  160. if (!icp_native_regs[cpu]) {
  161. pr_warning("icp_native: Failed ioremap for CPU %d, "
  162. "interrupt server #0x%x, addr %#lx\n",
  163. cpu, hw_id, addr);
  164. release_mem_region(addr, size);
  165. return -ENOMEM;
  166. }
  167. return 0;
  168. }
  169. static int __init icp_native_init_one_node(struct device_node *np,
  170. unsigned int *indx)
  171. {
  172. unsigned int ilen;
  173. const u32 *ireg;
  174. int i;
  175. int reg_tuple_size;
  176. int num_servers = 0;
  177. /* This code does the theorically broken assumption that the interrupt
  178. * server numbers are the same as the hard CPU numbers.
  179. * This happens to be the case so far but we are playing with fire...
  180. * should be fixed one of these days. -BenH.
  181. */
  182. ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
  183. /* Do that ever happen ? we'll know soon enough... but even good'old
  184. * f80 does have that property ..
  185. */
  186. WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
  187. if (ireg) {
  188. *indx = of_read_number(ireg, 1);
  189. if (ilen >= 2*sizeof(u32))
  190. num_servers = of_read_number(ireg + 1, 1);
  191. }
  192. ireg = of_get_property(np, "reg", &ilen);
  193. if (!ireg) {
  194. pr_err("icp_native: Can't find interrupt reg property");
  195. return -1;
  196. }
  197. reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
  198. if (((ilen % reg_tuple_size) != 0)
  199. || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
  200. pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
  201. ilen / reg_tuple_size, num_servers);
  202. return -1;
  203. }
  204. for (i = 0; i < (ilen / reg_tuple_size); i++) {
  205. struct resource r;
  206. int err;
  207. err = of_address_to_resource(np, i, &r);
  208. if (err) {
  209. pr_err("icp_native: Could not translate ICP MMIO"
  210. " for interrupt server 0x%x (%d)\n", *indx, err);
  211. return -1;
  212. }
  213. if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r)))
  214. return -1;
  215. (*indx)++;
  216. }
  217. return 0;
  218. }
  219. static const struct icp_ops icp_native_ops = {
  220. .get_irq = icp_native_get_irq,
  221. .eoi = icp_native_eoi,
  222. .set_priority = icp_native_set_cpu_priority,
  223. .teardown_cpu = icp_native_teardown_cpu,
  224. .flush_ipi = icp_native_flush_ipi,
  225. #ifdef CONFIG_SMP
  226. .ipi_action = icp_native_ipi_action,
  227. .cause_ipi = icp_native_cause_ipi,
  228. #endif
  229. };
  230. int __init icp_native_init(void)
  231. {
  232. struct device_node *np;
  233. u32 indx = 0;
  234. int found = 0;
  235. for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
  236. if (icp_native_init_one_node(np, &indx) == 0)
  237. found = 1;
  238. if (!found) {
  239. for_each_node_by_type(np,
  240. "PowerPC-External-Interrupt-Presentation") {
  241. if (icp_native_init_one_node(np, &indx) == 0)
  242. found = 1;
  243. }
  244. }
  245. if (found == 0)
  246. return -ENODEV;
  247. icp_ops = &icp_native_ops;
  248. return 0;
  249. }