rt2x00queue.c 32 KB

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  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the
  16. Free Software Foundation, Inc.,
  17. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. /*
  20. Module: rt2x00lib
  21. Abstract: rt2x00 queue specific routines.
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/dma-mapping.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00lib.h"
  29. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
  30. {
  31. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  32. struct sk_buff *skb;
  33. struct skb_frame_desc *skbdesc;
  34. unsigned int frame_size;
  35. unsigned int head_size = 0;
  36. unsigned int tail_size = 0;
  37. /*
  38. * The frame size includes descriptor size, because the
  39. * hardware directly receive the frame into the skbuffer.
  40. */
  41. frame_size = entry->queue->data_size + entry->queue->desc_size;
  42. /*
  43. * The payload should be aligned to a 4-byte boundary,
  44. * this means we need at least 3 bytes for moving the frame
  45. * into the correct offset.
  46. */
  47. head_size = 4;
  48. /*
  49. * For IV/EIV/ICV assembly we must make sure there is
  50. * at least 8 bytes bytes available in headroom for IV/EIV
  51. * and 8 bytes for ICV data as tailroon.
  52. */
  53. if (test_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags)) {
  54. head_size += 8;
  55. tail_size += 8;
  56. }
  57. /*
  58. * Allocate skbuffer.
  59. */
  60. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  61. if (!skb)
  62. return NULL;
  63. /*
  64. * Make sure we not have a frame with the requested bytes
  65. * available in the head and tail.
  66. */
  67. skb_reserve(skb, head_size);
  68. skb_put(skb, frame_size);
  69. /*
  70. * Populate skbdesc.
  71. */
  72. skbdesc = get_skb_frame_desc(skb);
  73. memset(skbdesc, 0, sizeof(*skbdesc));
  74. skbdesc->entry = entry;
  75. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
  76. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  77. skb->data,
  78. skb->len,
  79. DMA_FROM_DEVICE);
  80. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  81. }
  82. return skb;
  83. }
  84. void rt2x00queue_map_txskb(struct queue_entry *entry)
  85. {
  86. struct device *dev = entry->queue->rt2x00dev->dev;
  87. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  88. skbdesc->skb_dma =
  89. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  90. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  91. }
  92. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  93. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  94. {
  95. struct device *dev = entry->queue->rt2x00dev->dev;
  96. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  97. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  98. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  99. DMA_FROM_DEVICE);
  100. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  101. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  102. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  103. DMA_TO_DEVICE);
  104. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  108. void rt2x00queue_free_skb(struct queue_entry *entry)
  109. {
  110. if (!entry->skb)
  111. return;
  112. rt2x00queue_unmap_skb(entry);
  113. dev_kfree_skb_any(entry->skb);
  114. entry->skb = NULL;
  115. }
  116. void rt2x00queue_align_frame(struct sk_buff *skb)
  117. {
  118. unsigned int frame_length = skb->len;
  119. unsigned int align = ALIGN_SIZE(skb, 0);
  120. if (!align)
  121. return;
  122. skb_push(skb, align);
  123. memmove(skb->data, skb->data + align, frame_length);
  124. skb_trim(skb, frame_length);
  125. }
  126. /*
  127. * H/W needs L2 padding between the header and the paylod if header size
  128. * is not 4 bytes aligned.
  129. */
  130. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  131. {
  132. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  133. if (!l2pad)
  134. return;
  135. skb_push(skb, l2pad);
  136. memmove(skb->data, skb->data + l2pad, hdr_len);
  137. }
  138. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  139. {
  140. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  141. if (!l2pad)
  142. return;
  143. memmove(skb->data + l2pad, skb->data, hdr_len);
  144. skb_pull(skb, l2pad);
  145. }
  146. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  147. struct sk_buff *skb,
  148. struct txentry_desc *txdesc)
  149. {
  150. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  151. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  152. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  153. u16 seqno;
  154. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  155. return;
  156. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  157. if (!test_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags))
  158. return;
  159. /*
  160. * The hardware is not able to insert a sequence number. Assign a
  161. * software generated one here.
  162. *
  163. * This is wrong because beacons are not getting sequence
  164. * numbers assigned properly.
  165. *
  166. * A secondary problem exists for drivers that cannot toggle
  167. * sequence counting per-frame, since those will override the
  168. * sequence counter given by mac80211.
  169. */
  170. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  171. seqno = atomic_add_return(0x10, &intf->seqno);
  172. else
  173. seqno = atomic_read(&intf->seqno);
  174. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  175. hdr->seq_ctrl |= cpu_to_le16(seqno);
  176. }
  177. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  178. struct sk_buff *skb,
  179. struct txentry_desc *txdesc,
  180. const struct rt2x00_rate *hwrate)
  181. {
  182. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  183. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  184. unsigned int data_length;
  185. unsigned int duration;
  186. unsigned int residual;
  187. /*
  188. * Determine with what IFS priority this frame should be send.
  189. * Set ifs to IFS_SIFS when the this is not the first fragment,
  190. * or this fragment came after RTS/CTS.
  191. */
  192. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  193. txdesc->u.plcp.ifs = IFS_BACKOFF;
  194. else
  195. txdesc->u.plcp.ifs = IFS_SIFS;
  196. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  197. data_length = skb->len + 4;
  198. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  199. /*
  200. * PLCP setup
  201. * Length calculation depends on OFDM/CCK rate.
  202. */
  203. txdesc->u.plcp.signal = hwrate->plcp;
  204. txdesc->u.plcp.service = 0x04;
  205. if (hwrate->flags & DEV_RATE_OFDM) {
  206. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  207. txdesc->u.plcp.length_low = data_length & 0x3f;
  208. } else {
  209. /*
  210. * Convert length to microseconds.
  211. */
  212. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  213. duration = GET_DURATION(data_length, hwrate->bitrate);
  214. if (residual != 0) {
  215. duration++;
  216. /*
  217. * Check if we need to set the Length Extension
  218. */
  219. if (hwrate->bitrate == 110 && residual <= 30)
  220. txdesc->u.plcp.service |= 0x80;
  221. }
  222. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  223. txdesc->u.plcp.length_low = duration & 0xff;
  224. /*
  225. * When preamble is enabled we should set the
  226. * preamble bit for the signal.
  227. */
  228. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  229. txdesc->u.plcp.signal |= 0x08;
  230. }
  231. }
  232. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  233. struct sk_buff *skb,
  234. struct txentry_desc *txdesc,
  235. const struct rt2x00_rate *hwrate)
  236. {
  237. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  238. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  239. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  240. struct rt2x00_sta *sta_priv = NULL;
  241. if (tx_info->control.sta) {
  242. txdesc->u.ht.mpdu_density =
  243. tx_info->control.sta->ht_cap.ampdu_density;
  244. sta_priv = sta_to_rt2x00_sta(tx_info->control.sta);
  245. txdesc->u.ht.wcid = sta_priv->wcid;
  246. }
  247. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  248. /*
  249. * Only one STBC stream is supported for now.
  250. */
  251. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  252. txdesc->u.ht.stbc = 1;
  253. /*
  254. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  255. * mcs rate to be used
  256. */
  257. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  258. txdesc->u.ht.mcs = txrate->idx;
  259. /*
  260. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  261. * when using more then one tx stream (>MCS7).
  262. */
  263. if (tx_info->control.sta && txdesc->u.ht.mcs > 7 &&
  264. ((tx_info->control.sta->ht_cap.cap &
  265. IEEE80211_HT_CAP_SM_PS) >>
  266. IEEE80211_HT_CAP_SM_PS_SHIFT) ==
  267. WLAN_HT_CAP_SM_PS_DYNAMIC)
  268. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  269. } else {
  270. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  271. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  272. txdesc->u.ht.mcs |= 0x08;
  273. }
  274. /*
  275. * This frame is eligible for an AMPDU, however, don't aggregate
  276. * frames that are intended to probe a specific tx rate.
  277. */
  278. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  279. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  280. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  281. /*
  282. * Set 40Mhz mode if necessary (for legacy rates this will
  283. * duplicate the frame to both channels).
  284. */
  285. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  286. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  287. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  288. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  289. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  290. /*
  291. * Determine IFS values
  292. * - Use TXOP_BACKOFF for management frames except beacons
  293. * - Use TXOP_SIFS for fragment bursts
  294. * - Use TXOP_HTTXOP for everything else
  295. *
  296. * Note: rt2800 devices won't use CTS protection (if used)
  297. * for frames not transmitted with TXOP_HTTXOP
  298. */
  299. if (ieee80211_is_mgmt(hdr->frame_control) &&
  300. !ieee80211_is_beacon(hdr->frame_control))
  301. txdesc->u.ht.txop = TXOP_BACKOFF;
  302. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  303. txdesc->u.ht.txop = TXOP_SIFS;
  304. else
  305. txdesc->u.ht.txop = TXOP_HTTXOP;
  306. }
  307. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  308. struct sk_buff *skb,
  309. struct txentry_desc *txdesc)
  310. {
  311. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  312. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  313. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  314. struct ieee80211_rate *rate;
  315. const struct rt2x00_rate *hwrate = NULL;
  316. memset(txdesc, 0, sizeof(*txdesc));
  317. /*
  318. * Header and frame information.
  319. */
  320. txdesc->length = skb->len;
  321. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  322. /*
  323. * Check whether this frame is to be acked.
  324. */
  325. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  326. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  327. /*
  328. * Check if this is a RTS/CTS frame
  329. */
  330. if (ieee80211_is_rts(hdr->frame_control) ||
  331. ieee80211_is_cts(hdr->frame_control)) {
  332. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  333. if (ieee80211_is_rts(hdr->frame_control))
  334. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  335. else
  336. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  337. if (tx_info->control.rts_cts_rate_idx >= 0)
  338. rate =
  339. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  340. }
  341. /*
  342. * Determine retry information.
  343. */
  344. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  345. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  346. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  347. /*
  348. * Check if more fragments are pending
  349. */
  350. if (ieee80211_has_morefrags(hdr->frame_control)) {
  351. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  352. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  353. }
  354. /*
  355. * Check if more frames (!= fragments) are pending
  356. */
  357. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  358. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  359. /*
  360. * Beacons and probe responses require the tsf timestamp
  361. * to be inserted into the frame.
  362. */
  363. if (ieee80211_is_beacon(hdr->frame_control) ||
  364. ieee80211_is_probe_resp(hdr->frame_control))
  365. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  366. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  367. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  368. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  369. /*
  370. * Determine rate modulation.
  371. */
  372. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  373. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  374. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  375. txdesc->rate_mode = RATE_MODE_HT_MIX;
  376. else {
  377. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  378. hwrate = rt2x00_get_rate(rate->hw_value);
  379. if (hwrate->flags & DEV_RATE_OFDM)
  380. txdesc->rate_mode = RATE_MODE_OFDM;
  381. else
  382. txdesc->rate_mode = RATE_MODE_CCK;
  383. }
  384. /*
  385. * Apply TX descriptor handling by components
  386. */
  387. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  388. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  389. if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
  390. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  391. hwrate);
  392. else
  393. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  394. hwrate);
  395. }
  396. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  397. struct txentry_desc *txdesc)
  398. {
  399. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  400. /*
  401. * This should not happen, we already checked the entry
  402. * was ours. When the hardware disagrees there has been
  403. * a queue corruption!
  404. */
  405. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  406. rt2x00dev->ops->lib->get_entry_state(entry))) {
  407. ERROR(rt2x00dev,
  408. "Corrupt queue %d, accessing entry which is not ours.\n"
  409. "Please file bug report to %s.\n",
  410. entry->queue->qid, DRV_PROJECT);
  411. return -EINVAL;
  412. }
  413. /*
  414. * Add the requested extra tx headroom in front of the skb.
  415. */
  416. skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  417. memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
  418. /*
  419. * Call the driver's write_tx_data function, if it exists.
  420. */
  421. if (rt2x00dev->ops->lib->write_tx_data)
  422. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  423. /*
  424. * Map the skb to DMA.
  425. */
  426. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags))
  427. rt2x00queue_map_txskb(entry);
  428. return 0;
  429. }
  430. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  431. struct txentry_desc *txdesc)
  432. {
  433. struct data_queue *queue = entry->queue;
  434. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  435. /*
  436. * All processing on the frame has been completed, this means
  437. * it is now ready to be dumped to userspace through debugfs.
  438. */
  439. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  440. }
  441. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  442. struct txentry_desc *txdesc)
  443. {
  444. /*
  445. * Check if we need to kick the queue, there are however a few rules
  446. * 1) Don't kick unless this is the last in frame in a burst.
  447. * When the burst flag is set, this frame is always followed
  448. * by another frame which in some way are related to eachother.
  449. * This is true for fragments, RTS or CTS-to-self frames.
  450. * 2) Rule 1 can be broken when the available entries
  451. * in the queue are less then a certain threshold.
  452. */
  453. if (rt2x00queue_threshold(queue) ||
  454. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  455. queue->rt2x00dev->ops->lib->kick_queue(queue);
  456. }
  457. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  458. bool local)
  459. {
  460. struct ieee80211_tx_info *tx_info;
  461. struct queue_entry *entry;
  462. struct txentry_desc txdesc;
  463. struct skb_frame_desc *skbdesc;
  464. u8 rate_idx, rate_flags;
  465. int ret = 0;
  466. /*
  467. * Copy all TX descriptor information into txdesc,
  468. * after that we are free to use the skb->cb array
  469. * for our information.
  470. */
  471. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc);
  472. /*
  473. * All information is retrieved from the skb->cb array,
  474. * now we should claim ownership of the driver part of that
  475. * array, preserving the bitrate index and flags.
  476. */
  477. tx_info = IEEE80211_SKB_CB(skb);
  478. rate_idx = tx_info->control.rates[0].idx;
  479. rate_flags = tx_info->control.rates[0].flags;
  480. skbdesc = get_skb_frame_desc(skb);
  481. memset(skbdesc, 0, sizeof(*skbdesc));
  482. skbdesc->tx_rate_idx = rate_idx;
  483. skbdesc->tx_rate_flags = rate_flags;
  484. if (local)
  485. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  486. /*
  487. * When hardware encryption is supported, and this frame
  488. * is to be encrypted, we should strip the IV/EIV data from
  489. * the frame so we can provide it to the driver separately.
  490. */
  491. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  492. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  493. if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
  494. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  495. else
  496. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  497. }
  498. /*
  499. * When DMA allocation is required we should guarantee to the
  500. * driver that the DMA is aligned to a 4-byte boundary.
  501. * However some drivers require L2 padding to pad the payload
  502. * rather then the header. This could be a requirement for
  503. * PCI and USB devices, while header alignment only is valid
  504. * for PCI devices.
  505. */
  506. if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
  507. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  508. else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
  509. rt2x00queue_align_frame(skb);
  510. /*
  511. * That function must be called with bh disabled.
  512. */
  513. spin_lock(&queue->tx_lock);
  514. if (unlikely(rt2x00queue_full(queue))) {
  515. ERROR(queue->rt2x00dev,
  516. "Dropping frame due to full tx queue %d.\n", queue->qid);
  517. ret = -ENOBUFS;
  518. goto out;
  519. }
  520. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  521. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  522. &entry->flags))) {
  523. ERROR(queue->rt2x00dev,
  524. "Arrived at non-free entry in the non-full queue %d.\n"
  525. "Please file bug report to %s.\n",
  526. queue->qid, DRV_PROJECT);
  527. ret = -EINVAL;
  528. goto out;
  529. }
  530. skbdesc->entry = entry;
  531. entry->skb = skb;
  532. /*
  533. * It could be possible that the queue was corrupted and this
  534. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  535. * this frame will simply be dropped.
  536. */
  537. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  538. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  539. entry->skb = NULL;
  540. ret = -EIO;
  541. goto out;
  542. }
  543. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  544. rt2x00queue_index_inc(entry, Q_INDEX);
  545. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  546. rt2x00queue_kick_tx_queue(queue, &txdesc);
  547. out:
  548. spin_unlock(&queue->tx_lock);
  549. return ret;
  550. }
  551. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  552. struct ieee80211_vif *vif)
  553. {
  554. struct rt2x00_intf *intf = vif_to_intf(vif);
  555. if (unlikely(!intf->beacon))
  556. return -ENOBUFS;
  557. mutex_lock(&intf->beacon_skb_mutex);
  558. /*
  559. * Clean up the beacon skb.
  560. */
  561. rt2x00queue_free_skb(intf->beacon);
  562. /*
  563. * Clear beacon (single bssid devices don't need to clear the beacon
  564. * since the beacon queue will get stopped anyway).
  565. */
  566. if (rt2x00dev->ops->lib->clear_beacon)
  567. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  568. mutex_unlock(&intf->beacon_skb_mutex);
  569. return 0;
  570. }
  571. int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
  572. struct ieee80211_vif *vif)
  573. {
  574. struct rt2x00_intf *intf = vif_to_intf(vif);
  575. struct skb_frame_desc *skbdesc;
  576. struct txentry_desc txdesc;
  577. if (unlikely(!intf->beacon))
  578. return -ENOBUFS;
  579. /*
  580. * Clean up the beacon skb.
  581. */
  582. rt2x00queue_free_skb(intf->beacon);
  583. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  584. if (!intf->beacon->skb)
  585. return -ENOMEM;
  586. /*
  587. * Copy all TX descriptor information into txdesc,
  588. * after that we are free to use the skb->cb array
  589. * for our information.
  590. */
  591. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc);
  592. /*
  593. * Fill in skb descriptor
  594. */
  595. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  596. memset(skbdesc, 0, sizeof(*skbdesc));
  597. skbdesc->entry = intf->beacon;
  598. /*
  599. * Send beacon to hardware.
  600. */
  601. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  602. return 0;
  603. }
  604. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  605. struct ieee80211_vif *vif)
  606. {
  607. struct rt2x00_intf *intf = vif_to_intf(vif);
  608. int ret;
  609. mutex_lock(&intf->beacon_skb_mutex);
  610. ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
  611. mutex_unlock(&intf->beacon_skb_mutex);
  612. return ret;
  613. }
  614. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  615. enum queue_index start,
  616. enum queue_index end,
  617. void *data,
  618. bool (*fn)(struct queue_entry *entry,
  619. void *data))
  620. {
  621. unsigned long irqflags;
  622. unsigned int index_start;
  623. unsigned int index_end;
  624. unsigned int i;
  625. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  626. ERROR(queue->rt2x00dev,
  627. "Entry requested from invalid index range (%d - %d)\n",
  628. start, end);
  629. return true;
  630. }
  631. /*
  632. * Only protect the range we are going to loop over,
  633. * if during our loop a extra entry is set to pending
  634. * it should not be kicked during this run, since it
  635. * is part of another TX operation.
  636. */
  637. spin_lock_irqsave(&queue->index_lock, irqflags);
  638. index_start = queue->index[start];
  639. index_end = queue->index[end];
  640. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  641. /*
  642. * Start from the TX done pointer, this guarantees that we will
  643. * send out all frames in the correct order.
  644. */
  645. if (index_start < index_end) {
  646. for (i = index_start; i < index_end; i++) {
  647. if (fn(&queue->entries[i], data))
  648. return true;
  649. }
  650. } else {
  651. for (i = index_start; i < queue->limit; i++) {
  652. if (fn(&queue->entries[i], data))
  653. return true;
  654. }
  655. for (i = 0; i < index_end; i++) {
  656. if (fn(&queue->entries[i], data))
  657. return true;
  658. }
  659. }
  660. return false;
  661. }
  662. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  663. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  664. enum queue_index index)
  665. {
  666. struct queue_entry *entry;
  667. unsigned long irqflags;
  668. if (unlikely(index >= Q_INDEX_MAX)) {
  669. ERROR(queue->rt2x00dev,
  670. "Entry requested from invalid index type (%d)\n", index);
  671. return NULL;
  672. }
  673. spin_lock_irqsave(&queue->index_lock, irqflags);
  674. entry = &queue->entries[queue->index[index]];
  675. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  676. return entry;
  677. }
  678. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  679. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  680. {
  681. struct data_queue *queue = entry->queue;
  682. unsigned long irqflags;
  683. if (unlikely(index >= Q_INDEX_MAX)) {
  684. ERROR(queue->rt2x00dev,
  685. "Index change on invalid index type (%d)\n", index);
  686. return;
  687. }
  688. spin_lock_irqsave(&queue->index_lock, irqflags);
  689. queue->index[index]++;
  690. if (queue->index[index] >= queue->limit)
  691. queue->index[index] = 0;
  692. entry->last_action = jiffies;
  693. if (index == Q_INDEX) {
  694. queue->length++;
  695. } else if (index == Q_INDEX_DONE) {
  696. queue->length--;
  697. queue->count++;
  698. }
  699. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  700. }
  701. void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  702. {
  703. switch (queue->qid) {
  704. case QID_AC_VO:
  705. case QID_AC_VI:
  706. case QID_AC_BE:
  707. case QID_AC_BK:
  708. /*
  709. * For TX queues, we have to disable the queue
  710. * inside mac80211.
  711. */
  712. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  713. break;
  714. default:
  715. break;
  716. }
  717. }
  718. void rt2x00queue_pause_queue(struct data_queue *queue)
  719. {
  720. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  721. !test_bit(QUEUE_STARTED, &queue->flags) ||
  722. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  723. return;
  724. rt2x00queue_pause_queue_nocheck(queue);
  725. }
  726. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  727. void rt2x00queue_unpause_queue(struct data_queue *queue)
  728. {
  729. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  730. !test_bit(QUEUE_STARTED, &queue->flags) ||
  731. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  732. return;
  733. switch (queue->qid) {
  734. case QID_AC_VO:
  735. case QID_AC_VI:
  736. case QID_AC_BE:
  737. case QID_AC_BK:
  738. /*
  739. * For TX queues, we have to enable the queue
  740. * inside mac80211.
  741. */
  742. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  743. break;
  744. case QID_RX:
  745. /*
  746. * For RX we need to kick the queue now in order to
  747. * receive frames.
  748. */
  749. queue->rt2x00dev->ops->lib->kick_queue(queue);
  750. default:
  751. break;
  752. }
  753. }
  754. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  755. void rt2x00queue_start_queue(struct data_queue *queue)
  756. {
  757. mutex_lock(&queue->status_lock);
  758. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  759. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  760. mutex_unlock(&queue->status_lock);
  761. return;
  762. }
  763. set_bit(QUEUE_PAUSED, &queue->flags);
  764. queue->rt2x00dev->ops->lib->start_queue(queue);
  765. rt2x00queue_unpause_queue(queue);
  766. mutex_unlock(&queue->status_lock);
  767. }
  768. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  769. void rt2x00queue_stop_queue(struct data_queue *queue)
  770. {
  771. mutex_lock(&queue->status_lock);
  772. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  773. mutex_unlock(&queue->status_lock);
  774. return;
  775. }
  776. rt2x00queue_pause_queue_nocheck(queue);
  777. queue->rt2x00dev->ops->lib->stop_queue(queue);
  778. mutex_unlock(&queue->status_lock);
  779. }
  780. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  781. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  782. {
  783. bool started;
  784. bool tx_queue =
  785. (queue->qid == QID_AC_VO) ||
  786. (queue->qid == QID_AC_VI) ||
  787. (queue->qid == QID_AC_BE) ||
  788. (queue->qid == QID_AC_BK);
  789. mutex_lock(&queue->status_lock);
  790. /*
  791. * If the queue has been started, we must stop it temporarily
  792. * to prevent any new frames to be queued on the device. If
  793. * we are not dropping the pending frames, the queue must
  794. * only be stopped in the software and not the hardware,
  795. * otherwise the queue will never become empty on its own.
  796. */
  797. started = test_bit(QUEUE_STARTED, &queue->flags);
  798. if (started) {
  799. /*
  800. * Pause the queue
  801. */
  802. rt2x00queue_pause_queue(queue);
  803. /*
  804. * If we are not supposed to drop any pending
  805. * frames, this means we must force a start (=kick)
  806. * to the queue to make sure the hardware will
  807. * start transmitting.
  808. */
  809. if (!drop && tx_queue)
  810. queue->rt2x00dev->ops->lib->kick_queue(queue);
  811. }
  812. /*
  813. * Check if driver supports flushing, if that is the case we can
  814. * defer the flushing to the driver. Otherwise we must use the
  815. * alternative which just waits for the queue to become empty.
  816. */
  817. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  818. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  819. /*
  820. * The queue flush has failed...
  821. */
  822. if (unlikely(!rt2x00queue_empty(queue)))
  823. WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
  824. /*
  825. * Restore the queue to the previous status
  826. */
  827. if (started)
  828. rt2x00queue_unpause_queue(queue);
  829. mutex_unlock(&queue->status_lock);
  830. }
  831. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  832. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  833. {
  834. struct data_queue *queue;
  835. /*
  836. * rt2x00queue_start_queue will call ieee80211_wake_queue
  837. * for each queue after is has been properly initialized.
  838. */
  839. tx_queue_for_each(rt2x00dev, queue)
  840. rt2x00queue_start_queue(queue);
  841. rt2x00queue_start_queue(rt2x00dev->rx);
  842. }
  843. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  844. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  845. {
  846. struct data_queue *queue;
  847. /*
  848. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  849. * as well, but we are completely shutting doing everything
  850. * now, so it is much safer to stop all TX queues at once,
  851. * and use rt2x00queue_stop_queue for cleaning up.
  852. */
  853. ieee80211_stop_queues(rt2x00dev->hw);
  854. tx_queue_for_each(rt2x00dev, queue)
  855. rt2x00queue_stop_queue(queue);
  856. rt2x00queue_stop_queue(rt2x00dev->rx);
  857. }
  858. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  859. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  860. {
  861. struct data_queue *queue;
  862. tx_queue_for_each(rt2x00dev, queue)
  863. rt2x00queue_flush_queue(queue, drop);
  864. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  865. }
  866. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  867. static void rt2x00queue_reset(struct data_queue *queue)
  868. {
  869. unsigned long irqflags;
  870. unsigned int i;
  871. spin_lock_irqsave(&queue->index_lock, irqflags);
  872. queue->count = 0;
  873. queue->length = 0;
  874. for (i = 0; i < Q_INDEX_MAX; i++)
  875. queue->index[i] = 0;
  876. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  877. }
  878. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  879. {
  880. struct data_queue *queue;
  881. unsigned int i;
  882. queue_for_each(rt2x00dev, queue) {
  883. rt2x00queue_reset(queue);
  884. for (i = 0; i < queue->limit; i++)
  885. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  886. }
  887. }
  888. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  889. const struct data_queue_desc *qdesc)
  890. {
  891. struct queue_entry *entries;
  892. unsigned int entry_size;
  893. unsigned int i;
  894. rt2x00queue_reset(queue);
  895. queue->limit = qdesc->entry_num;
  896. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  897. queue->data_size = qdesc->data_size;
  898. queue->desc_size = qdesc->desc_size;
  899. /*
  900. * Allocate all queue entries.
  901. */
  902. entry_size = sizeof(*entries) + qdesc->priv_size;
  903. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  904. if (!entries)
  905. return -ENOMEM;
  906. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  907. (((char *)(__base)) + ((__limit) * (__esize)) + \
  908. ((__index) * (__psize)))
  909. for (i = 0; i < queue->limit; i++) {
  910. entries[i].flags = 0;
  911. entries[i].queue = queue;
  912. entries[i].skb = NULL;
  913. entries[i].entry_idx = i;
  914. entries[i].priv_data =
  915. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  916. sizeof(*entries), qdesc->priv_size);
  917. }
  918. #undef QUEUE_ENTRY_PRIV_OFFSET
  919. queue->entries = entries;
  920. return 0;
  921. }
  922. static void rt2x00queue_free_skbs(struct data_queue *queue)
  923. {
  924. unsigned int i;
  925. if (!queue->entries)
  926. return;
  927. for (i = 0; i < queue->limit; i++) {
  928. rt2x00queue_free_skb(&queue->entries[i]);
  929. }
  930. }
  931. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  932. {
  933. unsigned int i;
  934. struct sk_buff *skb;
  935. for (i = 0; i < queue->limit; i++) {
  936. skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
  937. if (!skb)
  938. return -ENOMEM;
  939. queue->entries[i].skb = skb;
  940. }
  941. return 0;
  942. }
  943. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  944. {
  945. struct data_queue *queue;
  946. int status;
  947. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  948. if (status)
  949. goto exit;
  950. tx_queue_for_each(rt2x00dev, queue) {
  951. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  952. if (status)
  953. goto exit;
  954. }
  955. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  956. if (status)
  957. goto exit;
  958. if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
  959. status = rt2x00queue_alloc_entries(rt2x00dev->atim,
  960. rt2x00dev->ops->atim);
  961. if (status)
  962. goto exit;
  963. }
  964. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  965. if (status)
  966. goto exit;
  967. return 0;
  968. exit:
  969. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  970. rt2x00queue_uninitialize(rt2x00dev);
  971. return status;
  972. }
  973. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  974. {
  975. struct data_queue *queue;
  976. rt2x00queue_free_skbs(rt2x00dev->rx);
  977. queue_for_each(rt2x00dev, queue) {
  978. kfree(queue->entries);
  979. queue->entries = NULL;
  980. }
  981. }
  982. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  983. struct data_queue *queue, enum data_queue_qid qid)
  984. {
  985. mutex_init(&queue->status_lock);
  986. spin_lock_init(&queue->tx_lock);
  987. spin_lock_init(&queue->index_lock);
  988. queue->rt2x00dev = rt2x00dev;
  989. queue->qid = qid;
  990. queue->txop = 0;
  991. queue->aifs = 2;
  992. queue->cw_min = 5;
  993. queue->cw_max = 10;
  994. }
  995. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  996. {
  997. struct data_queue *queue;
  998. enum data_queue_qid qid;
  999. unsigned int req_atim =
  1000. !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1001. /*
  1002. * We need the following queues:
  1003. * RX: 1
  1004. * TX: ops->tx_queues
  1005. * Beacon: 1
  1006. * Atim: 1 (if required)
  1007. */
  1008. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1009. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1010. if (!queue) {
  1011. ERROR(rt2x00dev, "Queue allocation failed.\n");
  1012. return -ENOMEM;
  1013. }
  1014. /*
  1015. * Initialize pointers
  1016. */
  1017. rt2x00dev->rx = queue;
  1018. rt2x00dev->tx = &queue[1];
  1019. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1020. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1021. /*
  1022. * Initialize queue parameters.
  1023. * RX: qid = QID_RX
  1024. * TX: qid = QID_AC_VO + index
  1025. * TX: cw_min: 2^5 = 32.
  1026. * TX: cw_max: 2^10 = 1024.
  1027. * BCN: qid = QID_BEACON
  1028. * ATIM: qid = QID_ATIM
  1029. */
  1030. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1031. qid = QID_AC_VO;
  1032. tx_queue_for_each(rt2x00dev, queue)
  1033. rt2x00queue_init(rt2x00dev, queue, qid++);
  1034. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1035. if (req_atim)
  1036. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1037. return 0;
  1038. }
  1039. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1040. {
  1041. kfree(rt2x00dev->rx);
  1042. rt2x00dev->rx = NULL;
  1043. rt2x00dev->tx = NULL;
  1044. rt2x00dev->bcn = NULL;
  1045. }