ak4113.c 18 KB

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  1. /*
  2. * Routines for control of the AK4113 via I2C/4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. * Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <linux/module.h>
  26. #include <sound/core.h>
  27. #include <sound/control.h>
  28. #include <sound/pcm.h>
  29. #include <sound/ak4113.h>
  30. #include <sound/asoundef.h>
  31. #include <sound/info.h>
  32. MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
  33. MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
  34. MODULE_LICENSE("GPL");
  35. #define AK4113_ADDR 0x00 /* fixed address */
  36. static void ak4113_stats(struct work_struct *work);
  37. static void ak4113_init_regs(struct ak4113 *chip);
  38. static void reg_write(struct ak4113 *ak4113, unsigned char reg,
  39. unsigned char val)
  40. {
  41. ak4113->write(ak4113->private_data, reg, val);
  42. if (reg < sizeof(ak4113->regmap))
  43. ak4113->regmap[reg] = val;
  44. }
  45. static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
  46. {
  47. return ak4113->read(ak4113->private_data, reg);
  48. }
  49. static void snd_ak4113_free(struct ak4113 *chip)
  50. {
  51. atomic_inc(&chip->wq_processing); /* don't schedule new work */
  52. cancel_delayed_work_sync(&chip->work);
  53. kfree(chip);
  54. }
  55. static int snd_ak4113_dev_free(struct snd_device *device)
  56. {
  57. struct ak4113 *chip = device->device_data;
  58. snd_ak4113_free(chip);
  59. return 0;
  60. }
  61. int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
  62. ak4113_write_t *write, const unsigned char *pgm,
  63. void *private_data, struct ak4113 **r_ak4113)
  64. {
  65. struct ak4113 *chip;
  66. int err = 0;
  67. unsigned char reg;
  68. static struct snd_device_ops ops = {
  69. .dev_free = snd_ak4113_dev_free,
  70. };
  71. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  72. if (chip == NULL)
  73. return -ENOMEM;
  74. spin_lock_init(&chip->lock);
  75. chip->card = card;
  76. chip->read = read;
  77. chip->write = write;
  78. chip->private_data = private_data;
  79. INIT_DELAYED_WORK(&chip->work, ak4113_stats);
  80. atomic_set(&chip->wq_processing, 0);
  81. for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
  82. chip->regmap[reg] = pgm[reg];
  83. ak4113_init_regs(chip);
  84. chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
  85. AK4113_CINT | AK4113_STC);
  86. chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
  87. chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
  88. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
  89. if (err < 0)
  90. goto __fail;
  91. if (r_ak4113)
  92. *r_ak4113 = chip;
  93. return 0;
  94. __fail:
  95. snd_ak4113_free(chip);
  96. return err < 0 ? err : -EIO;
  97. }
  98. EXPORT_SYMBOL_GPL(snd_ak4113_create);
  99. void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
  100. unsigned char mask, unsigned char val)
  101. {
  102. if (reg >= AK4113_WRITABLE_REGS)
  103. return;
  104. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  105. }
  106. EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
  107. static void ak4113_init_regs(struct ak4113 *chip)
  108. {
  109. unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
  110. /* bring the chip to reset state and powerdown state */
  111. reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
  112. udelay(200);
  113. /* release reset, but leave powerdown */
  114. reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
  115. udelay(200);
  116. for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
  117. reg_write(chip, reg, chip->regmap[reg]);
  118. /* release powerdown, everything is initialized now */
  119. reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
  120. }
  121. void snd_ak4113_reinit(struct ak4113 *chip)
  122. {
  123. if (atomic_inc_return(&chip->wq_processing) == 1)
  124. cancel_delayed_work_sync(&chip->work);
  125. ak4113_init_regs(chip);
  126. /* bring up statistics / event queing */
  127. if (atomic_dec_and_test(&chip->wq_processing))
  128. schedule_delayed_work(&chip->work, HZ / 10);
  129. }
  130. EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
  131. static unsigned int external_rate(unsigned char rcs1)
  132. {
  133. switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
  134. case AK4113_FS_8000HZ:
  135. return 8000;
  136. case AK4113_FS_11025HZ:
  137. return 11025;
  138. case AK4113_FS_16000HZ:
  139. return 16000;
  140. case AK4113_FS_22050HZ:
  141. return 22050;
  142. case AK4113_FS_24000HZ:
  143. return 24000;
  144. case AK4113_FS_32000HZ:
  145. return 32000;
  146. case AK4113_FS_44100HZ:
  147. return 44100;
  148. case AK4113_FS_48000HZ:
  149. return 48000;
  150. case AK4113_FS_64000HZ:
  151. return 64000;
  152. case AK4113_FS_88200HZ:
  153. return 88200;
  154. case AK4113_FS_96000HZ:
  155. return 96000;
  156. case AK4113_FS_176400HZ:
  157. return 176400;
  158. case AK4113_FS_192000HZ:
  159. return 192000;
  160. default:
  161. return 0;
  162. }
  163. }
  164. static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
  165. struct snd_ctl_elem_info *uinfo)
  166. {
  167. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  168. uinfo->count = 1;
  169. uinfo->value.integer.min = 0;
  170. uinfo->value.integer.max = LONG_MAX;
  171. return 0;
  172. }
  173. static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
  174. struct snd_ctl_elem_value *ucontrol)
  175. {
  176. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  177. long *ptr;
  178. spin_lock_irq(&chip->lock);
  179. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  180. ucontrol->value.integer.value[0] = *ptr;
  181. *ptr = 0;
  182. spin_unlock_irq(&chip->lock);
  183. return 0;
  184. }
  185. #define snd_ak4113_in_bit_info snd_ctl_boolean_mono_info
  186. static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
  187. struct snd_ctl_elem_value *ucontrol)
  188. {
  189. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  190. unsigned char reg = kcontrol->private_value & 0xff;
  191. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  192. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  193. ucontrol->value.integer.value[0] =
  194. ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  195. return 0;
  196. }
  197. static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
  198. struct snd_ctl_elem_info *uinfo)
  199. {
  200. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  201. uinfo->count = 1;
  202. uinfo->value.integer.min = 0;
  203. uinfo->value.integer.max = 5;
  204. return 0;
  205. }
  206. static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
  207. struct snd_ctl_elem_value *ucontrol)
  208. {
  209. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  210. ucontrol->value.integer.value[0] =
  211. (AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
  212. return 0;
  213. }
  214. static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
  215. struct snd_ctl_elem_value *ucontrol)
  216. {
  217. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  218. int change;
  219. u8 old_val;
  220. spin_lock_irq(&chip->lock);
  221. old_val = chip->regmap[AK4113_REG_IO1];
  222. change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
  223. if (change)
  224. reg_write(chip, AK4113_REG_IO1,
  225. (old_val & (~AK4113_IPS(0xff))) |
  226. (AK4113_IPS(ucontrol->value.integer.value[0])));
  227. spin_unlock_irq(&chip->lock);
  228. return change;
  229. }
  230. static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
  231. struct snd_ctl_elem_info *uinfo)
  232. {
  233. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  234. uinfo->count = 1;
  235. uinfo->value.integer.min = 0;
  236. uinfo->value.integer.max = 192000;
  237. return 0;
  238. }
  239. static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
  240. struct snd_ctl_elem_value *ucontrol)
  241. {
  242. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  243. ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
  244. AK4113_REG_RCS1));
  245. return 0;
  246. }
  247. static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
  248. struct snd_ctl_elem_info *uinfo)
  249. {
  250. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  251. uinfo->count = 1;
  252. return 0;
  253. }
  254. static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
  255. struct snd_ctl_elem_value *ucontrol)
  256. {
  257. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  258. unsigned i;
  259. for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
  260. ucontrol->value.iec958.status[i] = reg_read(chip,
  261. AK4113_REG_RXCSB0 + i);
  262. return 0;
  263. }
  264. static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
  265. struct snd_ctl_elem_info *uinfo)
  266. {
  267. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  268. uinfo->count = 1;
  269. return 0;
  270. }
  271. static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
  272. struct snd_ctl_elem_value *ucontrol)
  273. {
  274. memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
  275. return 0;
  276. }
  277. static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
  278. struct snd_ctl_elem_info *uinfo)
  279. {
  280. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  281. uinfo->value.integer.min = 0;
  282. uinfo->value.integer.max = 0xffff;
  283. uinfo->count = 4;
  284. return 0;
  285. }
  286. static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
  287. struct snd_ctl_elem_value *ucontrol)
  288. {
  289. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  290. unsigned short tmp;
  291. ucontrol->value.integer.value[0] = 0xf8f2;
  292. ucontrol->value.integer.value[1] = 0x4e1f;
  293. tmp = reg_read(chip, AK4113_REG_Pc0) |
  294. (reg_read(chip, AK4113_REG_Pc1) << 8);
  295. ucontrol->value.integer.value[2] = tmp;
  296. tmp = reg_read(chip, AK4113_REG_Pd0) |
  297. (reg_read(chip, AK4113_REG_Pd1) << 8);
  298. ucontrol->value.integer.value[3] = tmp;
  299. return 0;
  300. }
  301. static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
  302. struct snd_ctl_elem_info *uinfo)
  303. {
  304. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  305. uinfo->count = AK4113_REG_QSUB_SIZE;
  306. return 0;
  307. }
  308. static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
  309. struct snd_ctl_elem_value *ucontrol)
  310. {
  311. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  312. unsigned i;
  313. for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
  314. ucontrol->value.bytes.data[i] = reg_read(chip,
  315. AK4113_REG_QSUB_ADDR + i);
  316. return 0;
  317. }
  318. /* Don't forget to change AK4113_CONTROLS define!!! */
  319. static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
  320. {
  321. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  322. .name = "IEC958 Parity Errors",
  323. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  324. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  325. .info = snd_ak4113_in_error_info,
  326. .get = snd_ak4113_in_error_get,
  327. .private_value = offsetof(struct ak4113, parity_errors),
  328. },
  329. {
  330. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  331. .name = "IEC958 V-Bit Errors",
  332. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  333. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  334. .info = snd_ak4113_in_error_info,
  335. .get = snd_ak4113_in_error_get,
  336. .private_value = offsetof(struct ak4113, v_bit_errors),
  337. },
  338. {
  339. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  340. .name = "IEC958 C-CRC Errors",
  341. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  342. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  343. .info = snd_ak4113_in_error_info,
  344. .get = snd_ak4113_in_error_get,
  345. .private_value = offsetof(struct ak4113, ccrc_errors),
  346. },
  347. {
  348. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  349. .name = "IEC958 Q-CRC Errors",
  350. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  351. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  352. .info = snd_ak4113_in_error_info,
  353. .get = snd_ak4113_in_error_get,
  354. .private_value = offsetof(struct ak4113, qcrc_errors),
  355. },
  356. {
  357. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  358. .name = "IEC958 External Rate",
  359. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  360. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  361. .info = snd_ak4113_rate_info,
  362. .get = snd_ak4113_rate_get,
  363. },
  364. {
  365. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  366. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  367. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  368. .info = snd_ak4113_spdif_mask_info,
  369. .get = snd_ak4113_spdif_mask_get,
  370. },
  371. {
  372. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  373. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  374. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  375. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  376. .info = snd_ak4113_spdif_info,
  377. .get = snd_ak4113_spdif_get,
  378. },
  379. {
  380. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  381. .name = "IEC958 Preample Capture Default",
  382. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  383. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  384. .info = snd_ak4113_spdif_pinfo,
  385. .get = snd_ak4113_spdif_pget,
  386. },
  387. {
  388. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  389. .name = "IEC958 Q-subcode Capture Default",
  390. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  391. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  392. .info = snd_ak4113_spdif_qinfo,
  393. .get = snd_ak4113_spdif_qget,
  394. },
  395. {
  396. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  397. .name = "IEC958 Audio",
  398. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  399. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  400. .info = snd_ak4113_in_bit_info,
  401. .get = snd_ak4113_in_bit_get,
  402. .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
  403. },
  404. {
  405. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  406. .name = "IEC958 Non-PCM Bitstream",
  407. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  408. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  409. .info = snd_ak4113_in_bit_info,
  410. .get = snd_ak4113_in_bit_get,
  411. .private_value = (0<<8) | AK4113_REG_RCS1,
  412. },
  413. {
  414. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  415. .name = "IEC958 DTS Bitstream",
  416. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  417. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  418. .info = snd_ak4113_in_bit_info,
  419. .get = snd_ak4113_in_bit_get,
  420. .private_value = (1<<8) | AK4113_REG_RCS1,
  421. },
  422. {
  423. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  424. .name = "AK4113 Input Select",
  425. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  426. SNDRV_CTL_ELEM_ACCESS_WRITE,
  427. .info = snd_ak4113_rx_info,
  428. .get = snd_ak4113_rx_get,
  429. .put = snd_ak4113_rx_put,
  430. }
  431. };
  432. static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
  433. struct snd_info_buffer *buffer)
  434. {
  435. struct ak4113 *ak4113 = entry->private_data;
  436. int reg, val;
  437. /* all ak4113 registers 0x00 - 0x1c */
  438. for (reg = 0; reg < 0x1d; reg++) {
  439. val = reg_read(ak4113, reg);
  440. snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
  441. }
  442. }
  443. static void snd_ak4113_proc_init(struct ak4113 *ak4113)
  444. {
  445. struct snd_info_entry *entry;
  446. if (!snd_card_proc_new(ak4113->card, "ak4113", &entry))
  447. snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read);
  448. }
  449. int snd_ak4113_build(struct ak4113 *ak4113,
  450. struct snd_pcm_substream *cap_substream)
  451. {
  452. struct snd_kcontrol *kctl;
  453. unsigned int idx;
  454. int err;
  455. if (snd_BUG_ON(!cap_substream))
  456. return -EINVAL;
  457. ak4113->substream = cap_substream;
  458. for (idx = 0; idx < AK4113_CONTROLS; idx++) {
  459. kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
  460. if (kctl == NULL)
  461. return -ENOMEM;
  462. kctl->id.device = cap_substream->pcm->device;
  463. kctl->id.subdevice = cap_substream->number;
  464. err = snd_ctl_add(ak4113->card, kctl);
  465. if (err < 0)
  466. return err;
  467. ak4113->kctls[idx] = kctl;
  468. }
  469. snd_ak4113_proc_init(ak4113);
  470. /* trigger workq */
  471. schedule_delayed_work(&ak4113->work, HZ / 10);
  472. return 0;
  473. }
  474. EXPORT_SYMBOL_GPL(snd_ak4113_build);
  475. int snd_ak4113_external_rate(struct ak4113 *ak4113)
  476. {
  477. unsigned char rcs1;
  478. rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
  479. return external_rate(rcs1);
  480. }
  481. EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
  482. int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
  483. {
  484. struct snd_pcm_runtime *runtime =
  485. ak4113->substream ? ak4113->substream->runtime : NULL;
  486. unsigned long _flags;
  487. int res = 0;
  488. unsigned char rcs0, rcs1, rcs2;
  489. unsigned char c0, c1;
  490. rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
  491. if (flags & AK4113_CHECK_NO_STAT)
  492. goto __rate;
  493. rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
  494. rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
  495. spin_lock_irqsave(&ak4113->lock, _flags);
  496. if (rcs0 & AK4113_PAR)
  497. ak4113->parity_errors++;
  498. if (rcs0 & AK4113_V)
  499. ak4113->v_bit_errors++;
  500. if (rcs2 & AK4113_CCRC)
  501. ak4113->ccrc_errors++;
  502. if (rcs2 & AK4113_QCRC)
  503. ak4113->qcrc_errors++;
  504. c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
  505. AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
  506. (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
  507. AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
  508. c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
  509. AK4113_DAT | 0xf0)) ^
  510. (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
  511. AK4113_DAT | 0xf0));
  512. ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
  513. ak4113->rcs1 = rcs1;
  514. ak4113->rcs2 = rcs2;
  515. spin_unlock_irqrestore(&ak4113->lock, _flags);
  516. if (rcs0 & AK4113_PAR)
  517. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  518. &ak4113->kctls[0]->id);
  519. if (rcs0 & AK4113_V)
  520. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  521. &ak4113->kctls[1]->id);
  522. if (rcs2 & AK4113_CCRC)
  523. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  524. &ak4113->kctls[2]->id);
  525. if (rcs2 & AK4113_QCRC)
  526. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  527. &ak4113->kctls[3]->id);
  528. /* rate change */
  529. if (c1 & 0xf0)
  530. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  531. &ak4113->kctls[4]->id);
  532. if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
  533. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  534. &ak4113->kctls[6]->id);
  535. if (c0 & AK4113_QINT)
  536. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  537. &ak4113->kctls[8]->id);
  538. if (c0 & AK4113_AUDION)
  539. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  540. &ak4113->kctls[9]->id);
  541. if (c1 & AK4113_NPCM)
  542. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  543. &ak4113->kctls[10]->id);
  544. if (c1 & AK4113_DTSCD)
  545. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  546. &ak4113->kctls[11]->id);
  547. if (ak4113->change_callback && (c0 | c1) != 0)
  548. ak4113->change_callback(ak4113, c0, c1);
  549. __rate:
  550. /* compare rate */
  551. res = external_rate(rcs1);
  552. if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
  553. (runtime->rate != res)) {
  554. snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
  555. if (snd_pcm_running(ak4113->substream)) {
  556. /*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
  557. * runtime->rate, res); */
  558. snd_pcm_stop(ak4113->substream,
  559. SNDRV_PCM_STATE_DRAINING);
  560. wake_up(&runtime->sleep);
  561. res = 1;
  562. }
  563. snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
  564. }
  565. return res;
  566. }
  567. EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
  568. static void ak4113_stats(struct work_struct *work)
  569. {
  570. struct ak4113 *chip = container_of(work, struct ak4113, work.work);
  571. if (atomic_inc_return(&chip->wq_processing) == 1)
  572. snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
  573. if (atomic_dec_and_test(&chip->wq_processing))
  574. schedule_delayed_work(&chip->work, HZ / 10);
  575. }