idmap.c 4.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
  1. #include <linux/kernel.h>
  2. #include <asm/cputype.h>
  3. #include <asm/idmap.h>
  4. #include <asm/pgalloc.h>
  5. #include <asm/pgtable.h>
  6. #include <asm/sections.h>
  7. #include <asm/system_info.h>
  8. pgd_t *idmap_pgd;
  9. #ifdef CONFIG_ARM_LPAE
  10. static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
  11. unsigned long prot)
  12. {
  13. pmd_t *pmd;
  14. unsigned long next;
  15. if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
  16. pmd = pmd_alloc_one(&init_mm, addr);
  17. if (!pmd) {
  18. pr_warning("Failed to allocate identity pmd.\n");
  19. return;
  20. }
  21. /*
  22. * Copy the original PMD to ensure that the PMD entries for
  23. * the kernel image are preserved.
  24. */
  25. if (!pud_none(*pud))
  26. memcpy(pmd, pmd_offset(pud, 0),
  27. PTRS_PER_PMD * sizeof(pmd_t));
  28. pud_populate(&init_mm, pud, pmd);
  29. pmd += pmd_index(addr);
  30. } else
  31. pmd = pmd_offset(pud, addr);
  32. do {
  33. next = pmd_addr_end(addr, end);
  34. *pmd = __pmd((addr & PMD_MASK) | prot);
  35. flush_pmd_entry(pmd);
  36. } while (pmd++, addr = next, addr != end);
  37. }
  38. #else /* !CONFIG_ARM_LPAE */
  39. static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
  40. unsigned long prot)
  41. {
  42. #ifdef CONFIG_TIMA_RKP_L1_TABLES
  43. unsigned long cmd_id = 0x3f809221;
  44. unsigned long tima_wr_out;
  45. #endif
  46. pmd_t *pmd = pmd_offset(pud, addr);
  47. addr = (addr & PMD_MASK) | prot;
  48. #ifdef CONFIG_TIMA_RKP_L1_TABLES
  49. #if __GNUC__ >= 4 && __GNUC_MINOR__ >= 6
  50. __asm__ __volatile__(".arch_extension sec");
  51. #endif
  52. clean_dcache_area(pmd, 8);
  53. __asm__ __volatile__ (
  54. "stmfd sp!,{r0, r8-r11}\n"
  55. "mov r11, r0\n"
  56. "mov r0, %1\n"
  57. "mov r8, %2\n"
  58. "mov r9, %3\n"
  59. "mov r10, %4\n"
  60. "mcr p15, 0, r8, c7, c14, 1\n"
  61. "add r8, r8, #4\n"
  62. "mcr p15, 0, r8, c7, c14, 1\n"
  63. "dsb\n"
  64. "smc #9\n"
  65. "sub r8, r8, #4\n"
  66. "mcr p15, 0, r8, c7, c6, 1\n"
  67. "dsb\n"
  68. "mov %0, r10\n"
  69. "add r8, r8, #4\n"
  70. "mcr p15, 0, r8, c7, c6, 1\n"
  71. "dsb\n"
  72. "mov r0, #0\n"
  73. "mcr p15, 0, r0, c8, c3, 0\n"
  74. "dsb\n"
  75. "isb\n"
  76. "pop {r0, r8-r11}\n"
  77. :"=r"(tima_wr_out):"r"(cmd_id),"r"((unsigned long)pmd),"r"(addr),"r"(addr + SECTION_SIZE):"r0","r8","r9","r10","r11","cc");
  78. if ((pmd[0]|0x4) != (addr|0x4)) {
  79. printk(KERN_ERR"pmd[0] %lx != addr %lx - %lx %lx in func: %s tima_wr_out = %lx\n",
  80. (unsigned long) pmd[0], addr, (unsigned long) pmd[1], addr + SECTION_SIZE, __func__, tima_wr_out);
  81. }
  82. if ((pmd[1]|0x4)!=((addr + SECTION_SIZE)|0x4)) {
  83. printk(KERN_ERR"pmd[1] %lx != (addr + SECTION_SIZE) %lx in func: %s\n",
  84. (unsigned long) pmd[1], (addr + SECTION_SIZE), __func__);
  85. }
  86. #else
  87. pmd[0] = __pmd(addr);
  88. addr += SECTION_SIZE;
  89. pmd[1] = __pmd(addr);
  90. #endif
  91. flush_pmd_entry(pmd);
  92. }
  93. #endif /* CONFIG_ARM_LPAE */
  94. static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
  95. unsigned long prot)
  96. {
  97. pud_t *pud = pud_offset(pgd, addr);
  98. unsigned long next;
  99. do {
  100. next = pud_addr_end(addr, end);
  101. idmap_add_pmd(pud, addr, next, prot);
  102. } while (pud++, addr = next, addr != end);
  103. }
  104. static void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
  105. {
  106. unsigned long prot, next;
  107. prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
  108. if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
  109. prot |= PMD_BIT4;
  110. pgd += pgd_index(addr);
  111. do {
  112. next = pgd_addr_end(addr, end);
  113. idmap_add_pud(pgd, addr, next, prot);
  114. } while (pgd++, addr = next, addr != end);
  115. }
  116. extern char __idmap_text_start[], __idmap_text_end[];
  117. static int __init init_static_idmap(void)
  118. {
  119. phys_addr_t idmap_start, idmap_end;
  120. idmap_pgd = pgd_alloc(&init_mm);
  121. if (!idmap_pgd)
  122. return -ENOMEM;
  123. /* Add an identity mapping for the physical address of the section. */
  124. idmap_start = virt_to_phys((void *)__idmap_text_start);
  125. idmap_end = virt_to_phys((void *)__idmap_text_end);
  126. pr_info("Setting up static identity map for 0x%llx - 0x%llx\n",
  127. (long long)idmap_start, (long long)idmap_end);
  128. identity_mapping_add(idmap_pgd, idmap_start, idmap_end);
  129. /* Flush L1 for the hardware to see this page table content */
  130. flush_cache_louis();
  131. return 0;
  132. }
  133. early_initcall(init_static_idmap);
  134. /*
  135. * In order to soft-boot, we need to switch to a 1:1 mapping for the
  136. * cpu_reset functions. This will then ensure that we have predictable
  137. * results when turning off the mmu.
  138. */
  139. void setup_mm_for_reboot(void)
  140. {
  141. /* Switch to the identity mapping. */
  142. cpu_switch_mm(idmap_pgd, &init_mm);
  143. #ifdef CONFIG_CPU_HAS_ASID
  144. /*
  145. * We don't have a clean ASID for the identity mapping, which
  146. * may clash with virtual addresses of the previous page tables
  147. * and therefore potentially in the TLB.
  148. */
  149. local_flush_tlb_all();
  150. #endif
  151. }