mpt2sas_base.c 130 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int mpt2sas_fwfault_debug;
  74. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  75. "and halt firmware - (default=0)");
  76. static int disable_discovery = -1;
  77. module_param(disable_discovery, int, 0);
  78. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  79. /**
  80. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  81. *
  82. */
  83. static int
  84. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  85. {
  86. int ret = param_set_int(val, kp);
  87. struct MPT2SAS_ADAPTER *ioc;
  88. if (ret)
  89. return ret;
  90. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  91. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  92. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  93. return 0;
  94. }
  95. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  96. param_get_int, &mpt2sas_fwfault_debug, 0644);
  97. /**
  98. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  99. * @arg: input argument, used to derive ioc
  100. *
  101. * Return 0 if controller is removed from pci subsystem.
  102. * Return -1 for other case.
  103. */
  104. static int mpt2sas_remove_dead_ioc_func(void *arg)
  105. {
  106. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  107. struct pci_dev *pdev;
  108. if ((ioc == NULL))
  109. return -1;
  110. pdev = ioc->pdev;
  111. if ((pdev == NULL))
  112. return -1;
  113. pci_stop_and_remove_bus_device(pdev);
  114. return 0;
  115. }
  116. /**
  117. * _base_fault_reset_work - workq handling ioc fault conditions
  118. * @work: input argument, used to derive ioc
  119. * Context: sleep.
  120. *
  121. * Return nothing.
  122. */
  123. static void
  124. _base_fault_reset_work(struct work_struct *work)
  125. {
  126. struct MPT2SAS_ADAPTER *ioc =
  127. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  128. unsigned long flags;
  129. u32 doorbell;
  130. int rc;
  131. struct task_struct *p;
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->shost_recovery)
  134. goto rearm_timer;
  135. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  136. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  137. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  138. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  139. ioc->name, __func__);
  140. /*
  141. * Call _scsih_flush_pending_cmds callback so that we flush all
  142. * pending commands back to OS. This call is required to aovid
  143. * deadlock at block layer. Dead IOC will fail to do diag reset,
  144. * and this call is safe since dead ioc will never return any
  145. * command back from HW.
  146. */
  147. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  148. /*
  149. * Set remove_host flag early since kernel thread will
  150. * take some time to execute.
  151. */
  152. ioc->remove_host = 1;
  153. /*Remove the Dead Host */
  154. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  155. "mpt2sas_dead_ioc_%d", ioc->id);
  156. if (IS_ERR(p)) {
  157. printk(MPT2SAS_ERR_FMT
  158. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  159. ioc->name, __func__);
  160. } else {
  161. printk(MPT2SAS_ERR_FMT
  162. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  163. ioc->name, __func__);
  164. }
  165. return; /* don't rearm timer */
  166. }
  167. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  168. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  169. FORCE_BIG_HAMMER);
  170. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  171. __func__, (rc == 0) ? "success" : "failed");
  172. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  173. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  174. mpt2sas_base_fault_info(ioc, doorbell &
  175. MPI2_DOORBELL_DATA_MASK);
  176. }
  177. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  178. rearm_timer:
  179. if (ioc->fault_reset_work_q)
  180. queue_delayed_work(ioc->fault_reset_work_q,
  181. &ioc->fault_reset_work,
  182. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  183. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  184. }
  185. /**
  186. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  187. * @ioc: per adapter object
  188. * Context: sleep.
  189. *
  190. * Return nothing.
  191. */
  192. void
  193. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  194. {
  195. unsigned long flags;
  196. if (ioc->fault_reset_work_q)
  197. return;
  198. /* initialize fault polling */
  199. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  200. snprintf(ioc->fault_reset_work_q_name,
  201. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  202. ioc->fault_reset_work_q =
  203. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  204. if (!ioc->fault_reset_work_q) {
  205. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  206. ioc->name, __func__, __LINE__);
  207. return;
  208. }
  209. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  210. if (ioc->fault_reset_work_q)
  211. queue_delayed_work(ioc->fault_reset_work_q,
  212. &ioc->fault_reset_work,
  213. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  214. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  215. }
  216. /**
  217. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  218. * @ioc: per adapter object
  219. * Context: sleep.
  220. *
  221. * Return nothing.
  222. */
  223. void
  224. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  225. {
  226. unsigned long flags;
  227. struct workqueue_struct *wq;
  228. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  229. wq = ioc->fault_reset_work_q;
  230. ioc->fault_reset_work_q = NULL;
  231. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  232. if (wq) {
  233. if (!cancel_delayed_work(&ioc->fault_reset_work))
  234. flush_workqueue(wq);
  235. destroy_workqueue(wq);
  236. }
  237. }
  238. /**
  239. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  240. * @ioc: per adapter object
  241. * @fault_code: fault code
  242. *
  243. * Return nothing.
  244. */
  245. void
  246. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  247. {
  248. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  249. ioc->name, fault_code);
  250. }
  251. /**
  252. * mpt2sas_halt_firmware - halt's mpt controller firmware
  253. * @ioc: per adapter object
  254. *
  255. * For debugging timeout related issues. Writing 0xCOFFEE00
  256. * to the doorbell register will halt controller firmware. With
  257. * the purpose to stop both driver and firmware, the enduser can
  258. * obtain a ring buffer from controller UART.
  259. */
  260. void
  261. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  262. {
  263. u32 doorbell;
  264. if (!ioc->fwfault_debug)
  265. return;
  266. dump_stack();
  267. doorbell = readl(&ioc->chip->Doorbell);
  268. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  269. mpt2sas_base_fault_info(ioc , doorbell);
  270. else {
  271. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  272. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  273. "timeout\n", ioc->name);
  274. }
  275. panic("panic in %s\n", __func__);
  276. }
  277. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  278. /**
  279. * _base_sas_ioc_info - verbose translation of the ioc status
  280. * @ioc: per adapter object
  281. * @mpi_reply: reply mf payload returned from firmware
  282. * @request_hdr: request mf
  283. *
  284. * Return nothing.
  285. */
  286. static void
  287. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  288. MPI2RequestHeader_t *request_hdr)
  289. {
  290. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  291. MPI2_IOCSTATUS_MASK;
  292. char *desc = NULL;
  293. u16 frame_sz;
  294. char *func_str = NULL;
  295. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  296. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  297. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  298. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  299. return;
  300. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  301. return;
  302. switch (ioc_status) {
  303. /****************************************************************************
  304. * Common IOCStatus values for all replies
  305. ****************************************************************************/
  306. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  307. desc = "invalid function";
  308. break;
  309. case MPI2_IOCSTATUS_BUSY:
  310. desc = "busy";
  311. break;
  312. case MPI2_IOCSTATUS_INVALID_SGL:
  313. desc = "invalid sgl";
  314. break;
  315. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  316. desc = "internal error";
  317. break;
  318. case MPI2_IOCSTATUS_INVALID_VPID:
  319. desc = "invalid vpid";
  320. break;
  321. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  322. desc = "insufficient resources";
  323. break;
  324. case MPI2_IOCSTATUS_INVALID_FIELD:
  325. desc = "invalid field";
  326. break;
  327. case MPI2_IOCSTATUS_INVALID_STATE:
  328. desc = "invalid state";
  329. break;
  330. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  331. desc = "op state not supported";
  332. break;
  333. /****************************************************************************
  334. * Config IOCStatus values
  335. ****************************************************************************/
  336. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  337. desc = "config invalid action";
  338. break;
  339. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  340. desc = "config invalid type";
  341. break;
  342. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  343. desc = "config invalid page";
  344. break;
  345. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  346. desc = "config invalid data";
  347. break;
  348. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  349. desc = "config no defaults";
  350. break;
  351. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  352. desc = "config cant commit";
  353. break;
  354. /****************************************************************************
  355. * SCSI IO Reply
  356. ****************************************************************************/
  357. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  358. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  359. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  360. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  361. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  362. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  363. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  364. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  365. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  366. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  367. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  368. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  369. break;
  370. /****************************************************************************
  371. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  372. ****************************************************************************/
  373. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  374. desc = "eedp guard error";
  375. break;
  376. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  377. desc = "eedp ref tag error";
  378. break;
  379. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  380. desc = "eedp app tag error";
  381. break;
  382. /****************************************************************************
  383. * SCSI Target values
  384. ****************************************************************************/
  385. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  386. desc = "target invalid io index";
  387. break;
  388. case MPI2_IOCSTATUS_TARGET_ABORTED:
  389. desc = "target aborted";
  390. break;
  391. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  392. desc = "target no conn retryable";
  393. break;
  394. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  395. desc = "target no connection";
  396. break;
  397. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  398. desc = "target xfer count mismatch";
  399. break;
  400. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  401. desc = "target data offset error";
  402. break;
  403. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  404. desc = "target too much write data";
  405. break;
  406. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  407. desc = "target iu too short";
  408. break;
  409. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  410. desc = "target ack nak timeout";
  411. break;
  412. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  413. desc = "target nak received";
  414. break;
  415. /****************************************************************************
  416. * Serial Attached SCSI values
  417. ****************************************************************************/
  418. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  419. desc = "smp request failed";
  420. break;
  421. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  422. desc = "smp data overrun";
  423. break;
  424. /****************************************************************************
  425. * Diagnostic Buffer Post / Diagnostic Release values
  426. ****************************************************************************/
  427. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  428. desc = "diagnostic released";
  429. break;
  430. default:
  431. break;
  432. }
  433. if (!desc)
  434. return;
  435. switch (request_hdr->Function) {
  436. case MPI2_FUNCTION_CONFIG:
  437. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  438. func_str = "config_page";
  439. break;
  440. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  441. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  442. func_str = "task_mgmt";
  443. break;
  444. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  445. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  446. func_str = "sas_iounit_ctl";
  447. break;
  448. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  449. frame_sz = sizeof(Mpi2SepRequest_t);
  450. func_str = "enclosure";
  451. break;
  452. case MPI2_FUNCTION_IOC_INIT:
  453. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  454. func_str = "ioc_init";
  455. break;
  456. case MPI2_FUNCTION_PORT_ENABLE:
  457. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  458. func_str = "port_enable";
  459. break;
  460. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  461. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  462. func_str = "smp_passthru";
  463. break;
  464. default:
  465. frame_sz = 32;
  466. func_str = "unknown";
  467. break;
  468. }
  469. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  470. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  471. _debug_dump_mf(request_hdr, frame_sz/4);
  472. }
  473. /**
  474. * _base_display_event_data - verbose translation of firmware asyn events
  475. * @ioc: per adapter object
  476. * @mpi_reply: reply mf payload returned from firmware
  477. *
  478. * Return nothing.
  479. */
  480. static void
  481. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  482. Mpi2EventNotificationReply_t *mpi_reply)
  483. {
  484. char *desc = NULL;
  485. u16 event;
  486. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  487. return;
  488. event = le16_to_cpu(mpi_reply->Event);
  489. switch (event) {
  490. case MPI2_EVENT_LOG_DATA:
  491. desc = "Log Data";
  492. break;
  493. case MPI2_EVENT_STATE_CHANGE:
  494. desc = "Status Change";
  495. break;
  496. case MPI2_EVENT_HARD_RESET_RECEIVED:
  497. desc = "Hard Reset Received";
  498. break;
  499. case MPI2_EVENT_EVENT_CHANGE:
  500. desc = "Event Change";
  501. break;
  502. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  503. desc = "Device Status Change";
  504. break;
  505. case MPI2_EVENT_IR_OPERATION_STATUS:
  506. if (!ioc->hide_ir_msg)
  507. desc = "IR Operation Status";
  508. break;
  509. case MPI2_EVENT_SAS_DISCOVERY:
  510. {
  511. Mpi2EventDataSasDiscovery_t *event_data =
  512. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  513. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  514. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  515. "start" : "stop");
  516. if (event_data->DiscoveryStatus)
  517. printk("discovery_status(0x%08x)",
  518. le32_to_cpu(event_data->DiscoveryStatus));
  519. printk("\n");
  520. return;
  521. }
  522. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  523. desc = "SAS Broadcast Primitive";
  524. break;
  525. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  526. desc = "SAS Init Device Status Change";
  527. break;
  528. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  529. desc = "SAS Init Table Overflow";
  530. break;
  531. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  532. desc = "SAS Topology Change List";
  533. break;
  534. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  535. desc = "SAS Enclosure Device Status Change";
  536. break;
  537. case MPI2_EVENT_IR_VOLUME:
  538. if (!ioc->hide_ir_msg)
  539. desc = "IR Volume";
  540. break;
  541. case MPI2_EVENT_IR_PHYSICAL_DISK:
  542. if (!ioc->hide_ir_msg)
  543. desc = "IR Physical Disk";
  544. break;
  545. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  546. if (!ioc->hide_ir_msg)
  547. desc = "IR Configuration Change List";
  548. break;
  549. case MPI2_EVENT_LOG_ENTRY_ADDED:
  550. if (!ioc->hide_ir_msg)
  551. desc = "Log Entry Added";
  552. break;
  553. }
  554. if (!desc)
  555. return;
  556. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  557. }
  558. #endif
  559. /**
  560. * _base_sas_log_info - verbose translation of firmware log info
  561. * @ioc: per adapter object
  562. * @log_info: log info
  563. *
  564. * Return nothing.
  565. */
  566. static void
  567. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  568. {
  569. union loginfo_type {
  570. u32 loginfo;
  571. struct {
  572. u32 subcode:16;
  573. u32 code:8;
  574. u32 originator:4;
  575. u32 bus_type:4;
  576. } dw;
  577. };
  578. union loginfo_type sas_loginfo;
  579. char *originator_str = NULL;
  580. sas_loginfo.loginfo = log_info;
  581. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  582. return;
  583. /* each nexus loss loginfo */
  584. if (log_info == 0x31170000)
  585. return;
  586. /* eat the loginfos associated with task aborts */
  587. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  588. 0x31140000 || log_info == 0x31130000))
  589. return;
  590. switch (sas_loginfo.dw.originator) {
  591. case 0:
  592. originator_str = "IOP";
  593. break;
  594. case 1:
  595. originator_str = "PL";
  596. break;
  597. case 2:
  598. if (!ioc->hide_ir_msg)
  599. originator_str = "IR";
  600. else
  601. originator_str = "WarpDrive";
  602. break;
  603. }
  604. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  605. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  606. originator_str, sas_loginfo.dw.code,
  607. sas_loginfo.dw.subcode);
  608. }
  609. /**
  610. * _base_display_reply_info -
  611. * @ioc: per adapter object
  612. * @smid: system request message index
  613. * @msix_index: MSIX table index supplied by the OS
  614. * @reply: reply message frame(lower 32bit addr)
  615. *
  616. * Return nothing.
  617. */
  618. static void
  619. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  620. u32 reply)
  621. {
  622. MPI2DefaultReply_t *mpi_reply;
  623. u16 ioc_status;
  624. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  625. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  626. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  627. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  628. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  629. _base_sas_ioc_info(ioc , mpi_reply,
  630. mpt2sas_base_get_msg_frame(ioc, smid));
  631. }
  632. #endif
  633. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  634. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  635. }
  636. /**
  637. * mpt2sas_base_done - base internal command completion routine
  638. * @ioc: per adapter object
  639. * @smid: system request message index
  640. * @msix_index: MSIX table index supplied by the OS
  641. * @reply: reply message frame(lower 32bit addr)
  642. *
  643. * Return 1 meaning mf should be freed from _base_interrupt
  644. * 0 means the mf is freed from this function.
  645. */
  646. u8
  647. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  648. u32 reply)
  649. {
  650. MPI2DefaultReply_t *mpi_reply;
  651. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  652. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  653. return 1;
  654. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  655. return 1;
  656. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  657. if (mpi_reply) {
  658. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  659. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  660. }
  661. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  662. complete(&ioc->base_cmds.done);
  663. return 1;
  664. }
  665. /**
  666. * _base_async_event - main callback handler for firmware asyn events
  667. * @ioc: per adapter object
  668. * @msix_index: MSIX table index supplied by the OS
  669. * @reply: reply message frame(lower 32bit addr)
  670. *
  671. * Return 1 meaning mf should be freed from _base_interrupt
  672. * 0 means the mf is freed from this function.
  673. */
  674. static u8
  675. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  676. {
  677. Mpi2EventNotificationReply_t *mpi_reply;
  678. Mpi2EventAckRequest_t *ack_request;
  679. u16 smid;
  680. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  681. if (!mpi_reply)
  682. return 1;
  683. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  684. return 1;
  685. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  686. _base_display_event_data(ioc, mpi_reply);
  687. #endif
  688. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  689. goto out;
  690. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  691. if (!smid) {
  692. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  693. ioc->name, __func__);
  694. goto out;
  695. }
  696. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  697. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  698. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  699. ack_request->Event = mpi_reply->Event;
  700. ack_request->EventContext = mpi_reply->EventContext;
  701. ack_request->VF_ID = 0; /* TODO */
  702. ack_request->VP_ID = 0;
  703. mpt2sas_base_put_smid_default(ioc, smid);
  704. out:
  705. /* scsih callback handler */
  706. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  707. /* ctl callback handler */
  708. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  709. return 1;
  710. }
  711. /**
  712. * _base_get_cb_idx - obtain the callback index
  713. * @ioc: per adapter object
  714. * @smid: system request message index
  715. *
  716. * Return callback index.
  717. */
  718. static u8
  719. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  720. {
  721. int i;
  722. u8 cb_idx;
  723. if (smid < ioc->hi_priority_smid) {
  724. i = smid - 1;
  725. cb_idx = ioc->scsi_lookup[i].cb_idx;
  726. } else if (smid < ioc->internal_smid) {
  727. i = smid - ioc->hi_priority_smid;
  728. cb_idx = ioc->hpr_lookup[i].cb_idx;
  729. } else if (smid <= ioc->hba_queue_depth) {
  730. i = smid - ioc->internal_smid;
  731. cb_idx = ioc->internal_lookup[i].cb_idx;
  732. } else
  733. cb_idx = 0xFF;
  734. return cb_idx;
  735. }
  736. /**
  737. * _base_mask_interrupts - disable interrupts
  738. * @ioc: per adapter object
  739. *
  740. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  741. *
  742. * Return nothing.
  743. */
  744. static void
  745. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  746. {
  747. u32 him_register;
  748. ioc->mask_interrupts = 1;
  749. him_register = readl(&ioc->chip->HostInterruptMask);
  750. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  751. writel(him_register, &ioc->chip->HostInterruptMask);
  752. readl(&ioc->chip->HostInterruptMask);
  753. }
  754. /**
  755. * _base_unmask_interrupts - enable interrupts
  756. * @ioc: per adapter object
  757. *
  758. * Enabling only Reply Interrupts
  759. *
  760. * Return nothing.
  761. */
  762. static void
  763. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  764. {
  765. u32 him_register;
  766. him_register = readl(&ioc->chip->HostInterruptMask);
  767. him_register &= ~MPI2_HIM_RIM;
  768. writel(him_register, &ioc->chip->HostInterruptMask);
  769. ioc->mask_interrupts = 0;
  770. }
  771. union reply_descriptor {
  772. u64 word;
  773. struct {
  774. u32 low;
  775. u32 high;
  776. } u;
  777. };
  778. /**
  779. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  780. * @irq: irq number (not used)
  781. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  782. * @r: pt_regs pointer (not used)
  783. *
  784. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  785. */
  786. static irqreturn_t
  787. _base_interrupt(int irq, void *bus_id)
  788. {
  789. struct adapter_reply_queue *reply_q = bus_id;
  790. union reply_descriptor rd;
  791. u32 completed_cmds;
  792. u8 request_desript_type;
  793. u16 smid;
  794. u8 cb_idx;
  795. u32 reply;
  796. u8 msix_index = reply_q->msix_index;
  797. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  798. Mpi2ReplyDescriptorsUnion_t *rpf;
  799. u8 rc;
  800. if (ioc->mask_interrupts)
  801. return IRQ_NONE;
  802. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  803. return IRQ_NONE;
  804. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  805. request_desript_type = rpf->Default.ReplyFlags
  806. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  807. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  808. atomic_dec(&reply_q->busy);
  809. return IRQ_NONE;
  810. }
  811. completed_cmds = 0;
  812. cb_idx = 0xFF;
  813. do {
  814. rd.word = le64_to_cpu(rpf->Words);
  815. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  816. goto out;
  817. reply = 0;
  818. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  819. if (request_desript_type ==
  820. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  821. reply = le32_to_cpu
  822. (rpf->AddressReply.ReplyFrameAddress);
  823. if (reply > ioc->reply_dma_max_address ||
  824. reply < ioc->reply_dma_min_address)
  825. reply = 0;
  826. } else if (request_desript_type ==
  827. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  828. goto next;
  829. else if (request_desript_type ==
  830. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  831. goto next;
  832. if (smid)
  833. cb_idx = _base_get_cb_idx(ioc, smid);
  834. if (smid && cb_idx != 0xFF) {
  835. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  836. reply);
  837. if (reply)
  838. _base_display_reply_info(ioc, smid, msix_index,
  839. reply);
  840. if (rc)
  841. mpt2sas_base_free_smid(ioc, smid);
  842. }
  843. if (!smid)
  844. _base_async_event(ioc, msix_index, reply);
  845. /* reply free queue handling */
  846. if (reply) {
  847. ioc->reply_free_host_index =
  848. (ioc->reply_free_host_index ==
  849. (ioc->reply_free_queue_depth - 1)) ?
  850. 0 : ioc->reply_free_host_index + 1;
  851. ioc->reply_free[ioc->reply_free_host_index] =
  852. cpu_to_le32(reply);
  853. wmb();
  854. writel(ioc->reply_free_host_index,
  855. &ioc->chip->ReplyFreeHostIndex);
  856. }
  857. next:
  858. rpf->Words = cpu_to_le64(ULLONG_MAX);
  859. reply_q->reply_post_host_index =
  860. (reply_q->reply_post_host_index ==
  861. (ioc->reply_post_queue_depth - 1)) ? 0 :
  862. reply_q->reply_post_host_index + 1;
  863. request_desript_type =
  864. reply_q->reply_post_free[reply_q->reply_post_host_index].
  865. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  866. completed_cmds++;
  867. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  868. goto out;
  869. if (!reply_q->reply_post_host_index)
  870. rpf = reply_q->reply_post_free;
  871. else
  872. rpf++;
  873. } while (1);
  874. out:
  875. if (!completed_cmds) {
  876. atomic_dec(&reply_q->busy);
  877. return IRQ_NONE;
  878. }
  879. wmb();
  880. if (ioc->is_warpdrive) {
  881. writel(reply_q->reply_post_host_index,
  882. ioc->reply_post_host_index[msix_index]);
  883. atomic_dec(&reply_q->busy);
  884. return IRQ_HANDLED;
  885. }
  886. writel(reply_q->reply_post_host_index | (msix_index <<
  887. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  888. atomic_dec(&reply_q->busy);
  889. return IRQ_HANDLED;
  890. }
  891. /**
  892. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  893. * @ioc: per adapter object
  894. *
  895. */
  896. static inline int
  897. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  898. {
  899. return (ioc->facts.IOCCapabilities &
  900. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  901. }
  902. /**
  903. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  904. * @ioc: per adapter object
  905. * Context: ISR conext
  906. *
  907. * Called when a Task Management request has completed. We want
  908. * to flush the other reply queues so all the outstanding IO has been
  909. * completed back to OS before we process the TM completetion.
  910. *
  911. * Return nothing.
  912. */
  913. void
  914. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  915. {
  916. struct adapter_reply_queue *reply_q;
  917. /* If MSIX capability is turned off
  918. * then multi-queues are not enabled
  919. */
  920. if (!_base_is_controller_msix_enabled(ioc))
  921. return;
  922. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  923. if (ioc->shost_recovery)
  924. return;
  925. /* TMs are on msix_index == 0 */
  926. if (reply_q->msix_index == 0)
  927. continue;
  928. _base_interrupt(reply_q->vector, (void *)reply_q);
  929. }
  930. }
  931. /**
  932. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  933. * @cb_idx: callback index
  934. *
  935. * Return nothing.
  936. */
  937. void
  938. mpt2sas_base_release_callback_handler(u8 cb_idx)
  939. {
  940. mpt_callbacks[cb_idx] = NULL;
  941. }
  942. /**
  943. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  944. * @cb_func: callback function
  945. *
  946. * Returns cb_func.
  947. */
  948. u8
  949. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  950. {
  951. u8 cb_idx;
  952. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  953. if (mpt_callbacks[cb_idx] == NULL)
  954. break;
  955. mpt_callbacks[cb_idx] = cb_func;
  956. return cb_idx;
  957. }
  958. /**
  959. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  960. *
  961. * Return nothing.
  962. */
  963. void
  964. mpt2sas_base_initialize_callback_handler(void)
  965. {
  966. u8 cb_idx;
  967. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  968. mpt2sas_base_release_callback_handler(cb_idx);
  969. }
  970. /**
  971. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  972. * @ioc: per adapter object
  973. * @paddr: virtual address for SGE
  974. *
  975. * Create a zero length scatter gather entry to insure the IOCs hardware has
  976. * something to use if the target device goes brain dead and tries
  977. * to send data even when none is asked for.
  978. *
  979. * Return nothing.
  980. */
  981. void
  982. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  983. {
  984. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  985. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  986. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  987. MPI2_SGE_FLAGS_SHIFT);
  988. ioc->base_add_sg_single(paddr, flags_length, -1);
  989. }
  990. /**
  991. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  992. * @paddr: virtual address for SGE
  993. * @flags_length: SGE flags and data transfer length
  994. * @dma_addr: Physical address
  995. *
  996. * Return nothing.
  997. */
  998. static void
  999. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1000. {
  1001. Mpi2SGESimple32_t *sgel = paddr;
  1002. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1003. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1004. sgel->FlagsLength = cpu_to_le32(flags_length);
  1005. sgel->Address = cpu_to_le32(dma_addr);
  1006. }
  1007. /**
  1008. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1009. * @paddr: virtual address for SGE
  1010. * @flags_length: SGE flags and data transfer length
  1011. * @dma_addr: Physical address
  1012. *
  1013. * Return nothing.
  1014. */
  1015. static void
  1016. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1017. {
  1018. Mpi2SGESimple64_t *sgel = paddr;
  1019. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1020. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1021. sgel->FlagsLength = cpu_to_le32(flags_length);
  1022. sgel->Address = cpu_to_le64(dma_addr);
  1023. }
  1024. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1025. /**
  1026. * _base_config_dma_addressing - set dma addressing
  1027. * @ioc: per adapter object
  1028. * @pdev: PCI device struct
  1029. *
  1030. * Returns 0 for success, non-zero for failure.
  1031. */
  1032. static int
  1033. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1034. {
  1035. struct sysinfo s;
  1036. char *desc = NULL;
  1037. if (sizeof(dma_addr_t) > 4) {
  1038. const uint64_t required_mask =
  1039. dma_get_required_mask(&pdev->dev);
  1040. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1041. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1042. DMA_BIT_MASK(64))) {
  1043. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1044. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1045. desc = "64";
  1046. goto out;
  1047. }
  1048. }
  1049. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1050. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1051. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1052. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1053. desc = "32";
  1054. } else
  1055. return -ENODEV;
  1056. out:
  1057. si_meminfo(&s);
  1058. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1059. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1060. return 0;
  1061. }
  1062. /**
  1063. * _base_check_enable_msix - checks MSIX capabable.
  1064. * @ioc: per adapter object
  1065. *
  1066. * Check to see if card is capable of MSIX, and set number
  1067. * of available msix vectors
  1068. */
  1069. static int
  1070. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1071. {
  1072. int base;
  1073. u16 message_control;
  1074. /* Check whether controller SAS2008 B0 controller,
  1075. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1076. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1077. ioc->pdev->revision == 0x01) {
  1078. return -EINVAL;
  1079. }
  1080. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1081. if (!base) {
  1082. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1083. "supported\n", ioc->name));
  1084. return -EINVAL;
  1085. }
  1086. /* get msix vector count */
  1087. /* NUMA_IO not supported for older controllers */
  1088. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1089. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1090. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1091. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1092. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1093. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1094. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1095. ioc->msix_vector_count = 1;
  1096. else {
  1097. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1098. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1099. }
  1100. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1101. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1102. return 0;
  1103. }
  1104. /**
  1105. * _base_free_irq - free irq
  1106. * @ioc: per adapter object
  1107. *
  1108. * Freeing respective reply_queue from the list.
  1109. */
  1110. static void
  1111. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1112. {
  1113. struct adapter_reply_queue *reply_q, *next;
  1114. if (list_empty(&ioc->reply_queue_list))
  1115. return;
  1116. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1117. list_del(&reply_q->list);
  1118. synchronize_irq(reply_q->vector);
  1119. free_irq(reply_q->vector, reply_q);
  1120. kfree(reply_q);
  1121. }
  1122. }
  1123. /**
  1124. * _base_request_irq - request irq
  1125. * @ioc: per adapter object
  1126. * @index: msix index into vector table
  1127. * @vector: irq vector
  1128. *
  1129. * Inserting respective reply_queue into the list.
  1130. */
  1131. static int
  1132. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1133. {
  1134. struct adapter_reply_queue *reply_q;
  1135. int r;
  1136. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1137. if (!reply_q) {
  1138. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1139. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1140. return -ENOMEM;
  1141. }
  1142. reply_q->ioc = ioc;
  1143. reply_q->msix_index = index;
  1144. reply_q->vector = vector;
  1145. atomic_set(&reply_q->busy, 0);
  1146. if (ioc->msix_enable)
  1147. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1148. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1149. else
  1150. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1151. MPT2SAS_DRIVER_NAME, ioc->id);
  1152. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1153. reply_q);
  1154. if (r) {
  1155. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1156. reply_q->name, vector);
  1157. kfree(reply_q);
  1158. return -EBUSY;
  1159. }
  1160. INIT_LIST_HEAD(&reply_q->list);
  1161. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1162. return 0;
  1163. }
  1164. /**
  1165. * _base_assign_reply_queues - assigning msix index for each cpu
  1166. * @ioc: per adapter object
  1167. *
  1168. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1169. *
  1170. * It would nice if we could call irq_set_affinity, however it is not
  1171. * an exported symbol
  1172. */
  1173. static void
  1174. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1175. {
  1176. struct adapter_reply_queue *reply_q;
  1177. int cpu_id;
  1178. int cpu_grouping, loop, grouping, grouping_mod;
  1179. if (!_base_is_controller_msix_enabled(ioc))
  1180. return;
  1181. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1182. /* when there are more cpus than available msix vectors,
  1183. * then group cpus togeather on same irq
  1184. */
  1185. if (ioc->cpu_count > ioc->msix_vector_count) {
  1186. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1187. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1188. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1189. cpu_grouping = 2;
  1190. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1191. cpu_grouping = 4;
  1192. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1193. cpu_grouping = 8;
  1194. else
  1195. cpu_grouping = 16;
  1196. } else
  1197. cpu_grouping = 0;
  1198. loop = 0;
  1199. reply_q = list_entry(ioc->reply_queue_list.next,
  1200. struct adapter_reply_queue, list);
  1201. for_each_online_cpu(cpu_id) {
  1202. if (!cpu_grouping) {
  1203. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1204. reply_q = list_entry(reply_q->list.next,
  1205. struct adapter_reply_queue, list);
  1206. } else {
  1207. if (loop < cpu_grouping) {
  1208. ioc->cpu_msix_table[cpu_id] =
  1209. reply_q->msix_index;
  1210. loop++;
  1211. } else {
  1212. reply_q = list_entry(reply_q->list.next,
  1213. struct adapter_reply_queue, list);
  1214. ioc->cpu_msix_table[cpu_id] =
  1215. reply_q->msix_index;
  1216. loop = 1;
  1217. }
  1218. }
  1219. }
  1220. }
  1221. /**
  1222. * _base_disable_msix - disables msix
  1223. * @ioc: per adapter object
  1224. *
  1225. */
  1226. static void
  1227. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1228. {
  1229. if (ioc->msix_enable) {
  1230. pci_disable_msix(ioc->pdev);
  1231. ioc->msix_enable = 0;
  1232. }
  1233. }
  1234. /**
  1235. * _base_enable_msix - enables msix, failback to io_apic
  1236. * @ioc: per adapter object
  1237. *
  1238. */
  1239. static int
  1240. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1241. {
  1242. struct msix_entry *entries, *a;
  1243. int r;
  1244. int i;
  1245. u8 try_msix = 0;
  1246. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1247. if (msix_disable == -1 || msix_disable == 0)
  1248. try_msix = 1;
  1249. if (!try_msix)
  1250. goto try_ioapic;
  1251. if (_base_check_enable_msix(ioc) != 0)
  1252. goto try_ioapic;
  1253. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1254. ioc->msix_vector_count);
  1255. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1256. GFP_KERNEL);
  1257. if (!entries) {
  1258. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1259. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1260. __LINE__, __func__));
  1261. goto try_ioapic;
  1262. }
  1263. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1264. a->entry = i;
  1265. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1266. if (r) {
  1267. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1268. "failed (r=%d) !!!\n", ioc->name, r));
  1269. kfree(entries);
  1270. goto try_ioapic;
  1271. }
  1272. ioc->msix_enable = 1;
  1273. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1274. r = _base_request_irq(ioc, i, a->vector);
  1275. if (r) {
  1276. _base_free_irq(ioc);
  1277. _base_disable_msix(ioc);
  1278. kfree(entries);
  1279. goto try_ioapic;
  1280. }
  1281. }
  1282. kfree(entries);
  1283. return 0;
  1284. /* failback to io_apic interrupt routing */
  1285. try_ioapic:
  1286. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1287. return r;
  1288. }
  1289. /**
  1290. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1291. * @ioc: per adapter object
  1292. *
  1293. * Returns 0 for success, non-zero for failure.
  1294. */
  1295. int
  1296. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1297. {
  1298. struct pci_dev *pdev = ioc->pdev;
  1299. u32 memap_sz;
  1300. u32 pio_sz;
  1301. int i, r = 0;
  1302. u64 pio_chip = 0;
  1303. u64 chip_phys = 0;
  1304. struct adapter_reply_queue *reply_q;
  1305. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1306. ioc->name, __func__));
  1307. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1308. if (pci_enable_device_mem(pdev)) {
  1309. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1310. "failed\n", ioc->name);
  1311. return -ENODEV;
  1312. }
  1313. if (pci_request_selected_regions(pdev, ioc->bars,
  1314. MPT2SAS_DRIVER_NAME)) {
  1315. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1316. "failed\n", ioc->name);
  1317. r = -ENODEV;
  1318. goto out_fail;
  1319. }
  1320. /* AER (Advanced Error Reporting) hooks */
  1321. pci_enable_pcie_error_reporting(pdev);
  1322. pci_set_master(pdev);
  1323. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1324. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1325. ioc->name, pci_name(pdev));
  1326. r = -ENODEV;
  1327. goto out_fail;
  1328. }
  1329. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1330. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1331. if (pio_sz)
  1332. continue;
  1333. pio_chip = (u64)pci_resource_start(pdev, i);
  1334. pio_sz = pci_resource_len(pdev, i);
  1335. } else {
  1336. if (memap_sz)
  1337. continue;
  1338. /* verify memory resource is valid before using */
  1339. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1340. ioc->chip_phys = pci_resource_start(pdev, i);
  1341. chip_phys = (u64)ioc->chip_phys;
  1342. memap_sz = pci_resource_len(pdev, i);
  1343. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1344. if (ioc->chip == NULL) {
  1345. printk(MPT2SAS_ERR_FMT "unable to map "
  1346. "adapter memory!\n", ioc->name);
  1347. r = -EINVAL;
  1348. goto out_fail;
  1349. }
  1350. }
  1351. }
  1352. }
  1353. _base_mask_interrupts(ioc);
  1354. r = _base_enable_msix(ioc);
  1355. if (r)
  1356. goto out_fail;
  1357. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1358. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1359. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1360. "IO-APIC enabled"), reply_q->vector);
  1361. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1362. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1363. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1364. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1365. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1366. pci_save_state(pdev);
  1367. return 0;
  1368. out_fail:
  1369. if (ioc->chip_phys)
  1370. iounmap(ioc->chip);
  1371. ioc->chip_phys = 0;
  1372. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1373. pci_disable_pcie_error_reporting(pdev);
  1374. pci_disable_device(pdev);
  1375. return r;
  1376. }
  1377. /**
  1378. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1379. * @ioc: per adapter object
  1380. * @smid: system request message index(smid zero is invalid)
  1381. *
  1382. * Returns virt pointer to message frame.
  1383. */
  1384. void *
  1385. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1386. {
  1387. return (void *)(ioc->request + (smid * ioc->request_sz));
  1388. }
  1389. /**
  1390. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1391. * @ioc: per adapter object
  1392. * @smid: system request message index
  1393. *
  1394. * Returns virt pointer to sense buffer.
  1395. */
  1396. void *
  1397. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1398. {
  1399. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1400. }
  1401. /**
  1402. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1403. * @ioc: per adapter object
  1404. * @smid: system request message index
  1405. *
  1406. * Returns phys pointer to the low 32bit address of the sense buffer.
  1407. */
  1408. __le32
  1409. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1410. {
  1411. return cpu_to_le32(ioc->sense_dma +
  1412. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1413. }
  1414. /**
  1415. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1416. * @ioc: per adapter object
  1417. * @phys_addr: lower 32 physical addr of the reply
  1418. *
  1419. * Converts 32bit lower physical addr into a virt address.
  1420. */
  1421. void *
  1422. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1423. {
  1424. if (!phys_addr)
  1425. return NULL;
  1426. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1427. }
  1428. /**
  1429. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1430. * @ioc: per adapter object
  1431. * @cb_idx: callback index
  1432. *
  1433. * Returns smid (zero is invalid)
  1434. */
  1435. u16
  1436. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1437. {
  1438. unsigned long flags;
  1439. struct request_tracker *request;
  1440. u16 smid;
  1441. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1442. if (list_empty(&ioc->internal_free_list)) {
  1443. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1444. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1445. ioc->name, __func__);
  1446. return 0;
  1447. }
  1448. request = list_entry(ioc->internal_free_list.next,
  1449. struct request_tracker, tracker_list);
  1450. request->cb_idx = cb_idx;
  1451. smid = request->smid;
  1452. list_del(&request->tracker_list);
  1453. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1454. return smid;
  1455. }
  1456. /**
  1457. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1458. * @ioc: per adapter object
  1459. * @cb_idx: callback index
  1460. * @scmd: pointer to scsi command object
  1461. *
  1462. * Returns smid (zero is invalid)
  1463. */
  1464. u16
  1465. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1466. struct scsi_cmnd *scmd)
  1467. {
  1468. unsigned long flags;
  1469. struct scsiio_tracker *request;
  1470. u16 smid;
  1471. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1472. if (list_empty(&ioc->free_list)) {
  1473. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1474. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1475. ioc->name, __func__);
  1476. return 0;
  1477. }
  1478. request = list_entry(ioc->free_list.next,
  1479. struct scsiio_tracker, tracker_list);
  1480. request->scmd = scmd;
  1481. request->cb_idx = cb_idx;
  1482. smid = request->smid;
  1483. list_del(&request->tracker_list);
  1484. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1485. return smid;
  1486. }
  1487. /**
  1488. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1489. * @ioc: per adapter object
  1490. * @cb_idx: callback index
  1491. *
  1492. * Returns smid (zero is invalid)
  1493. */
  1494. u16
  1495. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1496. {
  1497. unsigned long flags;
  1498. struct request_tracker *request;
  1499. u16 smid;
  1500. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1501. if (list_empty(&ioc->hpr_free_list)) {
  1502. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1503. return 0;
  1504. }
  1505. request = list_entry(ioc->hpr_free_list.next,
  1506. struct request_tracker, tracker_list);
  1507. request->cb_idx = cb_idx;
  1508. smid = request->smid;
  1509. list_del(&request->tracker_list);
  1510. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1511. return smid;
  1512. }
  1513. /**
  1514. * mpt2sas_base_free_smid - put smid back on free_list
  1515. * @ioc: per adapter object
  1516. * @smid: system request message index
  1517. *
  1518. * Return nothing.
  1519. */
  1520. void
  1521. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1522. {
  1523. unsigned long flags;
  1524. int i;
  1525. struct chain_tracker *chain_req, *next;
  1526. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1527. if (smid < ioc->hi_priority_smid) {
  1528. /* scsiio queue */
  1529. i = smid - 1;
  1530. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1531. list_for_each_entry_safe(chain_req, next,
  1532. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1533. list_del_init(&chain_req->tracker_list);
  1534. list_add_tail(&chain_req->tracker_list,
  1535. &ioc->free_chain_list);
  1536. }
  1537. }
  1538. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1539. ioc->scsi_lookup[i].scmd = NULL;
  1540. ioc->scsi_lookup[i].direct_io = 0;
  1541. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1542. &ioc->free_list);
  1543. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1544. /*
  1545. * See _wait_for_commands_to_complete() call with regards
  1546. * to this code.
  1547. */
  1548. if (ioc->shost_recovery && ioc->pending_io_count) {
  1549. if (ioc->pending_io_count == 1)
  1550. wake_up(&ioc->reset_wq);
  1551. ioc->pending_io_count--;
  1552. }
  1553. return;
  1554. } else if (smid < ioc->internal_smid) {
  1555. /* hi-priority */
  1556. i = smid - ioc->hi_priority_smid;
  1557. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1558. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1559. &ioc->hpr_free_list);
  1560. } else if (smid <= ioc->hba_queue_depth) {
  1561. /* internal queue */
  1562. i = smid - ioc->internal_smid;
  1563. ioc->internal_lookup[i].cb_idx = 0xFF;
  1564. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1565. &ioc->internal_free_list);
  1566. }
  1567. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1568. }
  1569. /**
  1570. * _base_writeq - 64 bit write to MMIO
  1571. * @ioc: per adapter object
  1572. * @b: data payload
  1573. * @addr: address in MMIO space
  1574. * @writeq_lock: spin lock
  1575. *
  1576. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1577. * care of 32 bit environment where its not quarenteed to send the entire word
  1578. * in one transfer.
  1579. */
  1580. #ifndef writeq
  1581. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1582. spinlock_t *writeq_lock)
  1583. {
  1584. unsigned long flags;
  1585. __u64 data_out = cpu_to_le64(b);
  1586. spin_lock_irqsave(writeq_lock, flags);
  1587. writel((u32)(data_out), addr);
  1588. writel((u32)(data_out >> 32), (addr + 4));
  1589. spin_unlock_irqrestore(writeq_lock, flags);
  1590. }
  1591. #else
  1592. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1593. spinlock_t *writeq_lock)
  1594. {
  1595. writeq(cpu_to_le64(b), addr);
  1596. }
  1597. #endif
  1598. static inline u8
  1599. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1600. {
  1601. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1602. }
  1603. /**
  1604. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1605. * @ioc: per adapter object
  1606. * @smid: system request message index
  1607. * @handle: device handle
  1608. *
  1609. * Return nothing.
  1610. */
  1611. void
  1612. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1613. {
  1614. Mpi2RequestDescriptorUnion_t descriptor;
  1615. u64 *request = (u64 *)&descriptor;
  1616. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1617. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1618. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1619. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1620. descriptor.SCSIIO.LMID = 0;
  1621. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1622. &ioc->scsi_lookup_lock);
  1623. }
  1624. /**
  1625. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1626. * @ioc: per adapter object
  1627. * @smid: system request message index
  1628. *
  1629. * Return nothing.
  1630. */
  1631. void
  1632. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1633. {
  1634. Mpi2RequestDescriptorUnion_t descriptor;
  1635. u64 *request = (u64 *)&descriptor;
  1636. descriptor.HighPriority.RequestFlags =
  1637. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1638. descriptor.HighPriority.MSIxIndex = 0;
  1639. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1640. descriptor.HighPriority.LMID = 0;
  1641. descriptor.HighPriority.Reserved1 = 0;
  1642. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1643. &ioc->scsi_lookup_lock);
  1644. }
  1645. /**
  1646. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1647. * @ioc: per adapter object
  1648. * @smid: system request message index
  1649. *
  1650. * Return nothing.
  1651. */
  1652. void
  1653. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1654. {
  1655. Mpi2RequestDescriptorUnion_t descriptor;
  1656. u64 *request = (u64 *)&descriptor;
  1657. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1658. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1659. descriptor.Default.SMID = cpu_to_le16(smid);
  1660. descriptor.Default.LMID = 0;
  1661. descriptor.Default.DescriptorTypeDependent = 0;
  1662. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1663. &ioc->scsi_lookup_lock);
  1664. }
  1665. /**
  1666. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1667. * @ioc: per adapter object
  1668. * @smid: system request message index
  1669. * @io_index: value used to track the IO
  1670. *
  1671. * Return nothing.
  1672. */
  1673. void
  1674. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1675. u16 io_index)
  1676. {
  1677. Mpi2RequestDescriptorUnion_t descriptor;
  1678. u64 *request = (u64 *)&descriptor;
  1679. descriptor.SCSITarget.RequestFlags =
  1680. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1681. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1682. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1683. descriptor.SCSITarget.LMID = 0;
  1684. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1685. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1686. &ioc->scsi_lookup_lock);
  1687. }
  1688. /**
  1689. * _base_display_dell_branding - Disply branding string
  1690. * @ioc: per adapter object
  1691. *
  1692. * Return nothing.
  1693. */
  1694. static void
  1695. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1696. {
  1697. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1698. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1699. return;
  1700. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1701. switch (ioc->pdev->subsystem_device) {
  1702. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1703. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1704. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1705. break;
  1706. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1707. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1708. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1709. break;
  1710. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1711. strncpy(dell_branding,
  1712. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1713. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1714. break;
  1715. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1716. strncpy(dell_branding,
  1717. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1718. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1719. break;
  1720. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1721. strncpy(dell_branding,
  1722. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1723. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1724. break;
  1725. case MPT2SAS_DELL_PERC_H200_SSDID:
  1726. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1727. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1728. break;
  1729. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1730. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1731. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1732. break;
  1733. default:
  1734. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1735. break;
  1736. }
  1737. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1738. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1739. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1740. ioc->pdev->subsystem_device);
  1741. }
  1742. /**
  1743. * _base_display_intel_branding - Display branding string
  1744. * @ioc: per adapter object
  1745. *
  1746. * Return nothing.
  1747. */
  1748. static void
  1749. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1750. {
  1751. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1752. return;
  1753. switch (ioc->pdev->device) {
  1754. case MPI2_MFGPAGE_DEVID_SAS2008:
  1755. switch (ioc->pdev->subsystem_device) {
  1756. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1757. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1758. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1759. break;
  1760. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1761. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1762. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1763. break;
  1764. case MPT2SAS_INTEL_RAMSDALE_SSDID:
  1765. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1766. MPT2SAS_INTEL_RAMSDALE_BRANDING);
  1767. break;
  1768. default:
  1769. break;
  1770. }
  1771. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1772. switch (ioc->pdev->subsystem_device) {
  1773. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1774. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1775. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1776. break;
  1777. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1778. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1779. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1780. break;
  1781. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1782. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1783. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1784. break;
  1785. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1786. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1787. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1788. break;
  1789. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1790. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1791. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1792. break;
  1793. default:
  1794. break;
  1795. }
  1796. default:
  1797. break;
  1798. }
  1799. }
  1800. /**
  1801. * _base_display_hp_branding - Display branding string
  1802. * @ioc: per adapter object
  1803. *
  1804. * Return nothing.
  1805. */
  1806. static void
  1807. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1808. {
  1809. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1810. return;
  1811. switch (ioc->pdev->device) {
  1812. case MPI2_MFGPAGE_DEVID_SAS2004:
  1813. switch (ioc->pdev->subsystem_device) {
  1814. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1815. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1816. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1817. break;
  1818. default:
  1819. break;
  1820. }
  1821. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1822. switch (ioc->pdev->subsystem_device) {
  1823. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1824. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1825. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1826. break;
  1827. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1828. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1829. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1830. break;
  1831. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1832. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1833. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1834. break;
  1835. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1836. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1837. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1838. break;
  1839. default:
  1840. break;
  1841. }
  1842. default:
  1843. break;
  1844. }
  1845. }
  1846. /**
  1847. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1848. * @ioc: per adapter object
  1849. *
  1850. * Return nothing.
  1851. */
  1852. static void
  1853. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1854. {
  1855. int i = 0;
  1856. char desc[16];
  1857. u32 iounit_pg1_flags;
  1858. u32 bios_version;
  1859. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1860. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1861. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1862. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1863. ioc->name, desc,
  1864. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1865. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1866. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1867. ioc->facts.FWVersion.Word & 0x000000FF,
  1868. ioc->pdev->revision,
  1869. (bios_version & 0xFF000000) >> 24,
  1870. (bios_version & 0x00FF0000) >> 16,
  1871. (bios_version & 0x0000FF00) >> 8,
  1872. bios_version & 0x000000FF);
  1873. _base_display_dell_branding(ioc);
  1874. _base_display_intel_branding(ioc);
  1875. _base_display_hp_branding(ioc);
  1876. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1877. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1878. printk("Initiator");
  1879. i++;
  1880. }
  1881. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1882. printk("%sTarget", i ? "," : "");
  1883. i++;
  1884. }
  1885. i = 0;
  1886. printk("), ");
  1887. printk("Capabilities=(");
  1888. if (!ioc->hide_ir_msg) {
  1889. if (ioc->facts.IOCCapabilities &
  1890. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1891. printk("Raid");
  1892. i++;
  1893. }
  1894. }
  1895. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1896. printk("%sTLR", i ? "," : "");
  1897. i++;
  1898. }
  1899. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1900. printk("%sMulticast", i ? "," : "");
  1901. i++;
  1902. }
  1903. if (ioc->facts.IOCCapabilities &
  1904. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1905. printk("%sBIDI Target", i ? "," : "");
  1906. i++;
  1907. }
  1908. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1909. printk("%sEEDP", i ? "," : "");
  1910. i++;
  1911. }
  1912. if (ioc->facts.IOCCapabilities &
  1913. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1914. printk("%sSnapshot Buffer", i ? "," : "");
  1915. i++;
  1916. }
  1917. if (ioc->facts.IOCCapabilities &
  1918. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1919. printk("%sDiag Trace Buffer", i ? "," : "");
  1920. i++;
  1921. }
  1922. if (ioc->facts.IOCCapabilities &
  1923. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1924. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1925. i++;
  1926. }
  1927. if (ioc->facts.IOCCapabilities &
  1928. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1929. printk("%sTask Set Full", i ? "," : "");
  1930. i++;
  1931. }
  1932. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1933. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1934. printk("%sNCQ", i ? "," : "");
  1935. i++;
  1936. }
  1937. printk(")\n");
  1938. }
  1939. /**
  1940. * mpt2sas_base_update_missing_delay - change the missing delay timers
  1941. * @ioc: per adapter object
  1942. * @device_missing_delay: amount of time till device is reported missing
  1943. * @io_missing_delay: interval IO is returned when there is a missing device
  1944. *
  1945. * Return nothing.
  1946. *
  1947. * Passed on the command line, this function will modify the device missing
  1948. * delay, as well as the io missing delay. This should be called at driver
  1949. * load time.
  1950. */
  1951. void
  1952. mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1953. u16 device_missing_delay, u8 io_missing_delay)
  1954. {
  1955. u16 dmd, dmd_new, dmd_orignal;
  1956. u8 io_missing_delay_original;
  1957. u16 sz;
  1958. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1959. Mpi2ConfigReply_t mpi_reply;
  1960. u8 num_phys = 0;
  1961. u16 ioc_status;
  1962. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1963. if (!num_phys)
  1964. return;
  1965. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1966. sizeof(Mpi2SasIOUnit1PhyData_t));
  1967. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1968. if (!sas_iounit_pg1) {
  1969. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1970. ioc->name, __FILE__, __LINE__, __func__);
  1971. goto out;
  1972. }
  1973. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1974. sas_iounit_pg1, sz))) {
  1975. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1976. ioc->name, __FILE__, __LINE__, __func__);
  1977. goto out;
  1978. }
  1979. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1980. MPI2_IOCSTATUS_MASK;
  1981. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1982. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1983. ioc->name, __FILE__, __LINE__, __func__);
  1984. goto out;
  1985. }
  1986. /* device missing delay */
  1987. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1988. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1989. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1990. else
  1991. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1992. dmd_orignal = dmd;
  1993. if (device_missing_delay > 0x7F) {
  1994. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1995. device_missing_delay;
  1996. dmd = dmd / 16;
  1997. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1998. } else
  1999. dmd = device_missing_delay;
  2000. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2001. /* io missing delay */
  2002. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2003. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2004. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2005. sz)) {
  2006. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2007. dmd_new = (dmd &
  2008. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2009. else
  2010. dmd_new =
  2011. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2012. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2013. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2014. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2015. "new(%d)\n", ioc->name, io_missing_delay_original,
  2016. io_missing_delay);
  2017. ioc->device_missing_delay = dmd_new;
  2018. ioc->io_missing_delay = io_missing_delay;
  2019. }
  2020. out:
  2021. kfree(sas_iounit_pg1);
  2022. }
  2023. /**
  2024. * _base_static_config_pages - static start of day config pages
  2025. * @ioc: per adapter object
  2026. *
  2027. * Return nothing.
  2028. */
  2029. static void
  2030. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2031. {
  2032. Mpi2ConfigReply_t mpi_reply;
  2033. u32 iounit_pg1_flags;
  2034. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2035. if (ioc->ir_firmware)
  2036. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2037. &ioc->manu_pg10);
  2038. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2039. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2040. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2041. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2042. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2043. _base_display_ioc_capabilities(ioc);
  2044. /*
  2045. * Enable task_set_full handling in iounit_pg1 when the
  2046. * facts capabilities indicate that its supported.
  2047. */
  2048. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2049. if ((ioc->facts.IOCCapabilities &
  2050. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2051. iounit_pg1_flags &=
  2052. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2053. else
  2054. iounit_pg1_flags |=
  2055. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2056. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2057. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2058. }
  2059. /**
  2060. * _base_release_memory_pools - release memory
  2061. * @ioc: per adapter object
  2062. *
  2063. * Free memory allocated from _base_allocate_memory_pools.
  2064. *
  2065. * Return nothing.
  2066. */
  2067. static void
  2068. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2069. {
  2070. int i;
  2071. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2072. __func__));
  2073. if (ioc->request) {
  2074. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2075. ioc->request, ioc->request_dma);
  2076. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2077. ": free\n", ioc->name, ioc->request));
  2078. ioc->request = NULL;
  2079. }
  2080. if (ioc->sense) {
  2081. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2082. if (ioc->sense_dma_pool)
  2083. pci_pool_destroy(ioc->sense_dma_pool);
  2084. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2085. ": free\n", ioc->name, ioc->sense));
  2086. ioc->sense = NULL;
  2087. }
  2088. if (ioc->reply) {
  2089. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2090. if (ioc->reply_dma_pool)
  2091. pci_pool_destroy(ioc->reply_dma_pool);
  2092. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2093. ": free\n", ioc->name, ioc->reply));
  2094. ioc->reply = NULL;
  2095. }
  2096. if (ioc->reply_free) {
  2097. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2098. ioc->reply_free_dma);
  2099. if (ioc->reply_free_dma_pool)
  2100. pci_pool_destroy(ioc->reply_free_dma_pool);
  2101. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2102. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2103. ioc->reply_free = NULL;
  2104. }
  2105. if (ioc->reply_post_free) {
  2106. pci_pool_free(ioc->reply_post_free_dma_pool,
  2107. ioc->reply_post_free, ioc->reply_post_free_dma);
  2108. if (ioc->reply_post_free_dma_pool)
  2109. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2110. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2111. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2112. ioc->reply_post_free));
  2113. ioc->reply_post_free = NULL;
  2114. }
  2115. if (ioc->config_page) {
  2116. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2117. "config_page(0x%p): free\n", ioc->name,
  2118. ioc->config_page));
  2119. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2120. ioc->config_page, ioc->config_page_dma);
  2121. }
  2122. if (ioc->scsi_lookup) {
  2123. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2124. ioc->scsi_lookup = NULL;
  2125. }
  2126. kfree(ioc->hpr_lookup);
  2127. kfree(ioc->internal_lookup);
  2128. if (ioc->chain_lookup) {
  2129. for (i = 0; i < ioc->chain_depth; i++) {
  2130. if (ioc->chain_lookup[i].chain_buffer)
  2131. pci_pool_free(ioc->chain_dma_pool,
  2132. ioc->chain_lookup[i].chain_buffer,
  2133. ioc->chain_lookup[i].chain_buffer_dma);
  2134. }
  2135. if (ioc->chain_dma_pool)
  2136. pci_pool_destroy(ioc->chain_dma_pool);
  2137. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2138. ioc->chain_lookup = NULL;
  2139. }
  2140. }
  2141. /**
  2142. * _base_allocate_memory_pools - allocate start of day memory pools
  2143. * @ioc: per adapter object
  2144. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2145. *
  2146. * Returns 0 success, anything else error
  2147. */
  2148. static int
  2149. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2150. {
  2151. struct mpt2sas_facts *facts;
  2152. u16 max_sge_elements;
  2153. u16 chains_needed_per_io;
  2154. u32 sz, total_sz, reply_post_free_sz;
  2155. u32 retry_sz;
  2156. u16 max_request_credit;
  2157. int i;
  2158. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2159. __func__));
  2160. retry_sz = 0;
  2161. facts = &ioc->facts;
  2162. /* command line tunables for max sgl entries */
  2163. if (max_sgl_entries != -1) {
  2164. ioc->shost->sg_tablesize = (max_sgl_entries <
  2165. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2166. MPT2SAS_SG_DEPTH;
  2167. } else {
  2168. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2169. }
  2170. /* command line tunables for max controller queue depth */
  2171. if (max_queue_depth != -1 && max_queue_depth != 0) {
  2172. max_request_credit = min_t(u16, max_queue_depth +
  2173. ioc->hi_priority_depth + ioc->internal_depth,
  2174. facts->RequestCredit);
  2175. if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
  2176. max_request_credit = MAX_HBA_QUEUE_DEPTH;
  2177. } else
  2178. max_request_credit = min_t(u16, facts->RequestCredit,
  2179. MAX_HBA_QUEUE_DEPTH);
  2180. ioc->hba_queue_depth = max_request_credit;
  2181. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2182. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2183. /* request frame size */
  2184. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2185. /* reply frame size */
  2186. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2187. retry_allocation:
  2188. total_sz = 0;
  2189. /* calculate number of sg elements left over in the 1st frame */
  2190. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2191. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2192. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2193. /* now do the same for a chain buffer */
  2194. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2195. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2196. ioc->chain_offset_value_for_main_message =
  2197. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2198. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2199. /*
  2200. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2201. */
  2202. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2203. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2204. + 1;
  2205. if (chains_needed_per_io > facts->MaxChainDepth) {
  2206. chains_needed_per_io = facts->MaxChainDepth;
  2207. ioc->shost->sg_tablesize = min_t(u16,
  2208. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2209. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2210. }
  2211. ioc->chains_needed_per_io = chains_needed_per_io;
  2212. /* reply free queue sizing - taking into account for 64 FW events */
  2213. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2214. /* align the reply post queue on the next 16 count boundary */
  2215. if (!ioc->reply_free_queue_depth % 16)
  2216. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
  2217. else
  2218. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
  2219. 32 - (ioc->reply_free_queue_depth % 16);
  2220. if (ioc->reply_post_queue_depth >
  2221. facts->MaxReplyDescriptorPostQueueDepth) {
  2222. ioc->reply_post_queue_depth = min_t(u16,
  2223. (facts->MaxReplyDescriptorPostQueueDepth -
  2224. (facts->MaxReplyDescriptorPostQueueDepth % 16)),
  2225. (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
  2226. ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
  2227. ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
  2228. }
  2229. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2230. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2231. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2232. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2233. ioc->chains_needed_per_io));
  2234. ioc->scsiio_depth = ioc->hba_queue_depth -
  2235. ioc->hi_priority_depth - ioc->internal_depth;
  2236. /* set the scsi host can_queue depth
  2237. * with some internal commands that could be outstanding
  2238. */
  2239. ioc->shost->can_queue = ioc->scsiio_depth;
  2240. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2241. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2242. /* contiguous pool for request and chains, 16 byte align, one extra "
  2243. * "frame for smid=0
  2244. */
  2245. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2246. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2247. /* hi-priority queue */
  2248. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2249. /* internal queue */
  2250. sz += (ioc->internal_depth * ioc->request_sz);
  2251. ioc->request_dma_sz = sz;
  2252. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2253. if (!ioc->request) {
  2254. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2255. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2256. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2257. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2258. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2259. goto out;
  2260. retry_sz += 64;
  2261. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2262. goto retry_allocation;
  2263. }
  2264. if (retry_sz)
  2265. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2266. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2267. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2268. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2269. /* hi-priority queue */
  2270. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2271. ioc->request_sz);
  2272. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2273. ioc->request_sz);
  2274. /* internal queue */
  2275. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2276. ioc->request_sz);
  2277. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2278. ioc->request_sz);
  2279. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2280. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2281. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2282. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2283. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2284. ioc->name, (unsigned long long) ioc->request_dma));
  2285. total_sz += sz;
  2286. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2287. ioc->scsi_lookup_pages = get_order(sz);
  2288. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2289. GFP_KERNEL, ioc->scsi_lookup_pages);
  2290. if (!ioc->scsi_lookup) {
  2291. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2292. "sz(%d)\n", ioc->name, (int)sz);
  2293. goto out;
  2294. }
  2295. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2296. "depth(%d)\n", ioc->name, ioc->request,
  2297. ioc->scsiio_depth));
  2298. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2299. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2300. ioc->chain_pages = get_order(sz);
  2301. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2302. GFP_KERNEL, ioc->chain_pages);
  2303. if (!ioc->chain_lookup) {
  2304. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2305. "sz(%d)\n", ioc->name, (int)sz);
  2306. goto out;
  2307. }
  2308. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2309. ioc->request_sz, 16, 0);
  2310. if (!ioc->chain_dma_pool) {
  2311. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2312. "failed\n", ioc->name);
  2313. goto out;
  2314. }
  2315. for (i = 0; i < ioc->chain_depth; i++) {
  2316. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2317. ioc->chain_dma_pool , GFP_KERNEL,
  2318. &ioc->chain_lookup[i].chain_buffer_dma);
  2319. if (!ioc->chain_lookup[i].chain_buffer) {
  2320. ioc->chain_depth = i;
  2321. goto chain_done;
  2322. }
  2323. total_sz += ioc->request_sz;
  2324. }
  2325. chain_done:
  2326. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2327. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2328. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2329. ioc->request_sz))/1024));
  2330. /* initialize hi-priority queue smid's */
  2331. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2332. sizeof(struct request_tracker), GFP_KERNEL);
  2333. if (!ioc->hpr_lookup) {
  2334. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2335. ioc->name);
  2336. goto out;
  2337. }
  2338. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2339. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2340. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2341. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2342. /* initialize internal queue smid's */
  2343. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2344. sizeof(struct request_tracker), GFP_KERNEL);
  2345. if (!ioc->internal_lookup) {
  2346. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2347. ioc->name);
  2348. goto out;
  2349. }
  2350. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2351. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2352. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2353. ioc->internal_depth, ioc->internal_smid));
  2354. /* sense buffers, 4 byte align */
  2355. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2356. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2357. 0);
  2358. if (!ioc->sense_dma_pool) {
  2359. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2360. ioc->name);
  2361. goto out;
  2362. }
  2363. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2364. &ioc->sense_dma);
  2365. if (!ioc->sense) {
  2366. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2367. ioc->name);
  2368. goto out;
  2369. }
  2370. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2371. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2372. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2373. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2374. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2375. ioc->name, (unsigned long long)ioc->sense_dma));
  2376. total_sz += sz;
  2377. /* reply pool, 4 byte align */
  2378. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2379. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2380. 0);
  2381. if (!ioc->reply_dma_pool) {
  2382. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2383. ioc->name);
  2384. goto out;
  2385. }
  2386. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2387. &ioc->reply_dma);
  2388. if (!ioc->reply) {
  2389. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2390. ioc->name);
  2391. goto out;
  2392. }
  2393. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2394. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2395. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2396. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2397. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2398. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2399. ioc->name, (unsigned long long)ioc->reply_dma));
  2400. total_sz += sz;
  2401. /* reply free queue, 16 byte align */
  2402. sz = ioc->reply_free_queue_depth * 4;
  2403. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2404. ioc->pdev, sz, 16, 0);
  2405. if (!ioc->reply_free_dma_pool) {
  2406. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2407. "failed\n", ioc->name);
  2408. goto out;
  2409. }
  2410. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2411. &ioc->reply_free_dma);
  2412. if (!ioc->reply_free) {
  2413. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2414. "failed\n", ioc->name);
  2415. goto out;
  2416. }
  2417. memset(ioc->reply_free, 0, sz);
  2418. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2419. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2420. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2421. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2422. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2423. total_sz += sz;
  2424. /* reply post queue, 16 byte align */
  2425. reply_post_free_sz = ioc->reply_post_queue_depth *
  2426. sizeof(Mpi2DefaultReplyDescriptor_t);
  2427. if (_base_is_controller_msix_enabled(ioc))
  2428. sz = reply_post_free_sz * ioc->reply_queue_count;
  2429. else
  2430. sz = reply_post_free_sz;
  2431. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2432. ioc->pdev, sz, 16, 0);
  2433. if (!ioc->reply_post_free_dma_pool) {
  2434. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2435. "failed\n", ioc->name);
  2436. goto out;
  2437. }
  2438. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2439. GFP_KERNEL, &ioc->reply_post_free_dma);
  2440. if (!ioc->reply_post_free) {
  2441. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2442. "failed\n", ioc->name);
  2443. goto out;
  2444. }
  2445. memset(ioc->reply_post_free, 0, sz);
  2446. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2447. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2448. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2449. sz/1024));
  2450. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2451. "(0x%llx)\n", ioc->name, (unsigned long long)
  2452. ioc->reply_post_free_dma));
  2453. total_sz += sz;
  2454. ioc->config_page_sz = 512;
  2455. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2456. ioc->config_page_sz, &ioc->config_page_dma);
  2457. if (!ioc->config_page) {
  2458. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2459. "failed\n", ioc->name);
  2460. goto out;
  2461. }
  2462. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2463. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2464. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2465. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2466. total_sz += ioc->config_page_sz;
  2467. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2468. ioc->name, total_sz/1024);
  2469. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2470. "Max Controller Queue Depth(%d)\n",
  2471. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2472. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2473. ioc->name, ioc->shost->sg_tablesize);
  2474. return 0;
  2475. out:
  2476. return -ENOMEM;
  2477. }
  2478. /**
  2479. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2480. * @ioc: Pointer to MPT_ADAPTER structure
  2481. * @cooked: Request raw or cooked IOC state
  2482. *
  2483. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2484. * Doorbell bits in MPI_IOC_STATE_MASK.
  2485. */
  2486. u32
  2487. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2488. {
  2489. u32 s, sc;
  2490. s = readl(&ioc->chip->Doorbell);
  2491. sc = s & MPI2_IOC_STATE_MASK;
  2492. return cooked ? sc : s;
  2493. }
  2494. /**
  2495. * _base_wait_on_iocstate - waiting on a particular ioc state
  2496. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2497. * @timeout: timeout in second
  2498. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2499. *
  2500. * Returns 0 for success, non-zero for failure.
  2501. */
  2502. static int
  2503. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2504. int sleep_flag)
  2505. {
  2506. u32 count, cntdn;
  2507. u32 current_state;
  2508. count = 0;
  2509. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2510. do {
  2511. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2512. if (current_state == ioc_state)
  2513. return 0;
  2514. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2515. break;
  2516. if (sleep_flag == CAN_SLEEP)
  2517. msleep(1);
  2518. else
  2519. udelay(500);
  2520. count++;
  2521. } while (--cntdn);
  2522. return current_state;
  2523. }
  2524. /**
  2525. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2526. * a write to the doorbell)
  2527. * @ioc: per adapter object
  2528. * @timeout: timeout in second
  2529. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2530. *
  2531. * Returns 0 for success, non-zero for failure.
  2532. *
  2533. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2534. */
  2535. static int
  2536. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2537. int sleep_flag)
  2538. {
  2539. u32 cntdn, count;
  2540. u32 int_status;
  2541. count = 0;
  2542. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2543. do {
  2544. int_status = readl(&ioc->chip->HostInterruptStatus);
  2545. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2546. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2547. "successful count(%d), timeout(%d)\n", ioc->name,
  2548. __func__, count, timeout));
  2549. return 0;
  2550. }
  2551. if (sleep_flag == CAN_SLEEP)
  2552. msleep(1);
  2553. else
  2554. udelay(500);
  2555. count++;
  2556. } while (--cntdn);
  2557. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2558. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2559. return -EFAULT;
  2560. }
  2561. /**
  2562. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2563. * @ioc: per adapter object
  2564. * @timeout: timeout in second
  2565. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2566. *
  2567. * Returns 0 for success, non-zero for failure.
  2568. *
  2569. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2570. * doorbell.
  2571. */
  2572. static int
  2573. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2574. int sleep_flag)
  2575. {
  2576. u32 cntdn, count;
  2577. u32 int_status;
  2578. u32 doorbell;
  2579. count = 0;
  2580. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2581. do {
  2582. int_status = readl(&ioc->chip->HostInterruptStatus);
  2583. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2584. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2585. "successful count(%d), timeout(%d)\n", ioc->name,
  2586. __func__, count, timeout));
  2587. return 0;
  2588. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2589. doorbell = readl(&ioc->chip->Doorbell);
  2590. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2591. MPI2_IOC_STATE_FAULT) {
  2592. mpt2sas_base_fault_info(ioc , doorbell);
  2593. return -EFAULT;
  2594. }
  2595. } else if (int_status == 0xFFFFFFFF)
  2596. goto out;
  2597. if (sleep_flag == CAN_SLEEP)
  2598. msleep(1);
  2599. else
  2600. udelay(500);
  2601. count++;
  2602. } while (--cntdn);
  2603. out:
  2604. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2605. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2606. return -EFAULT;
  2607. }
  2608. /**
  2609. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2610. * @ioc: per adapter object
  2611. * @timeout: timeout in second
  2612. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2613. *
  2614. * Returns 0 for success, non-zero for failure.
  2615. *
  2616. */
  2617. static int
  2618. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2619. int sleep_flag)
  2620. {
  2621. u32 cntdn, count;
  2622. u32 doorbell_reg;
  2623. count = 0;
  2624. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2625. do {
  2626. doorbell_reg = readl(&ioc->chip->Doorbell);
  2627. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2628. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2629. "successful count(%d), timeout(%d)\n", ioc->name,
  2630. __func__, count, timeout));
  2631. return 0;
  2632. }
  2633. if (sleep_flag == CAN_SLEEP)
  2634. msleep(1);
  2635. else
  2636. udelay(500);
  2637. count++;
  2638. } while (--cntdn);
  2639. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2640. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2641. return -EFAULT;
  2642. }
  2643. /**
  2644. * _base_send_ioc_reset - send doorbell reset
  2645. * @ioc: per adapter object
  2646. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2647. * @timeout: timeout in second
  2648. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2649. *
  2650. * Returns 0 for success, non-zero for failure.
  2651. */
  2652. static int
  2653. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2654. int sleep_flag)
  2655. {
  2656. u32 ioc_state;
  2657. int r = 0;
  2658. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2659. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2660. ioc->name, __func__);
  2661. return -EFAULT;
  2662. }
  2663. if (!(ioc->facts.IOCCapabilities &
  2664. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2665. return -EFAULT;
  2666. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2667. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2668. &ioc->chip->Doorbell);
  2669. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2670. r = -EFAULT;
  2671. goto out;
  2672. }
  2673. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2674. timeout, sleep_flag);
  2675. if (ioc_state) {
  2676. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2677. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2678. r = -EFAULT;
  2679. goto out;
  2680. }
  2681. out:
  2682. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2683. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2684. return r;
  2685. }
  2686. /**
  2687. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2688. * @ioc: per adapter object
  2689. * @request_bytes: request length
  2690. * @request: pointer having request payload
  2691. * @reply_bytes: reply length
  2692. * @reply: pointer to reply payload
  2693. * @timeout: timeout in second
  2694. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2695. *
  2696. * Returns 0 for success, non-zero for failure.
  2697. */
  2698. static int
  2699. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2700. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2701. {
  2702. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2703. int i;
  2704. u8 failed;
  2705. u16 dummy;
  2706. __le32 *mfp;
  2707. /* make sure doorbell is not in use */
  2708. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2709. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2710. " (line=%d)\n", ioc->name, __LINE__);
  2711. return -EFAULT;
  2712. }
  2713. /* clear pending doorbell interrupts from previous state changes */
  2714. if (readl(&ioc->chip->HostInterruptStatus) &
  2715. MPI2_HIS_IOC2SYS_DB_STATUS)
  2716. writel(0, &ioc->chip->HostInterruptStatus);
  2717. /* send message to ioc */
  2718. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2719. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2720. &ioc->chip->Doorbell);
  2721. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2722. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2723. "int failed (line=%d)\n", ioc->name, __LINE__);
  2724. return -EFAULT;
  2725. }
  2726. writel(0, &ioc->chip->HostInterruptStatus);
  2727. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2728. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2729. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2730. return -EFAULT;
  2731. }
  2732. /* send message 32-bits at a time */
  2733. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2734. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2735. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2736. failed = 1;
  2737. }
  2738. if (failed) {
  2739. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2740. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2741. return -EFAULT;
  2742. }
  2743. /* now wait for the reply */
  2744. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2745. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2746. "int failed (line=%d)\n", ioc->name, __LINE__);
  2747. return -EFAULT;
  2748. }
  2749. /* read the first two 16-bits, it gives the total length of the reply */
  2750. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2751. & MPI2_DOORBELL_DATA_MASK);
  2752. writel(0, &ioc->chip->HostInterruptStatus);
  2753. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2754. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2755. "int failed (line=%d)\n", ioc->name, __LINE__);
  2756. return -EFAULT;
  2757. }
  2758. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2759. & MPI2_DOORBELL_DATA_MASK);
  2760. writel(0, &ioc->chip->HostInterruptStatus);
  2761. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2762. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2763. printk(MPT2SAS_ERR_FMT "doorbell "
  2764. "handshake int failed (line=%d)\n", ioc->name,
  2765. __LINE__);
  2766. return -EFAULT;
  2767. }
  2768. if (i >= reply_bytes/2) /* overflow case */
  2769. dummy = readl(&ioc->chip->Doorbell);
  2770. else
  2771. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2772. & MPI2_DOORBELL_DATA_MASK);
  2773. writel(0, &ioc->chip->HostInterruptStatus);
  2774. }
  2775. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2776. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2777. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2778. " (line=%d)\n", ioc->name, __LINE__));
  2779. }
  2780. writel(0, &ioc->chip->HostInterruptStatus);
  2781. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2782. mfp = (__le32 *)reply;
  2783. printk(KERN_INFO "\toffset:data\n");
  2784. for (i = 0; i < reply_bytes/4; i++)
  2785. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2786. le32_to_cpu(mfp[i]));
  2787. }
  2788. return 0;
  2789. }
  2790. /**
  2791. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2792. * @ioc: per adapter object
  2793. * @mpi_reply: the reply payload from FW
  2794. * @mpi_request: the request payload sent to FW
  2795. *
  2796. * The SAS IO Unit Control Request message allows the host to perform low-level
  2797. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2798. * to obtain the IOC assigned device handles for a device if it has other
  2799. * identifying information about the device, in addition allows the host to
  2800. * remove IOC resources associated with the device.
  2801. *
  2802. * Returns 0 for success, non-zero for failure.
  2803. */
  2804. int
  2805. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2806. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2807. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2808. {
  2809. u16 smid;
  2810. u32 ioc_state;
  2811. unsigned long timeleft;
  2812. u8 issue_reset;
  2813. int rc;
  2814. void *request;
  2815. u16 wait_state_count;
  2816. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2817. __func__));
  2818. mutex_lock(&ioc->base_cmds.mutex);
  2819. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2820. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2821. ioc->name, __func__);
  2822. rc = -EAGAIN;
  2823. goto out;
  2824. }
  2825. wait_state_count = 0;
  2826. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2827. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2828. if (wait_state_count++ == 10) {
  2829. printk(MPT2SAS_ERR_FMT
  2830. "%s: failed due to ioc not operational\n",
  2831. ioc->name, __func__);
  2832. rc = -EFAULT;
  2833. goto out;
  2834. }
  2835. ssleep(1);
  2836. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2837. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2838. "operational state(count=%d)\n", ioc->name,
  2839. __func__, wait_state_count);
  2840. }
  2841. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2842. if (!smid) {
  2843. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2844. ioc->name, __func__);
  2845. rc = -EAGAIN;
  2846. goto out;
  2847. }
  2848. rc = 0;
  2849. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2850. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2851. ioc->base_cmds.smid = smid;
  2852. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2853. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2854. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2855. ioc->ioc_link_reset_in_progress = 1;
  2856. init_completion(&ioc->base_cmds.done);
  2857. mpt2sas_base_put_smid_default(ioc, smid);
  2858. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2859. msecs_to_jiffies(10000));
  2860. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2861. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2862. ioc->ioc_link_reset_in_progress)
  2863. ioc->ioc_link_reset_in_progress = 0;
  2864. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2865. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2866. ioc->name, __func__);
  2867. _debug_dump_mf(mpi_request,
  2868. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2869. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2870. issue_reset = 1;
  2871. goto issue_host_reset;
  2872. }
  2873. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2874. memcpy(mpi_reply, ioc->base_cmds.reply,
  2875. sizeof(Mpi2SasIoUnitControlReply_t));
  2876. else
  2877. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2878. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2879. goto out;
  2880. issue_host_reset:
  2881. if (issue_reset)
  2882. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2883. FORCE_BIG_HAMMER);
  2884. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2885. rc = -EFAULT;
  2886. out:
  2887. mutex_unlock(&ioc->base_cmds.mutex);
  2888. return rc;
  2889. }
  2890. /**
  2891. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2892. * @ioc: per adapter object
  2893. * @mpi_reply: the reply payload from FW
  2894. * @mpi_request: the request payload sent to FW
  2895. *
  2896. * The SCSI Enclosure Processor request message causes the IOC to
  2897. * communicate with SES devices to control LED status signals.
  2898. *
  2899. * Returns 0 for success, non-zero for failure.
  2900. */
  2901. int
  2902. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2903. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2904. {
  2905. u16 smid;
  2906. u32 ioc_state;
  2907. unsigned long timeleft;
  2908. u8 issue_reset;
  2909. int rc;
  2910. void *request;
  2911. u16 wait_state_count;
  2912. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2913. __func__));
  2914. mutex_lock(&ioc->base_cmds.mutex);
  2915. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2916. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2917. ioc->name, __func__);
  2918. rc = -EAGAIN;
  2919. goto out;
  2920. }
  2921. wait_state_count = 0;
  2922. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2923. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2924. if (wait_state_count++ == 10) {
  2925. printk(MPT2SAS_ERR_FMT
  2926. "%s: failed due to ioc not operational\n",
  2927. ioc->name, __func__);
  2928. rc = -EFAULT;
  2929. goto out;
  2930. }
  2931. ssleep(1);
  2932. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2933. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2934. "operational state(count=%d)\n", ioc->name,
  2935. __func__, wait_state_count);
  2936. }
  2937. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2938. if (!smid) {
  2939. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2940. ioc->name, __func__);
  2941. rc = -EAGAIN;
  2942. goto out;
  2943. }
  2944. rc = 0;
  2945. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2946. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2947. ioc->base_cmds.smid = smid;
  2948. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2949. init_completion(&ioc->base_cmds.done);
  2950. mpt2sas_base_put_smid_default(ioc, smid);
  2951. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2952. msecs_to_jiffies(10000));
  2953. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2954. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2955. ioc->name, __func__);
  2956. _debug_dump_mf(mpi_request,
  2957. sizeof(Mpi2SepRequest_t)/4);
  2958. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2959. issue_reset = 1;
  2960. goto issue_host_reset;
  2961. }
  2962. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2963. memcpy(mpi_reply, ioc->base_cmds.reply,
  2964. sizeof(Mpi2SepReply_t));
  2965. else
  2966. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2967. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2968. goto out;
  2969. issue_host_reset:
  2970. if (issue_reset)
  2971. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2972. FORCE_BIG_HAMMER);
  2973. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2974. rc = -EFAULT;
  2975. out:
  2976. mutex_unlock(&ioc->base_cmds.mutex);
  2977. return rc;
  2978. }
  2979. /**
  2980. * _base_get_port_facts - obtain port facts reply and save in ioc
  2981. * @ioc: per adapter object
  2982. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2983. *
  2984. * Returns 0 for success, non-zero for failure.
  2985. */
  2986. static int
  2987. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2988. {
  2989. Mpi2PortFactsRequest_t mpi_request;
  2990. Mpi2PortFactsReply_t mpi_reply;
  2991. struct mpt2sas_port_facts *pfacts;
  2992. int mpi_reply_sz, mpi_request_sz, r;
  2993. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2994. __func__));
  2995. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2996. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2997. memset(&mpi_request, 0, mpi_request_sz);
  2998. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2999. mpi_request.PortNumber = port;
  3000. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3001. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3002. if (r != 0) {
  3003. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3004. ioc->name, __func__, r);
  3005. return r;
  3006. }
  3007. pfacts = &ioc->pfacts[port];
  3008. memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
  3009. pfacts->PortNumber = mpi_reply.PortNumber;
  3010. pfacts->VP_ID = mpi_reply.VP_ID;
  3011. pfacts->VF_ID = mpi_reply.VF_ID;
  3012. pfacts->MaxPostedCmdBuffers =
  3013. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3014. return 0;
  3015. }
  3016. /**
  3017. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3018. * @ioc: per adapter object
  3019. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3020. *
  3021. * Returns 0 for success, non-zero for failure.
  3022. */
  3023. static int
  3024. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3025. {
  3026. Mpi2IOCFactsRequest_t mpi_request;
  3027. Mpi2IOCFactsReply_t mpi_reply;
  3028. struct mpt2sas_facts *facts;
  3029. int mpi_reply_sz, mpi_request_sz, r;
  3030. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3031. __func__));
  3032. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3033. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3034. memset(&mpi_request, 0, mpi_request_sz);
  3035. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3036. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3037. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3038. if (r != 0) {
  3039. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3040. ioc->name, __func__, r);
  3041. return r;
  3042. }
  3043. facts = &ioc->facts;
  3044. memset(facts, 0, sizeof(struct mpt2sas_facts));
  3045. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3046. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3047. facts->VP_ID = mpi_reply.VP_ID;
  3048. facts->VF_ID = mpi_reply.VF_ID;
  3049. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3050. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3051. facts->WhoInit = mpi_reply.WhoInit;
  3052. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3053. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3054. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3055. facts->MaxReplyDescriptorPostQueueDepth =
  3056. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3057. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3058. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3059. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3060. ioc->ir_firmware = 1;
  3061. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3062. facts->IOCRequestFrameSize =
  3063. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3064. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3065. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3066. ioc->shost->max_id = -1;
  3067. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3068. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3069. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3070. facts->HighPriorityCredit =
  3071. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3072. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3073. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3074. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3075. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3076. facts->MaxChainDepth));
  3077. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3078. "reply frame size(%d)\n", ioc->name,
  3079. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3080. return 0;
  3081. }
  3082. /**
  3083. * _base_send_ioc_init - send ioc_init to firmware
  3084. * @ioc: per adapter object
  3085. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3086. *
  3087. * Returns 0 for success, non-zero for failure.
  3088. */
  3089. static int
  3090. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3091. {
  3092. Mpi2IOCInitRequest_t mpi_request;
  3093. Mpi2IOCInitReply_t mpi_reply;
  3094. int r;
  3095. struct timeval current_time;
  3096. u16 ioc_status;
  3097. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3098. __func__));
  3099. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3100. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3101. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3102. mpi_request.VF_ID = 0; /* TODO */
  3103. mpi_request.VP_ID = 0;
  3104. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3105. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3106. if (_base_is_controller_msix_enabled(ioc))
  3107. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3108. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3109. mpi_request.ReplyDescriptorPostQueueDepth =
  3110. cpu_to_le16(ioc->reply_post_queue_depth);
  3111. mpi_request.ReplyFreeQueueDepth =
  3112. cpu_to_le16(ioc->reply_free_queue_depth);
  3113. mpi_request.SenseBufferAddressHigh =
  3114. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3115. mpi_request.SystemReplyAddressHigh =
  3116. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3117. mpi_request.SystemRequestFrameBaseAddress =
  3118. cpu_to_le64((u64)ioc->request_dma);
  3119. mpi_request.ReplyFreeQueueAddress =
  3120. cpu_to_le64((u64)ioc->reply_free_dma);
  3121. mpi_request.ReplyDescriptorPostQueueAddress =
  3122. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3123. /* This time stamp specifies number of milliseconds
  3124. * since epoch ~ midnight January 1, 1970.
  3125. */
  3126. do_gettimeofday(&current_time);
  3127. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3128. (current_time.tv_usec / 1000));
  3129. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3130. __le32 *mfp;
  3131. int i;
  3132. mfp = (__le32 *)&mpi_request;
  3133. printk(KERN_INFO "\toffset:data\n");
  3134. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3135. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3136. le32_to_cpu(mfp[i]));
  3137. }
  3138. r = _base_handshake_req_reply_wait(ioc,
  3139. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3140. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3141. sleep_flag);
  3142. if (r != 0) {
  3143. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3144. ioc->name, __func__, r);
  3145. return r;
  3146. }
  3147. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3148. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3149. mpi_reply.IOCLogInfo) {
  3150. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3151. r = -EIO;
  3152. }
  3153. return 0;
  3154. }
  3155. /**
  3156. * mpt2sas_port_enable_done - command completion routine for port enable
  3157. * @ioc: per adapter object
  3158. * @smid: system request message index
  3159. * @msix_index: MSIX table index supplied by the OS
  3160. * @reply: reply message frame(lower 32bit addr)
  3161. *
  3162. * Return 1 meaning mf should be freed from _base_interrupt
  3163. * 0 means the mf is freed from this function.
  3164. */
  3165. u8
  3166. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3167. u32 reply)
  3168. {
  3169. MPI2DefaultReply_t *mpi_reply;
  3170. u16 ioc_status;
  3171. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3172. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3173. return 1;
  3174. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3175. return 1;
  3176. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3177. if (mpi_reply) {
  3178. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3179. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3180. mpi_reply->MsgLength*4);
  3181. }
  3182. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3183. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3184. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3185. ioc->port_enable_failed = 1;
  3186. if (ioc->is_driver_loading) {
  3187. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3188. mpt2sas_port_enable_complete(ioc);
  3189. return 1;
  3190. } else {
  3191. ioc->start_scan_failed = ioc_status;
  3192. ioc->start_scan = 0;
  3193. return 1;
  3194. }
  3195. }
  3196. complete(&ioc->port_enable_cmds.done);
  3197. return 1;
  3198. }
  3199. /**
  3200. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3201. * @ioc: per adapter object
  3202. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3203. *
  3204. * Returns 0 for success, non-zero for failure.
  3205. */
  3206. static int
  3207. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3208. {
  3209. Mpi2PortEnableRequest_t *mpi_request;
  3210. Mpi2PortEnableReply_t *mpi_reply;
  3211. unsigned long timeleft;
  3212. int r = 0;
  3213. u16 smid;
  3214. u16 ioc_status;
  3215. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3216. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3217. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3218. ioc->name, __func__);
  3219. return -EAGAIN;
  3220. }
  3221. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3222. if (!smid) {
  3223. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3224. ioc->name, __func__);
  3225. return -EAGAIN;
  3226. }
  3227. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3228. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3229. ioc->port_enable_cmds.smid = smid;
  3230. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3231. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3232. init_completion(&ioc->port_enable_cmds.done);
  3233. mpt2sas_base_put_smid_default(ioc, smid);
  3234. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3235. 300*HZ);
  3236. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3237. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3238. ioc->name, __func__);
  3239. _debug_dump_mf(mpi_request,
  3240. sizeof(Mpi2PortEnableRequest_t)/4);
  3241. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3242. r = -EFAULT;
  3243. else
  3244. r = -ETIME;
  3245. goto out;
  3246. }
  3247. mpi_reply = ioc->port_enable_cmds.reply;
  3248. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3249. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3250. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3251. ioc->name, __func__, ioc_status);
  3252. r = -EFAULT;
  3253. goto out;
  3254. }
  3255. out:
  3256. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3257. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3258. "SUCCESS" : "FAILED"));
  3259. return r;
  3260. }
  3261. /**
  3262. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3263. * @ioc: per adapter object
  3264. *
  3265. * Returns 0 for success, non-zero for failure.
  3266. */
  3267. int
  3268. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3269. {
  3270. Mpi2PortEnableRequest_t *mpi_request;
  3271. u16 smid;
  3272. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3273. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3274. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3275. ioc->name, __func__);
  3276. return -EAGAIN;
  3277. }
  3278. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3279. if (!smid) {
  3280. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3281. ioc->name, __func__);
  3282. return -EAGAIN;
  3283. }
  3284. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3285. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3286. ioc->port_enable_cmds.smid = smid;
  3287. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3288. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3289. mpt2sas_base_put_smid_default(ioc, smid);
  3290. return 0;
  3291. }
  3292. /**
  3293. * _base_determine_wait_on_discovery - desposition
  3294. * @ioc: per adapter object
  3295. *
  3296. * Decide whether to wait on discovery to complete. Used to either
  3297. * locate boot device, or report volumes ahead of physical devices.
  3298. *
  3299. * Returns 1 for wait, 0 for don't wait
  3300. */
  3301. static int
  3302. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3303. {
  3304. /* We wait for discovery to complete if IR firmware is loaded.
  3305. * The sas topology events arrive before PD events, so we need time to
  3306. * turn on the bit in ioc->pd_handles to indicate PD
  3307. * Also, it maybe required to report Volumes ahead of physical
  3308. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3309. */
  3310. if (ioc->ir_firmware)
  3311. return 1;
  3312. /* if no Bios, then we don't need to wait */
  3313. if (!ioc->bios_pg3.BiosVersion)
  3314. return 0;
  3315. /* Bios is present, then we drop down here.
  3316. *
  3317. * If there any entries in the Bios Page 2, then we wait
  3318. * for discovery to complete.
  3319. */
  3320. /* Current Boot Device */
  3321. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3322. MPI2_BIOSPAGE2_FORM_MASK) ==
  3323. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3324. /* Request Boot Device */
  3325. (ioc->bios_pg2.ReqBootDeviceForm &
  3326. MPI2_BIOSPAGE2_FORM_MASK) ==
  3327. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3328. /* Alternate Request Boot Device */
  3329. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3330. MPI2_BIOSPAGE2_FORM_MASK) ==
  3331. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3332. return 0;
  3333. return 1;
  3334. }
  3335. /**
  3336. * _base_unmask_events - turn on notification for this event
  3337. * @ioc: per adapter object
  3338. * @event: firmware event
  3339. *
  3340. * The mask is stored in ioc->event_masks.
  3341. */
  3342. static void
  3343. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3344. {
  3345. u32 desired_event;
  3346. if (event >= 128)
  3347. return;
  3348. desired_event = (1 << (event % 32));
  3349. if (event < 32)
  3350. ioc->event_masks[0] &= ~desired_event;
  3351. else if (event < 64)
  3352. ioc->event_masks[1] &= ~desired_event;
  3353. else if (event < 96)
  3354. ioc->event_masks[2] &= ~desired_event;
  3355. else if (event < 128)
  3356. ioc->event_masks[3] &= ~desired_event;
  3357. }
  3358. /**
  3359. * _base_event_notification - send event notification
  3360. * @ioc: per adapter object
  3361. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3362. *
  3363. * Returns 0 for success, non-zero for failure.
  3364. */
  3365. static int
  3366. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3367. {
  3368. Mpi2EventNotificationRequest_t *mpi_request;
  3369. unsigned long timeleft;
  3370. u16 smid;
  3371. int r = 0;
  3372. int i;
  3373. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3374. __func__));
  3375. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3376. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3377. ioc->name, __func__);
  3378. return -EAGAIN;
  3379. }
  3380. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3381. if (!smid) {
  3382. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3383. ioc->name, __func__);
  3384. return -EAGAIN;
  3385. }
  3386. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3387. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3388. ioc->base_cmds.smid = smid;
  3389. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3390. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3391. mpi_request->VF_ID = 0; /* TODO */
  3392. mpi_request->VP_ID = 0;
  3393. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3394. mpi_request->EventMasks[i] =
  3395. cpu_to_le32(ioc->event_masks[i]);
  3396. init_completion(&ioc->base_cmds.done);
  3397. mpt2sas_base_put_smid_default(ioc, smid);
  3398. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3399. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3400. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3401. ioc->name, __func__);
  3402. _debug_dump_mf(mpi_request,
  3403. sizeof(Mpi2EventNotificationRequest_t)/4);
  3404. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3405. r = -EFAULT;
  3406. else
  3407. r = -ETIME;
  3408. } else
  3409. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3410. ioc->name, __func__));
  3411. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3412. return r;
  3413. }
  3414. /**
  3415. * mpt2sas_base_validate_event_type - validating event types
  3416. * @ioc: per adapter object
  3417. * @event: firmware event
  3418. *
  3419. * This will turn on firmware event notification when application
  3420. * ask for that event. We don't mask events that are already enabled.
  3421. */
  3422. void
  3423. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3424. {
  3425. int i, j;
  3426. u32 event_mask, desired_event;
  3427. u8 send_update_to_fw;
  3428. for (i = 0, send_update_to_fw = 0; i <
  3429. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3430. event_mask = ~event_type[i];
  3431. desired_event = 1;
  3432. for (j = 0; j < 32; j++) {
  3433. if (!(event_mask & desired_event) &&
  3434. (ioc->event_masks[i] & desired_event)) {
  3435. ioc->event_masks[i] &= ~desired_event;
  3436. send_update_to_fw = 1;
  3437. }
  3438. desired_event = (desired_event << 1);
  3439. }
  3440. }
  3441. if (!send_update_to_fw)
  3442. return;
  3443. mutex_lock(&ioc->base_cmds.mutex);
  3444. _base_event_notification(ioc, CAN_SLEEP);
  3445. mutex_unlock(&ioc->base_cmds.mutex);
  3446. }
  3447. /**
  3448. * _base_diag_reset - the "big hammer" start of day reset
  3449. * @ioc: per adapter object
  3450. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3451. *
  3452. * Returns 0 for success, non-zero for failure.
  3453. */
  3454. static int
  3455. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3456. {
  3457. u32 host_diagnostic;
  3458. u32 ioc_state;
  3459. u32 count;
  3460. u32 hcb_size;
  3461. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3462. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3463. ioc->name));
  3464. count = 0;
  3465. do {
  3466. /* Write magic sequence to WriteSequence register
  3467. * Loop until in diagnostic mode
  3468. */
  3469. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3470. "sequence\n", ioc->name));
  3471. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3472. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3473. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3474. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3475. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3476. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3477. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3478. /* wait 100 msec */
  3479. if (sleep_flag == CAN_SLEEP)
  3480. msleep(100);
  3481. else
  3482. mdelay(100);
  3483. if (count++ > 20)
  3484. goto out;
  3485. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3486. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3487. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3488. ioc->name, count, host_diagnostic));
  3489. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3490. hcb_size = readl(&ioc->chip->HCBSize);
  3491. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3492. ioc->name));
  3493. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3494. &ioc->chip->HostDiagnostic);
  3495. /* don't access any registers for 50 milliseconds */
  3496. msleep(50);
  3497. /* 300 second max wait */
  3498. for (count = 0; count < 3000000 ; count++) {
  3499. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3500. if (host_diagnostic == 0xFFFFFFFF)
  3501. goto out;
  3502. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3503. break;
  3504. /* wait 100 msec */
  3505. if (sleep_flag == CAN_SLEEP)
  3506. msleep(1);
  3507. else
  3508. mdelay(1);
  3509. }
  3510. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3511. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3512. "assuming the HCB Address points to good F/W\n",
  3513. ioc->name));
  3514. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3515. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3516. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3517. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3518. "re-enable the HCDW\n", ioc->name));
  3519. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3520. &ioc->chip->HCBSize);
  3521. }
  3522. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3523. ioc->name));
  3524. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3525. &ioc->chip->HostDiagnostic);
  3526. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3527. "diagnostic register\n", ioc->name));
  3528. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3529. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3530. "READY state\n", ioc->name));
  3531. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3532. sleep_flag);
  3533. if (ioc_state) {
  3534. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3535. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3536. goto out;
  3537. }
  3538. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3539. return 0;
  3540. out:
  3541. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3542. return -EFAULT;
  3543. }
  3544. /**
  3545. * _base_make_ioc_ready - put controller in READY state
  3546. * @ioc: per adapter object
  3547. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3548. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3549. *
  3550. * Returns 0 for success, non-zero for failure.
  3551. */
  3552. static int
  3553. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3554. enum reset_type type)
  3555. {
  3556. u32 ioc_state;
  3557. int rc;
  3558. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3559. __func__));
  3560. if (ioc->pci_error_recovery)
  3561. return 0;
  3562. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3563. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3564. ioc->name, __func__, ioc_state));
  3565. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3566. return 0;
  3567. if (ioc_state & MPI2_DOORBELL_USED) {
  3568. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3569. "active!\n", ioc->name));
  3570. goto issue_diag_reset;
  3571. }
  3572. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3573. mpt2sas_base_fault_info(ioc, ioc_state &
  3574. MPI2_DOORBELL_DATA_MASK);
  3575. goto issue_diag_reset;
  3576. }
  3577. if (type == FORCE_BIG_HAMMER)
  3578. goto issue_diag_reset;
  3579. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3580. if (!(_base_send_ioc_reset(ioc,
  3581. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3582. ioc->ioc_reset_count++;
  3583. return 0;
  3584. }
  3585. issue_diag_reset:
  3586. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3587. ioc->ioc_reset_count++;
  3588. return rc;
  3589. }
  3590. /**
  3591. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3592. * @ioc: per adapter object
  3593. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3594. *
  3595. * Returns 0 for success, non-zero for failure.
  3596. */
  3597. static int
  3598. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3599. {
  3600. int r, i;
  3601. unsigned long flags;
  3602. u32 reply_address;
  3603. u16 smid;
  3604. struct _tr_list *delayed_tr, *delayed_tr_next;
  3605. u8 hide_flag;
  3606. struct adapter_reply_queue *reply_q;
  3607. long reply_post_free;
  3608. u32 reply_post_free_sz;
  3609. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3610. __func__));
  3611. /* clean the delayed target reset list */
  3612. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3613. &ioc->delayed_tr_list, list) {
  3614. list_del(&delayed_tr->list);
  3615. kfree(delayed_tr);
  3616. }
  3617. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3618. &ioc->delayed_tr_volume_list, list) {
  3619. list_del(&delayed_tr->list);
  3620. kfree(delayed_tr);
  3621. }
  3622. /* initialize the scsi lookup free list */
  3623. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3624. INIT_LIST_HEAD(&ioc->free_list);
  3625. smid = 1;
  3626. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3627. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3628. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3629. ioc->scsi_lookup[i].smid = smid;
  3630. ioc->scsi_lookup[i].scmd = NULL;
  3631. ioc->scsi_lookup[i].direct_io = 0;
  3632. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3633. &ioc->free_list);
  3634. }
  3635. /* hi-priority queue */
  3636. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3637. smid = ioc->hi_priority_smid;
  3638. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3639. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3640. ioc->hpr_lookup[i].smid = smid;
  3641. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3642. &ioc->hpr_free_list);
  3643. }
  3644. /* internal queue */
  3645. INIT_LIST_HEAD(&ioc->internal_free_list);
  3646. smid = ioc->internal_smid;
  3647. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3648. ioc->internal_lookup[i].cb_idx = 0xFF;
  3649. ioc->internal_lookup[i].smid = smid;
  3650. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3651. &ioc->internal_free_list);
  3652. }
  3653. /* chain pool */
  3654. INIT_LIST_HEAD(&ioc->free_chain_list);
  3655. for (i = 0; i < ioc->chain_depth; i++)
  3656. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3657. &ioc->free_chain_list);
  3658. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3659. /* initialize Reply Free Queue */
  3660. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3661. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3662. ioc->reply_sz)
  3663. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3664. /* initialize reply queues */
  3665. if (ioc->is_driver_loading)
  3666. _base_assign_reply_queues(ioc);
  3667. /* initialize Reply Post Free Queue */
  3668. reply_post_free = (long)ioc->reply_post_free;
  3669. reply_post_free_sz = ioc->reply_post_queue_depth *
  3670. sizeof(Mpi2DefaultReplyDescriptor_t);
  3671. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3672. reply_q->reply_post_host_index = 0;
  3673. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3674. reply_post_free;
  3675. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3676. reply_q->reply_post_free[i].Words =
  3677. cpu_to_le64(ULLONG_MAX);
  3678. if (!_base_is_controller_msix_enabled(ioc))
  3679. goto skip_init_reply_post_free_queue;
  3680. reply_post_free += reply_post_free_sz;
  3681. }
  3682. skip_init_reply_post_free_queue:
  3683. r = _base_send_ioc_init(ioc, sleep_flag);
  3684. if (r)
  3685. return r;
  3686. /* initialize reply free host index */
  3687. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3688. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3689. /* initialize reply post host index */
  3690. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3691. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3692. &ioc->chip->ReplyPostHostIndex);
  3693. if (!_base_is_controller_msix_enabled(ioc))
  3694. goto skip_init_reply_post_host_index;
  3695. }
  3696. skip_init_reply_post_host_index:
  3697. _base_unmask_interrupts(ioc);
  3698. r = _base_event_notification(ioc, sleep_flag);
  3699. if (r)
  3700. return r;
  3701. if (sleep_flag == CAN_SLEEP)
  3702. _base_static_config_pages(ioc);
  3703. if (ioc->is_driver_loading) {
  3704. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3705. == 0x80) {
  3706. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3707. MFG_PAGE10_HIDE_SSDS_MASK);
  3708. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3709. ioc->mfg_pg10_hide_flag = hide_flag;
  3710. }
  3711. ioc->wait_for_discovery_to_complete =
  3712. _base_determine_wait_on_discovery(ioc);
  3713. return r; /* scan_start and scan_finished support */
  3714. }
  3715. r = _base_send_port_enable(ioc, sleep_flag);
  3716. if (r)
  3717. return r;
  3718. return r;
  3719. }
  3720. /**
  3721. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3722. * @ioc: per adapter object
  3723. *
  3724. * Return nothing.
  3725. */
  3726. void
  3727. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3728. {
  3729. struct pci_dev *pdev = ioc->pdev;
  3730. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3731. __func__));
  3732. _base_mask_interrupts(ioc);
  3733. ioc->shost_recovery = 1;
  3734. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3735. ioc->shost_recovery = 0;
  3736. _base_free_irq(ioc);
  3737. _base_disable_msix(ioc);
  3738. if (ioc->chip_phys)
  3739. iounmap(ioc->chip);
  3740. ioc->chip_phys = 0;
  3741. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3742. pci_disable_pcie_error_reporting(pdev);
  3743. pci_disable_device(pdev);
  3744. return;
  3745. }
  3746. /**
  3747. * mpt2sas_base_attach - attach controller instance
  3748. * @ioc: per adapter object
  3749. *
  3750. * Returns 0 for success, non-zero for failure.
  3751. */
  3752. int
  3753. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3754. {
  3755. int r, i;
  3756. int cpu_id, last_cpu_id = 0;
  3757. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3758. __func__));
  3759. /* setup cpu_msix_table */
  3760. ioc->cpu_count = num_online_cpus();
  3761. for_each_online_cpu(cpu_id)
  3762. last_cpu_id = cpu_id;
  3763. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3764. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3765. ioc->reply_queue_count = 1;
  3766. if (!ioc->cpu_msix_table) {
  3767. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3768. "cpu_msix_table failed!!!\n", ioc->name));
  3769. r = -ENOMEM;
  3770. goto out_free_resources;
  3771. }
  3772. if (ioc->is_warpdrive) {
  3773. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3774. sizeof(resource_size_t *), GFP_KERNEL);
  3775. if (!ioc->reply_post_host_index) {
  3776. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3777. "for cpu_msix_table failed!!!\n", ioc->name));
  3778. r = -ENOMEM;
  3779. goto out_free_resources;
  3780. }
  3781. }
  3782. r = mpt2sas_base_map_resources(ioc);
  3783. if (r)
  3784. goto out_free_resources;
  3785. if (ioc->is_warpdrive) {
  3786. ioc->reply_post_host_index[0] =
  3787. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3788. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3789. ioc->reply_post_host_index[i] = (resource_size_t *)
  3790. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3791. * 4)));
  3792. }
  3793. pci_set_drvdata(ioc->pdev, ioc->shost);
  3794. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3795. if (r)
  3796. goto out_free_resources;
  3797. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3798. if (r)
  3799. goto out_free_resources;
  3800. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3801. sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
  3802. if (!ioc->pfacts) {
  3803. r = -ENOMEM;
  3804. goto out_free_resources;
  3805. }
  3806. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3807. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3808. if (r)
  3809. goto out_free_resources;
  3810. }
  3811. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3812. if (r)
  3813. goto out_free_resources;
  3814. init_waitqueue_head(&ioc->reset_wq);
  3815. /* allocate memory pd handle bitmask list */
  3816. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3817. if (ioc->facts.MaxDevHandle % 8)
  3818. ioc->pd_handles_sz++;
  3819. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3820. GFP_KERNEL);
  3821. if (!ioc->pd_handles) {
  3822. r = -ENOMEM;
  3823. goto out_free_resources;
  3824. }
  3825. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3826. /* base internal command bits */
  3827. mutex_init(&ioc->base_cmds.mutex);
  3828. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3829. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3830. /* port_enable command bits */
  3831. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3832. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3833. /* transport internal command bits */
  3834. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3835. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3836. mutex_init(&ioc->transport_cmds.mutex);
  3837. /* scsih internal command bits */
  3838. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3839. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3840. mutex_init(&ioc->scsih_cmds.mutex);
  3841. /* task management internal command bits */
  3842. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3843. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3844. mutex_init(&ioc->tm_cmds.mutex);
  3845. /* config page internal command bits */
  3846. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3847. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3848. mutex_init(&ioc->config_cmds.mutex);
  3849. /* ctl module internal command bits */
  3850. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3851. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3852. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3853. mutex_init(&ioc->ctl_cmds.mutex);
  3854. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3855. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3856. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3857. !ioc->ctl_cmds.sense) {
  3858. r = -ENOMEM;
  3859. goto out_free_resources;
  3860. }
  3861. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3862. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3863. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3864. r = -ENOMEM;
  3865. goto out_free_resources;
  3866. }
  3867. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3868. ioc->event_masks[i] = -1;
  3869. /* here we enable the events we care about */
  3870. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3871. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3872. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3873. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3874. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3875. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3876. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3877. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3878. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3879. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3880. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3881. if (r)
  3882. goto out_free_resources;
  3883. return 0;
  3884. out_free_resources:
  3885. ioc->remove_host = 1;
  3886. mpt2sas_base_free_resources(ioc);
  3887. _base_release_memory_pools(ioc);
  3888. pci_set_drvdata(ioc->pdev, NULL);
  3889. kfree(ioc->cpu_msix_table);
  3890. if (ioc->is_warpdrive)
  3891. kfree(ioc->reply_post_host_index);
  3892. kfree(ioc->pd_handles);
  3893. kfree(ioc->tm_cmds.reply);
  3894. kfree(ioc->transport_cmds.reply);
  3895. kfree(ioc->scsih_cmds.reply);
  3896. kfree(ioc->config_cmds.reply);
  3897. kfree(ioc->base_cmds.reply);
  3898. kfree(ioc->port_enable_cmds.reply);
  3899. kfree(ioc->ctl_cmds.reply);
  3900. kfree(ioc->ctl_cmds.sense);
  3901. kfree(ioc->pfacts);
  3902. ioc->ctl_cmds.reply = NULL;
  3903. ioc->base_cmds.reply = NULL;
  3904. ioc->tm_cmds.reply = NULL;
  3905. ioc->scsih_cmds.reply = NULL;
  3906. ioc->transport_cmds.reply = NULL;
  3907. ioc->config_cmds.reply = NULL;
  3908. ioc->pfacts = NULL;
  3909. return r;
  3910. }
  3911. /**
  3912. * mpt2sas_base_detach - remove controller instance
  3913. * @ioc: per adapter object
  3914. *
  3915. * Return nothing.
  3916. */
  3917. void
  3918. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3919. {
  3920. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3921. __func__));
  3922. mpt2sas_base_stop_watchdog(ioc);
  3923. mpt2sas_base_free_resources(ioc);
  3924. _base_release_memory_pools(ioc);
  3925. pci_set_drvdata(ioc->pdev, NULL);
  3926. kfree(ioc->cpu_msix_table);
  3927. if (ioc->is_warpdrive)
  3928. kfree(ioc->reply_post_host_index);
  3929. kfree(ioc->pd_handles);
  3930. kfree(ioc->pfacts);
  3931. kfree(ioc->ctl_cmds.reply);
  3932. kfree(ioc->ctl_cmds.sense);
  3933. kfree(ioc->base_cmds.reply);
  3934. kfree(ioc->port_enable_cmds.reply);
  3935. kfree(ioc->tm_cmds.reply);
  3936. kfree(ioc->transport_cmds.reply);
  3937. kfree(ioc->scsih_cmds.reply);
  3938. kfree(ioc->config_cmds.reply);
  3939. }
  3940. /**
  3941. * _base_reset_handler - reset callback handler (for base)
  3942. * @ioc: per adapter object
  3943. * @reset_phase: phase
  3944. *
  3945. * The handler for doing any required cleanup or initialization.
  3946. *
  3947. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3948. * MPT2_IOC_DONE_RESET
  3949. *
  3950. * Return nothing.
  3951. */
  3952. static void
  3953. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3954. {
  3955. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3956. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3957. switch (reset_phase) {
  3958. case MPT2_IOC_PRE_RESET:
  3959. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3960. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3961. break;
  3962. case MPT2_IOC_AFTER_RESET:
  3963. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3964. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3965. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3966. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3967. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3968. complete(&ioc->transport_cmds.done);
  3969. }
  3970. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3971. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3972. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3973. complete(&ioc->base_cmds.done);
  3974. }
  3975. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3976. ioc->port_enable_failed = 1;
  3977. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  3978. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  3979. if (ioc->is_driver_loading) {
  3980. ioc->start_scan_failed =
  3981. MPI2_IOCSTATUS_INTERNAL_ERROR;
  3982. ioc->start_scan = 0;
  3983. ioc->port_enable_cmds.status =
  3984. MPT2_CMD_NOT_USED;
  3985. } else
  3986. complete(&ioc->port_enable_cmds.done);
  3987. }
  3988. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3989. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3990. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3991. ioc->config_cmds.smid = USHRT_MAX;
  3992. complete(&ioc->config_cmds.done);
  3993. }
  3994. break;
  3995. case MPT2_IOC_DONE_RESET:
  3996. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3997. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3998. break;
  3999. }
  4000. }
  4001. /**
  4002. * _wait_for_commands_to_complete - reset controller
  4003. * @ioc: Pointer to MPT_ADAPTER structure
  4004. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4005. *
  4006. * This function waiting(3s) for all pending commands to complete
  4007. * prior to putting controller in reset.
  4008. */
  4009. static void
  4010. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4011. {
  4012. u32 ioc_state;
  4013. unsigned long flags;
  4014. u16 i;
  4015. ioc->pending_io_count = 0;
  4016. if (sleep_flag != CAN_SLEEP)
  4017. return;
  4018. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4019. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4020. return;
  4021. /* pending command count */
  4022. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4023. for (i = 0; i < ioc->scsiio_depth; i++)
  4024. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4025. ioc->pending_io_count++;
  4026. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4027. if (!ioc->pending_io_count)
  4028. return;
  4029. /* wait for pending commands to complete */
  4030. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4031. }
  4032. /**
  4033. * mpt2sas_base_hard_reset_handler - reset controller
  4034. * @ioc: Pointer to MPT_ADAPTER structure
  4035. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4036. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4037. *
  4038. * Returns 0 for success, non-zero for failure.
  4039. */
  4040. int
  4041. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4042. enum reset_type type)
  4043. {
  4044. int r;
  4045. unsigned long flags;
  4046. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4047. __func__));
  4048. if (ioc->pci_error_recovery) {
  4049. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4050. ioc->name, __func__);
  4051. r = 0;
  4052. goto out_unlocked;
  4053. }
  4054. if (mpt2sas_fwfault_debug)
  4055. mpt2sas_halt_firmware(ioc);
  4056. /* TODO - What we really should be doing is pulling
  4057. * out all the code associated with NO_SLEEP; its never used.
  4058. * That is legacy code from mpt fusion driver, ported over.
  4059. * I will leave this BUG_ON here for now till its been resolved.
  4060. */
  4061. BUG_ON(sleep_flag == NO_SLEEP);
  4062. /* wait for an active reset in progress to complete */
  4063. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4064. do {
  4065. ssleep(1);
  4066. } while (ioc->shost_recovery == 1);
  4067. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4068. __func__));
  4069. return ioc->ioc_reset_in_progress_status;
  4070. }
  4071. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4072. ioc->shost_recovery = 1;
  4073. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4074. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4075. _wait_for_commands_to_complete(ioc, sleep_flag);
  4076. _base_mask_interrupts(ioc);
  4077. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4078. if (r)
  4079. goto out;
  4080. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4081. /* If this hard reset is called while port enable is active, then
  4082. * there is no reason to call make_ioc_operational
  4083. */
  4084. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4085. ioc->remove_host = 1;
  4086. r = -EFAULT;
  4087. goto out;
  4088. }
  4089. r = _base_make_ioc_operational(ioc, sleep_flag);
  4090. if (!r)
  4091. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4092. out:
  4093. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4094. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4095. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4096. ioc->ioc_reset_in_progress_status = r;
  4097. ioc->shost_recovery = 0;
  4098. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4099. mutex_unlock(&ioc->reset_in_progress_mutex);
  4100. out_unlocked:
  4101. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4102. __func__));
  4103. return r;
  4104. }