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A32
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test_arm_disassembler.cpp

test_arm_disassembler.cpp 22 KB
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  1. /* This file is part of the dynarmic project.
    2. 

  2.  * Copyright (c) 2016 MerryMage
    3. 

  3.  * SPDX-License-Identifier: 0BSD
    4. 

  4.  */
    5. 

  5. 

  6. #include <catch2/catch_test_macros.hpp>
    7. 

  7. 

  8. #include "dynarmic/frontend/A32/disassembler/disassembler.h"
    9. 

  9. 

  10. using Dynarmic::A32::DisassembleArm;
    11. 

  11. 

  12. TEST_CASE("Disassemble branch instructions", "[arm][disassembler]") {
    13. 

  13.     REQUIRE(DisassembleArm(0xEAFFFFFE) == "b +#0");
    14. 

  14.     REQUIRE(DisassembleArm(0xEB000008) == "bl +#40");
    15. 

  15.     REQUIRE(DisassembleArm(0xFBFFFFFE) == "blx +#2");
    16. 

  16.     REQUIRE(DisassembleArm(0xFAFFFFFF) == "blx +#4");
    17. 

  17.     REQUIRE(DisassembleArm(0xFBE1E7FE) == "blx -#7888894");
    18. 

  18.     REQUIRE(DisassembleArm(0xE12FFF3D) == "blx sp");
    19. 

  19.     REQUIRE(DisassembleArm(0x312FFF13) == "bxcc r3");
    20. 

  20.     REQUIRE(DisassembleArm(0x012FFF29) == "bxjeq r9");
    21. 

  21. }
    22. 

  22. 

  23. TEST_CASE("Disassemble data processing instructions", "[arm][disassembler]") {
    24. 

  24.     REQUIRE(DisassembleArm(0xE2A21004) == "adc r1, r2, #4");
    25. 

  25.     REQUIRE(DisassembleArm(0xE0A21143) == "adc r1, r2, r3, asr #2");
    26. 

  26.     REQUIRE(DisassembleArm(0xE0A21103) == "adc r1, r2, r3, lsl #2");
    27. 

  27.     REQUIRE(DisassembleArm(0xE0A21123) == "adc r1, r2, r3, lsr #2");
    28. 

  28.     REQUIRE(DisassembleArm(0xE0A21163) == "adc r1, r2, r3, ror #2");
    29. 

  29.     REQUIRE(DisassembleArm(0xE0A21003) == "adc r1, r2, r3");
    30. 

  30.     REQUIRE(DisassembleArm(0xE0A21063) == "adc r1, r2, r3, rrx");
    31. 

  31.     REQUIRE(DisassembleArm(0xE0A21453) == "adc r1, r2, r3, asr r4");
    32. 

  32.     REQUIRE(DisassembleArm(0xE0A21413) == "adc r1, r2, r3, lsl r4");
    33. 

  33.     REQUIRE(DisassembleArm(0xE0A21433) == "adc r1, r2, r3, lsr r4");
    34. 

  34.     REQUIRE(DisassembleArm(0xE0A21473) == "adc r1, r2, r3, ror r4");
    35. 

  35.     REQUIRE(DisassembleArm(0xE2B21004) == "adcs r1, r2, #4");
    36. 

  36.     REQUIRE(DisassembleArm(0xE0B21143) == "adcs r1, r2, r3, asr #2");
    37. 

  37.     REQUIRE(DisassembleArm(0xE0B21103) == "adcs r1, r2, r3, lsl #2");
    38. 

  38.     REQUIRE(DisassembleArm(0xE0B21123) == "adcs r1, r2, r3, lsr #2");
    39. 

  39.     REQUIRE(DisassembleArm(0xE0B21163) == "adcs r1, r2, r3, ror #2");
    40. 

  40.     REQUIRE(DisassembleArm(0xE0B21003) == "adcs r1, r2, r3");
    41. 

  41.     REQUIRE(DisassembleArm(0xE0B21063) == "adcs r1, r2, r3, rrx");
    42. 

  42.     REQUIRE(DisassembleArm(0xE0B21453) == "adcs r1, r2, r3, asr r4");
    43. 

  43.     REQUIRE(DisassembleArm(0xE0B21413) == "adcs r1, r2, r3, lsl r4");
    44. 

  44.     REQUIRE(DisassembleArm(0xE0B21433) == "adcs r1, r2, r3, lsr r4");
    45. 

  45.     REQUIRE(DisassembleArm(0xE0B21473) == "adcs r1, r2, r3, ror r4");
    46. 

  46. 

  47.     REQUIRE(DisassembleArm(0xE2853004) == "add r3, r5, #4");
    48. 

  48.     REQUIRE(DisassembleArm(0xE0821143) == "add r1, r2, r3, asr #2");
    49. 

  49.     REQUIRE(DisassembleArm(0xE0821103) == "add r1, r2, r3, lsl #2");
    50. 

  50.     REQUIRE(DisassembleArm(0xE0821123) == "add r1, r2, r3, lsr #2");
    51. 

  51.     REQUIRE(DisassembleArm(0xE0821163) == "add r1, r2, r3, ror #2");
    52. 

  52.     REQUIRE(DisassembleArm(0xE0821003) == "add r1, r2, r3");
    53. 

  53.     REQUIRE(DisassembleArm(0xE0821453) == "add r1, r2, r3, asr r4");
    54. 

  54.     REQUIRE(DisassembleArm(0xE0821413) == "add r1, r2, r3, lsl r4");
    55. 

  55.     REQUIRE(DisassembleArm(0xE0821433) == "add r1, r2, r3, lsr r4");
    56. 

  56.     REQUIRE(DisassembleArm(0xE0821473) == "add r1, r2, r3, ror r4");
    57. 

  57.     REQUIRE(DisassembleArm(0xE0821063) == "add r1, r2, r3, rrx");
    58. 

  58.     REQUIRE(DisassembleArm(0xE2953004) == "adds r3, r5, #4");
    59. 

  59.     REQUIRE(DisassembleArm(0xE0921143) == "adds r1, r2, r3, asr #2");
    60. 

  60.     REQUIRE(DisassembleArm(0xE0921103) == "adds r1, r2, r3, lsl #2");
    61. 

  61.     REQUIRE(DisassembleArm(0xE0921123) == "adds r1, r2, r3, lsr #2");
    62. 

  62.     REQUIRE(DisassembleArm(0xE0921163) == "adds r1, r2, r3, ror #2");
    63. 

  63.     REQUIRE(DisassembleArm(0xE0921003) == "adds r1, r2, r3");
    64. 

  64.     REQUIRE(DisassembleArm(0xE0921063) == "adds r1, r2, r3, rrx");
    65. 

  65.     REQUIRE(DisassembleArm(0xE0921453) == "adds r1, r2, r3, asr r4");
    66. 

  66.     REQUIRE(DisassembleArm(0xE0921413) == "adds r1, r2, r3, lsl r4");
    67. 

  67.     REQUIRE(DisassembleArm(0xE0921433) == "adds r1, r2, r3, lsr r4");
    68. 

  68.     REQUIRE(DisassembleArm(0xE0921473) == "adds r1, r2, r3, ror r4");
    69. 

  69. 

  70.     REQUIRE(DisassembleArm(0xE2021004) == "and r1, r2, #4");
    71. 

  71.     REQUIRE(DisassembleArm(0xE0021143) == "and r1, r2, r3, asr #2");
    72. 

  72.     REQUIRE(DisassembleArm(0xE0021103) == "and r1, r2, r3, lsl #2");
    73. 

  73.     REQUIRE(DisassembleArm(0xE0021123) == "and r1, r2, r3, lsr #2");
    74. 

  74.     REQUIRE(DisassembleArm(0xE0021163) == "and r1, r2, r3, ror #2");
    75. 

  75.     REQUIRE(DisassembleArm(0xE0021003) == "and r1, r2, r3");
    76. 

  76.     REQUIRE(DisassembleArm(0xE0021453) == "and r1, r2, r3, asr r4");
    77. 

  77.     REQUIRE(DisassembleArm(0xE0021413) == "and r1, r2, r3, lsl r4");
    78. 

  78.     REQUIRE(DisassembleArm(0xE0021433) == "and r1, r2, r3, lsr r4");
    79. 

  79.     REQUIRE(DisassembleArm(0xE0021473) == "and r1, r2, r3, ror r4");
    80. 

  80.     REQUIRE(DisassembleArm(0xE0021063) == "and r1, r2, r3, rrx");
    81. 

  81.     REQUIRE(DisassembleArm(0xE2121004) == "ands r1, r2, #4");
    82. 

  82.     REQUIRE(DisassembleArm(0xE0121143) == "ands r1, r2, r3, asr #2");
    83. 

  83.     REQUIRE(DisassembleArm(0xE0121103) == "ands r1, r2, r3, lsl #2");
    84. 

  84.     REQUIRE(DisassembleArm(0xE0121123) == "ands r1, r2, r3, lsr #2");
    85. 

  85.     REQUIRE(DisassembleArm(0xE0121163) == "ands r1, r2, r3, ror #2");
    86. 

  86.     REQUIRE(DisassembleArm(0xE0121003) == "ands r1, r2, r3");
    87. 

  87.     REQUIRE(DisassembleArm(0xE0121063) == "ands r1, r2, r3, rrx");
    88. 

  88.     REQUIRE(DisassembleArm(0xE0121453) == "ands r1, r2, r3, asr r4");
    89. 

  89.     REQUIRE(DisassembleArm(0xE0121413) == "ands r1, r2, r3, lsl r4");
    90. 

  90.     REQUIRE(DisassembleArm(0xE0121433) == "ands r1, r2, r3, lsr r4");
    91. 

  91.     REQUIRE(DisassembleArm(0xE0121473) == "ands r1, r2, r3, ror r4");
    92. 

  92. 

  93.     REQUIRE(DisassembleArm(0xE3C21004) == "bic r1, r2, #4");
    94. 

  94.     REQUIRE(DisassembleArm(0xE1C21143) == "bic r1, r2, r3, asr #2");
    95. 

  95.     REQUIRE(DisassembleArm(0xE1C21103) == "bic r1, r2, r3, lsl #2");
    96. 

  96.     REQUIRE(DisassembleArm(0xE1C21123) == "bic r1, r2, r3, lsr #2");
    97. 

  97.     REQUIRE(DisassembleArm(0xE1C21163) == "bic r1, r2, r3, ror #2");
    98. 

  98.     REQUIRE(DisassembleArm(0xE1C21003) == "bic r1, r2, r3");
    99. 

  99.     REQUIRE(DisassembleArm(0xE1C21453) == "bic r1, r2, r3, asr r4");
    100. 

  100.     REQUIRE(DisassembleArm(0xE1C21413) == "bic r1, r2, r3, lsl r4");
    101. 

  101.     REQUIRE(DisassembleArm(0xE1C21433) == "bic r1, r2, r3, lsr r4");
    102. 

  102.     REQUIRE(DisassembleArm(0xE1C21473) == "bic r1, r2, r3, ror r4");
    103. 

  103.     REQUIRE(DisassembleArm(0xE1C21063) == "bic r1, r2, r3, rrx");
    104. 

  104.     REQUIRE(DisassembleArm(0xE3D21004) == "bics r1, r2, #4");
    105. 

  105.     REQUIRE(DisassembleArm(0xE1D21143) == "bics r1, r2, r3, asr #2");
    106. 

  106.     REQUIRE(DisassembleArm(0xE1D21103) == "bics r1, r2, r3, lsl #2");
    107. 

  107.     REQUIRE(DisassembleArm(0xE1D21123) == "bics r1, r2, r3, lsr #2");
    108. 

  108.     REQUIRE(DisassembleArm(0xE1D21163) == "bics r1, r2, r3, ror #2");
    109. 

  109.     REQUIRE(DisassembleArm(0xE1D21003) == "bics r1, r2, r3");
    110. 

  110.     REQUIRE(DisassembleArm(0xE1D21063) == "bics r1, r2, r3, rrx");
    111. 

  111.     REQUIRE(DisassembleArm(0xE1D21453) == "bics r1, r2, r3, asr r4");
    112. 

  112.     REQUIRE(DisassembleArm(0xE1D21413) == "bics r1, r2, r3, lsl r4");
    113. 

  113.     REQUIRE(DisassembleArm(0xE1D21433) == "bics r1, r2, r3, lsr r4");
    114. 

  114.     REQUIRE(DisassembleArm(0xE1D21473) == "bics r1, r2, r3, ror r4");
    115. 

  115. 

  116.     REQUIRE(DisassembleArm(0xE3710004) == "cmn r1, #4");
    117. 

  117.     REQUIRE(DisassembleArm(0xE1710142) == "cmn r1, r2, asr #2");
    118. 

  118.     REQUIRE(DisassembleArm(0xE1710102) == "cmn r1, r2, lsl #2");
    119. 

  119.     REQUIRE(DisassembleArm(0xE1710122) == "cmn r1, r2, lsr #2");
    120. 

  120.     REQUIRE(DisassembleArm(0xE1710162) == "cmn r1, r2, ror #2");
    121. 

  121.     REQUIRE(DisassembleArm(0xE1710002) == "cmn r1, r2");
    122. 

  122.     REQUIRE(DisassembleArm(0xE1710062) == "cmn r1, r2, rrx");
    123. 

  123.     REQUIRE(DisassembleArm(0xE1710352) == "cmn r1, r2, asr r3");
    124. 

  124.     REQUIRE(DisassembleArm(0xE1710312) == "cmn r1, r2, lsl r3");
    125. 

  125.     REQUIRE(DisassembleArm(0xE1710332) == "cmn r1, r2, lsr r3");
    126. 

  126.     REQUIRE(DisassembleArm(0xE1710372) == "cmn r1, r2, ror r3");
    127. 

  127. 

  128.     REQUIRE(DisassembleArm(0xE3510004) == "cmp r1, #4");
    129. 

  129.     REQUIRE(DisassembleArm(0xE1510142) == "cmp r1, r2, asr #2");
    130. 

  130.     REQUIRE(DisassembleArm(0xE1510102) == "cmp r1, r2, lsl #2");
    131. 

  131.     REQUIRE(DisassembleArm(0xE1510122) == "cmp r1, r2, lsr #2");
    132. 

  132.     REQUIRE(DisassembleArm(0xE1510162) == "cmp r1, r2, ror #2");
    133. 

  133.     REQUIRE(DisassembleArm(0xE1510002) == "cmp r1, r2");
    134. 

  134.     REQUIRE(DisassembleArm(0xE1510062) == "cmp r1, r2, rrx");
    135. 

  135.     REQUIRE(DisassembleArm(0xE1510352) == "cmp r1, r2, asr r3");
    136. 

  136.     REQUIRE(DisassembleArm(0xE1510312) == "cmp r1, r2, lsl r3");
    137. 

  137.     REQUIRE(DisassembleArm(0xE1510332) == "cmp r1, r2, lsr r3");
    138. 

  138.     REQUIRE(DisassembleArm(0xE1510372) == "cmp r1, r2, ror r3");
    139. 

  139. 

  140.     REQUIRE(DisassembleArm(0xE2221004) == "eor r1, r2, #4");
    141. 

  141.     REQUIRE(DisassembleArm(0xE0221243) == "eor r1, r2, r3, asr #4");
    142. 

  142.     REQUIRE(DisassembleArm(0xE0221203) == "eor r1, r2, r3, lsl #4");
    143. 

  143.     REQUIRE(DisassembleArm(0xE0221223) == "eor r1, r2, r3, lsr #4");
    144. 

  144.     REQUIRE(DisassembleArm(0xE0221263) == "eor r1, r2, r3, ror #4");
    145. 

  145.     REQUIRE(DisassembleArm(0xE0221003) == "eor r1, r2, r3");
    146. 

  146.     REQUIRE(DisassembleArm(0xE0221453) == "eor r1, r2, r3, asr r4");
    147. 

  147.     REQUIRE(DisassembleArm(0xE0221413) == "eor r1, r2, r3, lsl r4");
    148. 

  148.     REQUIRE(DisassembleArm(0xE0221433) == "eor r1, r2, r3, lsr r4");
    149. 

  149.     REQUIRE(DisassembleArm(0xE0221473) == "eor r1, r2, r3, ror r4");
    150. 

  150.     REQUIRE(DisassembleArm(0xE0221063) == "eor r1, r2, r3, rrx");
    151. 

  151.     REQUIRE(DisassembleArm(0xE2321004) == "eors r1, r2, #4");
    152. 

  152.     REQUIRE(DisassembleArm(0xE0321243) == "eors r1, r2, r3, asr #4");
    153. 

  153.     REQUIRE(DisassembleArm(0xE0321203) == "eors r1, r2, r3, lsl #4");
    154. 

  154.     REQUIRE(DisassembleArm(0xE0321223) == "eors r1, r2, r3, lsr #4");
    155. 

  155.     REQUIRE(DisassembleArm(0xE0321263) == "eors r1, r2, r3, ror #4");
    156. 

  156.     REQUIRE(DisassembleArm(0xE0321003) == "eors r1, r2, r3");
    157. 

  157.     REQUIRE(DisassembleArm(0xE0321453) == "eors r1, r2, r3, asr r4");
    158. 

  158.     REQUIRE(DisassembleArm(0xE0321413) == "eors r1, r2, r3, lsl r4");
    159. 

  159.     REQUIRE(DisassembleArm(0xE0321433) == "eors r1, r2, r3, lsr r4");
    160. 

  160.     REQUIRE(DisassembleArm(0xE0321473) == "eors r1, r2, r3, ror r4");
    161. 

  161.     REQUIRE(DisassembleArm(0xE0321063) == "eors r1, r2, r3, rrx");
    162. 

  162. 

  163.     REQUIRE(DisassembleArm(0xE3A010FF) == "mov r1, #255");
    164. 

  164.     REQUIRE(DisassembleArm(0xE1A01142) == "mov r1, r2, asr #2");
    165. 

  165.     REQUIRE(DisassembleArm(0xE1A01102) == "mov r1, r2, lsl #2");
    166. 

  166.     REQUIRE(DisassembleArm(0xE1A01122) == "mov r1, r2, lsr #2");
    167. 

  167.     REQUIRE(DisassembleArm(0xE1A01162) == "mov r1, r2, ror #2");
    168. 

  168.     REQUIRE(DisassembleArm(0xE1A01062) == "mov r1, r2, rrx");
    169. 

  169.     REQUIRE(DisassembleArm(0xE1A0E00F) == "mov lr, pc");
    170. 

  170.     REQUIRE(DisassembleArm(0xE3B010FF) == "movs r1, #255");
    171. 

  171.     REQUIRE(DisassembleArm(0xE1B0E00F) == "movs lr, pc");
    172. 

  172.     REQUIRE(DisassembleArm(0xE1B01142) == "movs r1, r2, asr #2");
    173. 

  173.     REQUIRE(DisassembleArm(0xE1B01102) == "movs r1, r2, lsl #2");
    174. 

  174.     REQUIRE(DisassembleArm(0xE1B01122) == "movs r1, r2, lsr #2");
    175. 

  175.     REQUIRE(DisassembleArm(0xE1B01162) == "movs r1, r2, ror #2");
    176. 

  176. 

  177.     REQUIRE(DisassembleArm(0xE3E01004) == "mvn r1, #4");
    178. 

  178.     REQUIRE(DisassembleArm(0xE1E01142) == "mvn r1, r2, asr #2");
    179. 

  179.     REQUIRE(DisassembleArm(0xE1E01102) == "mvn r1, r2, lsl #2");
    180. 

  180.     REQUIRE(DisassembleArm(0xE1E01122) == "mvn r1, r2, lsr #2");
    181. 

  181.     REQUIRE(DisassembleArm(0xE1E01162) == "mvn r1, r2, ror #2");
    182. 

  182.     REQUIRE(DisassembleArm(0xE1E01062) == "mvn r1, r2, rrx");
    183. 

  183.     REQUIRE(DisassembleArm(0xE1E01002) == "mvn r1, r2");
    184. 

  184.     REQUIRE(DisassembleArm(0xE1E01352) == "mvn r1, r2, asr r3");
    185. 

  185.     REQUIRE(DisassembleArm(0xE1E01312) == "mvn r1, r2, lsl r3");
    186. 

  186.     REQUIRE(DisassembleArm(0xE1E01332) == "mvn r1, r2, lsr r3");
    187. 

  187.     REQUIRE(DisassembleArm(0xE1E01372) == "mvn r1, r2, ror r3");
    188. 

  188.     REQUIRE(DisassembleArm(0xE3F01004) == "mvns r1, #4");
    189. 

  189.     REQUIRE(DisassembleArm(0xE1F01142) == "mvns r1, r2, asr #2");
    190. 

  190.     REQUIRE(DisassembleArm(0xE1F01102) == "mvns r1, r2, lsl #2");
    191. 

  191.     REQUIRE(DisassembleArm(0xE1F01122) == "mvns r1, r2, lsr #2");
    192. 

  192.     REQUIRE(DisassembleArm(0xE1F01162) == "mvns r1, r2, ror #2");
    193. 

  193.     REQUIRE(DisassembleArm(0xE1F01062) == "mvns r1, r2, rrx");
    194. 

  194.     REQUIRE(DisassembleArm(0xE1F01002) == "mvns r1, r2");
    195. 

  195.     REQUIRE(DisassembleArm(0xE1F01352) == "mvns r1, r2, asr r3");
    196. 

  196.     REQUIRE(DisassembleArm(0xE1F01312) == "mvns r1, r2, lsl r3");
    197. 

  197.     REQUIRE(DisassembleArm(0xE1F01332) == "mvns r1, r2, lsr r3");
    198. 

  198.     REQUIRE(DisassembleArm(0xE1F01372) == "mvns r1, r2, ror r3");
    199. 

  199. 

  200.     REQUIRE(DisassembleArm(0xE3821004) == "orr r1, r2, #4");
    201. 

  201.     REQUIRE(DisassembleArm(0xE1821143) == "orr r1, r2, r3, asr #2");
    202. 

  202.     REQUIRE(DisassembleArm(0xE1821103) == "orr r1, r2, r3, lsl #2");
    203. 

  203.     REQUIRE(DisassembleArm(0xE1821123) == "orr r1, r2, r3, lsr #2");
    204. 

  204.     REQUIRE(DisassembleArm(0xE1821163) == "orr r1, r2, r3, ror #2");
    205. 

  205.     REQUIRE(DisassembleArm(0xE1821063) == "orr r1, r2, r3, rrx");
    206. 

  206.     REQUIRE(DisassembleArm(0xE1821003) == "orr r1, r2, r3");
    207. 

  207.     REQUIRE(DisassembleArm(0xE1821453) == "orr r1, r2, r3, asr r4");
    208. 

  208.     REQUIRE(DisassembleArm(0xE1821413) == "orr r1, r2, r3, lsl r4");
    209. 

  209.     REQUIRE(DisassembleArm(0xE1821433) == "orr r1, r2, r3, lsr r4");
    210. 

  210.     REQUIRE(DisassembleArm(0xE1821473) == "orr r1, r2, r3, ror r4");
    211. 

  211.     REQUIRE(DisassembleArm(0xE3921004) == "orrs r1, r2, #4");
    212. 

  212.     REQUIRE(DisassembleArm(0xE1921143) == "orrs r1, r2, r3, asr #2");
    213. 

  213.     REQUIRE(DisassembleArm(0xE1921103) == "orrs r1, r2, r3, lsl #2");
    214. 

  214.     REQUIRE(DisassembleArm(0xE1921123) == "orrs r1, r2, r3, lsr #2");
    215. 

  215.     REQUIRE(DisassembleArm(0xE1921163) == "orrs r1, r2, r3, ror #2");
    216. 

  216.     REQUIRE(DisassembleArm(0xE1921063) == "orrs r1, r2, r3, rrx");
    217. 

  217.     REQUIRE(DisassembleArm(0xE1921003) == "orrs r1, r2, r3");
    218. 

  218.     REQUIRE(DisassembleArm(0xE1921453) == "orrs r1, r2, r3, asr r4");
    219. 

  219.     REQUIRE(DisassembleArm(0xE1921413) == "orrs r1, r2, r3, lsl r4");
    220. 

  220.     REQUIRE(DisassembleArm(0xE1921433) == "orrs r1, r2, r3, lsr r4");
    221. 

  221.     REQUIRE(DisassembleArm(0xE1921473) == "orrs r1, r2, r3, ror r4");
    222. 

  222. 

  223.     REQUIRE(DisassembleArm(0xE2621004) == "rsb r1, r2, #4");
    224. 

  224.     REQUIRE(DisassembleArm(0xE0621143) == "rsb r1, r2, r3, asr #2");
    225. 

  225.     REQUIRE(DisassembleArm(0xE0621103) == "rsb r1, r2, r3, lsl #2");
    226. 

  226.     REQUIRE(DisassembleArm(0xE0621123) == "rsb r1, r2, r3, lsr #2");
    227. 

  227.     REQUIRE(DisassembleArm(0xE0621163) == "rsb r1, r2, r3, ror #2");
    228. 

  228.     REQUIRE(DisassembleArm(0xE0621063) == "rsb r1, r2, r3, rrx");
    229. 

  229.     REQUIRE(DisassembleArm(0xE0621003) == "rsb r1, r2, r3");
    230. 

  230.     REQUIRE(DisassembleArm(0xE0621453) == "rsb r1, r2, r3, asr r4");
    231. 

  231.     REQUIRE(DisassembleArm(0xE0621413) == "rsb r1, r2, r3, lsl r4");
    232. 

  232.     REQUIRE(DisassembleArm(0xE0621433) == "rsb r1, r2, r3, lsr r4");
    233. 

  233.     REQUIRE(DisassembleArm(0xE0621473) == "rsb r1, r2, r3, ror r4");
    234. 

  234.     REQUIRE(DisassembleArm(0xE2721004) == "rsbs r1, r2, #4");
    235. 

  235.     REQUIRE(DisassembleArm(0xE0721143) == "rsbs r1, r2, r3, asr #2");
    236. 

  236.     REQUIRE(DisassembleArm(0xE0721103) == "rsbs r1, r2, r3, lsl #2");
    237. 

  237.     REQUIRE(DisassembleArm(0xE0721123) == "rsbs r1, r2, r3, lsr #2");
    238. 

  238.     REQUIRE(DisassembleArm(0xE0721163) == "rsbs r1, r2, r3, ror #2");
    239. 

  239.     REQUIRE(DisassembleArm(0xE0721063) == "rsbs r1, r2, r3, rrx");
    240. 

  240.     REQUIRE(DisassembleArm(0xE0721003) == "rsbs r1, r2, r3");
    241. 

  241.     REQUIRE(DisassembleArm(0xE0721453) == "rsbs r1, r2, r3, asr r4");
    242. 

  242.     REQUIRE(DisassembleArm(0xE0721413) == "rsbs r1, r2, r3, lsl r4");
    243. 

  243.     REQUIRE(DisassembleArm(0xE0721433) == "rsbs r1, r2, r3, lsr r4");
    244. 

  244.     REQUIRE(DisassembleArm(0xE0721473) == "rsbs r1, r2, r3, ror r4");
    245. 

  245. 

  246.     REQUIRE(DisassembleArm(0xE2E21004) == "rsc r1, r2, #4");
    247. 

  247.     REQUIRE(DisassembleArm(0xE0E21143) == "rsc r1, r2, r3, asr #2");
    248. 

  248.     REQUIRE(DisassembleArm(0xE0E21103) == "rsc r1, r2, r3, lsl #2");
    249. 

  249.     REQUIRE(DisassembleArm(0xE0E21123) == "rsc r1, r2, r3, lsr #2");
    250. 

  250.     REQUIRE(DisassembleArm(0xE0E21163) == "rsc r1, r2, r3, ror #2");
    251. 

  251.     REQUIRE(DisassembleArm(0xE0E21063) == "rsc r1, r2, r3, rrx");
    252. 

  252.     REQUIRE(DisassembleArm(0xE0E21003) == "rsc r1, r2, r3");
    253. 

  253.     REQUIRE(DisassembleArm(0xE0E21453) == "rsc r1, r2, r3, asr r4");
    254. 

  254.     REQUIRE(DisassembleArm(0xE0E21413) == "rsc r1, r2, r3, lsl r4");
    255. 

  255.     REQUIRE(DisassembleArm(0xE0E21433) == "rsc r1, r2, r3, lsr r4");
    256. 

  256.     REQUIRE(DisassembleArm(0xE0E21473) == "rsc r1, r2, r3, ror r4");
    257. 

  257.     REQUIRE(DisassembleArm(0xE2F21004) == "rscs r1, r2, #4");
    258. 

  258.     REQUIRE(DisassembleArm(0xE0F21143) == "rscs r1, r2, r3, asr #2");
    259. 

  259.     REQUIRE(DisassembleArm(0xE0F21103) == "rscs r1, r2, r3, lsl #2");
    260. 

  260.     REQUIRE(DisassembleArm(0xE0F21123) == "rscs r1, r2, r3, lsr #2");
    261. 

  261.     REQUIRE(DisassembleArm(0xE0F21163) == "rscs r1, r2, r3, ror #2");
    262. 

  262.     REQUIRE(DisassembleArm(0xE0F21063) == "rscs r1, r2, r3, rrx");
    263. 

  263.     REQUIRE(DisassembleArm(0xE0F21003) == "rscs r1, r2, r3");
    264. 

  264.     REQUIRE(DisassembleArm(0xE0F21453) == "rscs r1, r2, r3, asr r4");
    265. 

  265.     REQUIRE(DisassembleArm(0xE0F21413) == "rscs r1, r2, r3, lsl r4");
    266. 

  266.     REQUIRE(DisassembleArm(0xE0F21433) == "rscs r1, r2, r3, lsr r4");
    267. 

  267.     REQUIRE(DisassembleArm(0xE0F21473) == "rscs r1, r2, r3, ror r4");
    268. 

  268. 

  269.     REQUIRE(DisassembleArm(0xE2C21004) == "sbc r1, r2, #4");
    270. 

  270.     REQUIRE(DisassembleArm(0xE0C21143) == "sbc r1, r2, r3, asr #2");
    271. 

  271.     REQUIRE(DisassembleArm(0xE0C21103) == "sbc r1, r2, r3, lsl #2");
    272. 

  272.     REQUIRE(DisassembleArm(0xE0C21123) == "sbc r1, r2, r3, lsr #2");
    273. 

  273.     REQUIRE(DisassembleArm(0xE0C21163) == "sbc r1, r2, r3, ror #2");
    274. 

  274.     REQUIRE(DisassembleArm(0xE0C21063) == "sbc r1, r2, r3, rrx");
    275. 

  275.     REQUIRE(DisassembleArm(0xE0C21003) == "sbc r1, r2, r3");
    276. 

  276.     REQUIRE(DisassembleArm(0xE0C21453) == "sbc r1, r2, r3, asr r4");
    277. 

  277.     REQUIRE(DisassembleArm(0xE0C21413) == "sbc r1, r2, r3, lsl r4");
    278. 

  278.     REQUIRE(DisassembleArm(0xE0C21433) == "sbc r1, r2, r3, lsr r4");
    279. 

  279.     REQUIRE(DisassembleArm(0xE0C21473) == "sbc r1, r2, r3, ror r4");
    280. 

  280.     REQUIRE(DisassembleArm(0xE2D21004) == "sbcs r1, r2, #4");
    281. 

  281.     REQUIRE(DisassembleArm(0xE0D21143) == "sbcs r1, r2, r3, asr #2");
    282. 

  282.     REQUIRE(DisassembleArm(0xE0D21103) == "sbcs r1, r2, r3, lsl #2");
    283. 

  283.     REQUIRE(DisassembleArm(0xE0D21123) == "sbcs r1, r2, r3, lsr #2");
    284. 

  284.     REQUIRE(DisassembleArm(0xE0D21163) == "sbcs r1, r2, r3, ror #2");
    285. 

  285.     REQUIRE(DisassembleArm(0xE0D21063) == "sbcs r1, r2, r3, rrx");
    286. 

  286.     REQUIRE(DisassembleArm(0xE0D21003) == "sbcs r1, r2, r3");
    287. 

  287.     REQUIRE(DisassembleArm(0xE0D21453) == "sbcs r1, r2, r3, asr r4");
    288. 

  288.     REQUIRE(DisassembleArm(0xE0D21413) == "sbcs r1, r2, r3, lsl r4");
    289. 

  289.     REQUIRE(DisassembleArm(0xE0D21433) == "sbcs r1, r2, r3, lsr r4");
    290. 

  290.     REQUIRE(DisassembleArm(0xE0D21473) == "sbcs r1, r2, r3, ror r4");
    291. 

  291. 

  292.     REQUIRE(DisassembleArm(0xE3310004) == "teq r1, #4");
    293. 

  293.     REQUIRE(DisassembleArm(0xE1310142) == "teq r1, r2, asr #2");
    294. 

  294.     REQUIRE(DisassembleArm(0xE1310102) == "teq r1, r2, lsl #2");
    295. 

  295.     REQUIRE(DisassembleArm(0xE1310122) == "teq r1, r2, lsr #2");
    296. 

  296.     REQUIRE(DisassembleArm(0xE1310162) == "teq r1, r2, ror #2");
    297. 

  297.     REQUIRE(DisassembleArm(0xE1310002) == "teq r1, r2");
    298. 

  298.     REQUIRE(DisassembleArm(0xE1310062) == "teq r1, r2, rrx");
    299. 

  299.     REQUIRE(DisassembleArm(0xE1310352) == "teq r1, r2, asr r3");
    300. 

  300.     REQUIRE(DisassembleArm(0xE1310312) == "teq r1, r2, lsl r3");
    301. 

  301.     REQUIRE(DisassembleArm(0xE1310332) == "teq r1, r2, lsr r3");
    302. 

  302.     REQUIRE(DisassembleArm(0xE1310372) == "teq r1, r2, ror r3");
    303. 

  303. 

  304.     REQUIRE(DisassembleArm(0xE3110004) == "tst r1, #4");
    305. 

  305.     REQUIRE(DisassembleArm(0xE1110142) == "tst r1, r2, asr #2");
    306. 

  306.     REQUIRE(DisassembleArm(0xE1110102) == "tst r1, r2, lsl #2");
    307. 

  307.     REQUIRE(DisassembleArm(0xE1110122) == "tst r1, r2, lsr #2");
    308. 

  308.     REQUIRE(DisassembleArm(0xE1110162) == "tst r1, r2, ror #2");
    309. 

  309.     REQUIRE(DisassembleArm(0xE1110002) == "tst r1, r2");
    310. 

  310.     REQUIRE(DisassembleArm(0xE1110062) == "tst r1, r2, rrx");
    311. 

  311.     REQUIRE(DisassembleArm(0xE1110352) == "tst r1, r2, asr r3");
    312. 

  312.     REQUIRE(DisassembleArm(0xE1110312) == "tst r1, r2, lsl r3");
    313. 

  313.     REQUIRE(DisassembleArm(0xE1110332) == "tst r1, r2, lsr r3");
    314. 

  314.     REQUIRE(DisassembleArm(0xE1110372) == "tst r1, r2, ror r3");
    315. 

  315. }
    316. 

  316. 

  317. TEST_CASE("Disassemble half-word multiply and multiply accumulate instructions", "[arm][disassembler]") {
    318. 

  318.     REQUIRE(DisassembleArm(0xE1003281) == "smlabb r0, r1, r2, r3");
    319. 

  319.     REQUIRE(DisassembleArm(0xE10032C1) == "smlabt r0, r1, r2, r3");
    320. 

  320.     REQUIRE(DisassembleArm(0xE10032A1) == "smlatb r0, r1, r2, r3");
    321. 

  321.     REQUIRE(DisassembleArm(0xE10032E1) == "smlatt r0, r1, r2, r3");
    322. 

  322. 

  323.     REQUIRE(DisassembleArm(0xE1203281) == "smlawb r0, r1, r2, r3");
    324. 

  324.     REQUIRE(DisassembleArm(0xE12032C1) == "smlawt r0, r1, r2, r3");
    325. 

  325. 

  326.     REQUIRE(DisassembleArm(0xE12002A1) == "smulwb r0, r1, r2");
    327. 

  327.     REQUIRE(DisassembleArm(0xE12002E1) == "smulwt r0, r1, r2");
    328. 

  328. 

  329.     REQUIRE(DisassembleArm(0xE1410382) == "smlalbb r0, r1, r2, r3");
    330. 

  330.     REQUIRE(DisassembleArm(0xE14103C2) == "smlalbt r0, r1, r2, r3");
    331. 

  331.     REQUIRE(DisassembleArm(0xE14103A2) == "smlaltb r0, r1, r2, r3");
    332. 

  332.     REQUIRE(DisassembleArm(0xE14103E2) == "smlaltt r0, r1, r2, r3");
    333. 

  333. 

  334.     REQUIRE(DisassembleArm(0xE1600281) == "smulbb r0, r1, r2");
    335. 

  335.     REQUIRE(DisassembleArm(0xE16002C1) == "smulbt r0, r1, r2");
    336. 

  336.     REQUIRE(DisassembleArm(0xE16002A1) == "smultb r0, r1, r2");
    337. 

  337.     REQUIRE(DisassembleArm(0xE16002E1) == "smultt r0, r1, r2");
    338. 

  338. }
    339. 

  339. 

  340. TEST_CASE("Disassemble multiply and multiply accumulate instructions", "[arm][disassembler]") {
    341. 

  341.     REQUIRE(DisassembleArm(0xE0214392) == "mla r1, r2, r3, r4");
    342. 

  342.     REQUIRE(DisassembleArm(0xE0314392) == "mlas r1, r2, r3, r4");
    343. 

  343. 

  344.     REQUIRE(DisassembleArm(0xE0010392) == "mul r1, r2, r3");
    345. 

  345.     REQUIRE(DisassembleArm(0xE0110392) == "muls r1, r2, r3");
    346. 

  346. 

  347.     // TODO: MLS should be here whenever it's supported.
    348. 

  348. 

  349.     REQUIRE(DisassembleArm(0xE0E21493) == "smlal r1, r2, r3, r4");
    350. 

  350.     REQUIRE(DisassembleArm(0xE0F21493) == "smlals r1, r2, r3, r4");
    351. 

  351. 

  352.     REQUIRE(DisassembleArm(0xE0C21493) == "smull r1, r2, r3, r4");
    353. 

  353.     REQUIRE(DisassembleArm(0xE0D21493) == "smulls r1, r2, r3, r4");
    354. 

  354. 

  355.     REQUIRE(DisassembleArm(0xE0421493) == "umaal r1, r2, r3, r4");
    356. 

  356. 

  357.     REQUIRE(DisassembleArm(0xE0A21493) == "umlal r1, r2, r3, r4");
    358. 

  358.     REQUIRE(DisassembleArm(0xE0B21493) == "umlals r1, r2, r3, r4");
    359. 

  359. 

  360.     REQUIRE(DisassembleArm(0xE0821493) == "umull r1, r2, r3, r4");
    361. 

  361.     REQUIRE(DisassembleArm(0xE0921493) == "umulls r1, r2, r3, r4");
    362. 

  362. }
    363. 

  363. 

  364. TEST_CASE("Disassemble synchronization primitive instructions", "[arm][disassembler]") {
    365. 

  365.     REQUIRE(DisassembleArm(0xE1921F9F) == "ldrex r1, [r2]");
    366. 

  366.     REQUIRE(DisassembleArm(0xE1D21F9F) == "ldrexb r1, [r2]");
    367. 

  367.     REQUIRE(DisassembleArm(0xE1B31F9F) == "ldrexd r1, r2, [r3]");
    368. 

  368.     REQUIRE(DisassembleArm(0xE1F21F9F) == "ldrexh r1, [r2]");
    369. 

  369. 

  370.     REQUIRE(DisassembleArm(0xE1831F92) == "strex r1, r2, [r3]");
    371. 

  371.     REQUIRE(DisassembleArm(0xE1C31F92) == "strexb r1, r2, [r3]");
    372. 

  372.     REQUIRE(DisassembleArm(0xE1A41F92) == "strexd r1, r2, r3, [r4]");
    373. 

  373.     REQUIRE(DisassembleArm(0xE1E31F92) == "strexh r1, r2, [r3]");
    374. 

  374. 

  375.     REQUIRE(DisassembleArm(0xE1031092) == "swp r1, r2, [r3]");
    376. 

  376.     REQUIRE(DisassembleArm(0xE1431092) == "swpb r1, r2, [r3]");
    377. 

  377. }
    378. 

  378. 

  379. TEST_CASE("Disassemble load / store multiple instructions", "[arm][disassembler]") {
    380. 

  380.     REQUIRE(DisassembleArm(0xE92D500F) == "stmdb sp!, {r0, r1, r2, r3, r12, lr}");
    381. 

  381. }
    382. 

  382.