SynopsysVCS 971 B

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  1. # Waveform formats
  2. *.vcd
  3. *.vpd
  4. *.evcd
  5. *.fsdb
  6. # Default name of the simulation executable. A different name can be
  7. # specified with this switch (the associated daidir database name is
  8. # also taken from here): -o <path>/<filename>
  9. simv
  10. # Generated for Verilog and VHDL top configs
  11. simv.daidir/
  12. simv.db.dir/
  13. # Infrastructure necessary to co-simulate SystemC models with
  14. # Verilog/VHDL models. An alternate directory may be specified with this
  15. # switch: -Mdir=<directory_path>
  16. csrc/
  17. # Log file - the following switch allows to specify the file that will be
  18. # used to write all messages from simulation: -l <filename>
  19. *.log
  20. # Coverage results (generated with urg) and database location. The
  21. # following switch can also be used: urg -dir <coverage_directory>.vdb
  22. simv.vdb/
  23. urgReport/
  24. # DVE and UCLI related files.
  25. DVEfiles/
  26. ucli.key
  27. # When the design is elaborated for DirectC, the following file is created
  28. # with declarations for C/C++ functions.
  29. vc_hdrs.h