flashrom_write.log 5.8 KB

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  1. flashrom v0.9.8-r1889 on Linux 3.13.0-39-lowlatency (i686)
  2. flashrom is free software, get the source code at http://www.flashrom.org
  3. flashrom was built with libpci 3.2.1, GCC 4.8.2, little endian
  4. Command line (7 args): flashrom -V -p internal:laptop=force_I_want_a_brick -w ../t500recipe.rom -c MX25L3205D/MX25L3208D
  5. Calibrating delay loop... OS timer resolution is 1 usecs, 789M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1013 us, 10000 myus = 10017 us, 4 myus = 6 us, OK.
  6. Initializing internal programmer
  7. No coreboot table found.
  8. Using Internal DMI decoder.
  9. DMI string chassis-type: "Notebook"
  10. Laptop detected via DMI.
  11. DMI string system-manufacturer: "LENOVO"
  12. DMI string system-product-name: "224397G"
  13. DMI string system-version: "ThinkPad T500"
  14. DMI string baseboard-manufacturer: "LENOVO"
  15. DMI string baseboard-product-name: "224397G"
  16. DMI string baseboard-version: "Not Available"
  17. ========================================================================
  18. WARNING! You seem to be running flashrom on an unsupported laptop.
  19. Laptops, notebooks and netbooks are difficult to support and we
  20. recommend to use the vendor flashing utility. The embedded controller
  21. (EC) in these machines often interacts badly with flashing.
  22. See the manpage and http://www.flashrom.org/Laptops for details.
  23. If flash is shared with the EC, erase is guaranteed to brick your laptop
  24. and write may brick your laptop.
  25. Read and probe may irritate your EC and cause fan failure, backlight
  26. failure and sudden poweroff.
  27. You have been warned.
  28. ========================================================================
  29. Proceeding anyway because user forced us to.
  30. Found chipset "Intel ICH9M" with PCI ID 8086:2919.
  31. Enabling flash write... Root Complex Register Block address = 0xfed1c000
  32. GCS = 0x380461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI)
  33. Top Swap: not enabled
  34. 0xfff80000/0xffb80000 FWH IDSEL: 0x0
  35. 0xfff00000/0xffb00000 FWH IDSEL: 0x0
  36. 0xffe80000/0xffa80000 FWH IDSEL: 0x0
  37. 0xffe00000/0xffa00000 FWH IDSEL: 0x0
  38. 0xffd80000/0xff980000 FWH IDSEL: 0x0
  39. 0xffd00000/0xff900000 FWH IDSEL: 0x0
  40. 0xffc80000/0xff880000 FWH IDSEL: 0x0
  41. 0xffc00000/0xff800000 FWH IDSEL: 0x0
  42. 0xff700000/0xff300000 FWH IDSEL: 0x4
  43. 0xff600000/0xff200000 FWH IDSEL: 0x5
  44. 0xff500000/0xff100000 FWH IDSEL: 0x6
  45. 0xff400000/0xff000000 FWH IDSEL: 0x7
  46. 0xfff80000/0xffb80000 FWH decode enabled
  47. 0xfff00000/0xffb00000 FWH decode enabled
  48. 0xffe80000/0xffa80000 FWH decode enabled
  49. 0xffe00000/0xffa00000 FWH decode enabled
  50. 0xffd80000/0xff980000 FWH decode enabled
  51. 0xffd00000/0xff900000 FWH decode enabled
  52. 0xffc80000/0xff880000 FWH decode enabled
  53. 0xffc00000/0xff800000 FWH decode enabled
  54. 0xff700000/0xff300000 FWH decode disabled
  55. 0xff600000/0xff200000 FWH decode disabled
  56. 0xff500000/0xff100000 FWH decode disabled
  57. 0xff400000/0xff000000 FWH decode disabled
  58. Maximum FWH chip size: 0x400000 bytes
  59. SPI Read Configuration: prefetching disabled, caching enabled,
  60. BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
  61. SPIBAR = 0xb76e8000 + 0x3800
  62. 0x04: 0xe008 (HSFS)
  63. HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
  64. Warning: SPI Configuration Lockdown activated.
  65. Reading OPCODES... done
  66. 0x06: 0x3f04 (HSFC)
  67. HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0
  68. 0x50: 0x00001a1b (FRAP)
  69. BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b
  70. 0x54: 0x00000000 FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
  71. 0x58: 0x03ff0200 FREG1: BIOS region (0x00200000-0x003fffff) is read-write.
  72. 0x5C: 0x01f50001 FREG2: Warning: Management Engine region (0x00001000-0x001f5fff) is locked.
  73. 0x60: 0x01f701f6 FREG3: Gigabit Ethernet region (0x001f6000-0x001f7fff) is read-write.
  74. 0x64: 0x01ff01f8 FREG4: Platform Data region (0x001f8000-0x001fffff) is read-write.
  75. Not all flash regions are freely accessible by flashrom. This is most likely
  76. due to an active ME. Please see http://flashrom.org/ME for details.
  77. 0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only.
  78. 0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked.
  79. Writes have been disabled for safety reasons. You can enforce write
  80. support with the ich_spi_force programmer option, but you will most likely
  81. harm your hardware! If you force flashrom you will get no support if
  82. something breaks. On a few mainboards it is possible to enable write
  83. access by setting a jumper (see its documentation or the board itself).
  84. 0x90: 0x04 (SSFS)
  85. SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
  86. 0x91: 0x000000 (SSFC)
  87. SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0
  88. 0x94: 0x5006 (PREOP)
  89. 0x96: 0x143b (OPTYPE)
  90. 0x98: 0x05200302 (OPMENU)
  91. 0x9C: 0x0601209f (OPMENU+4)
  92. 0xA0: 0x00000000 (BBAR)
  93. 0xC4: 0x00002005 (LVSCC)
  94. LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
  95. 0xC8: 0x00002005 (UVSCC)
  96. UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20
  97. 0xD0: 0x00000000 (FPB)
  98. OK.
  99. The following protocols are supported: FWH, SPI.
  100. Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
  101. Found Macronix flash chip "MX25L3205D/MX25L3208D" (4096 kB, SPI) mapped at physical address 0xffc00000.
  102. Chip status register is 0x00.
  103. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set
  104. Chip status register: Bit 6 is not set
  105. Chip status register: Block Protect 3 (BP3) is not set
  106. Chip status register: Block Protect 2 (BP2) is not set
  107. Chip status register: Block Protect 1 (BP1) is not set
  108. Chip status register: Block Protect 0 (BP0) is not set
  109. Chip status register: Write Enable Latch (WEL) is not set
  110. Chip status register: Write In Progress (WIP/BUSY) is not set
  111. This chip may contain one-time programmable memory. flashrom cannot read
  112. and may never be able to write it, hence it may not be able to completely
  113. clone the contents of this chip (see man page for details).
  114. Write/erase is not working yet on your programmer in its current configuration.
  115. Aborting.
  116. Restoring MMIO space at 0xb76eb8a0
  117. Restoring PCI config space for 00:1f:0 reg 0xdc