qspinlock_paravirt.h 8.7 KB

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  1. #ifndef _GEN_PV_LOCK_SLOWPATH
  2. #error "do not include this file"
  3. #endif
  4. #include <linux/hash.h>
  5. #include <linux/bootmem.h>
  6. /*
  7. * Implement paravirt qspinlocks; the general idea is to halt the vcpus instead
  8. * of spinning them.
  9. *
  10. * This relies on the architecture to provide two paravirt hypercalls:
  11. *
  12. * pv_wait(u8 *ptr, u8 val) -- suspends the vcpu if *ptr == val
  13. * pv_kick(cpu) -- wakes a suspended vcpu
  14. *
  15. * Using these we implement __pv_queued_spin_lock_slowpath() and
  16. * __pv_queued_spin_unlock() to replace native_queued_spin_lock_slowpath() and
  17. * native_queued_spin_unlock().
  18. */
  19. #define _Q_SLOW_VAL (3U << _Q_LOCKED_OFFSET)
  20. enum vcpu_state {
  21. vcpu_running = 0,
  22. vcpu_halted,
  23. };
  24. struct pv_node {
  25. struct mcs_spinlock mcs;
  26. struct mcs_spinlock __res[3];
  27. int cpu;
  28. u8 state;
  29. };
  30. /*
  31. * Lock and MCS node addresses hash table for fast lookup
  32. *
  33. * Hashing is done on a per-cacheline basis to minimize the need to access
  34. * more than one cacheline.
  35. *
  36. * Dynamically allocate a hash table big enough to hold at least 4X the
  37. * number of possible cpus in the system. Allocation is done on page
  38. * granularity. So the minimum number of hash buckets should be at least
  39. * 256 (64-bit) or 512 (32-bit) to fully utilize a 4k page.
  40. *
  41. * Since we should not be holding locks from NMI context (very rare indeed) the
  42. * max load factor is 0.75, which is around the point where open addressing
  43. * breaks down.
  44. *
  45. */
  46. struct pv_hash_entry {
  47. struct qspinlock *lock;
  48. struct pv_node *node;
  49. };
  50. #define PV_HE_PER_LINE (SMP_CACHE_BYTES / sizeof(struct pv_hash_entry))
  51. #define PV_HE_MIN (PAGE_SIZE / sizeof(struct pv_hash_entry))
  52. static struct pv_hash_entry *pv_lock_hash;
  53. static unsigned int pv_lock_hash_bits __read_mostly;
  54. /*
  55. * Allocate memory for the PV qspinlock hash buckets
  56. *
  57. * This function should be called from the paravirt spinlock initialization
  58. * routine.
  59. */
  60. void __init __pv_init_lock_hash(void)
  61. {
  62. int pv_hash_size = ALIGN(4 * num_possible_cpus(), PV_HE_PER_LINE);
  63. if (pv_hash_size < PV_HE_MIN)
  64. pv_hash_size = PV_HE_MIN;
  65. /*
  66. * Allocate space from bootmem which should be page-size aligned
  67. * and hence cacheline aligned.
  68. */
  69. pv_lock_hash = alloc_large_system_hash("PV qspinlock",
  70. sizeof(struct pv_hash_entry),
  71. pv_hash_size, 0, HASH_EARLY,
  72. &pv_lock_hash_bits, NULL,
  73. pv_hash_size, pv_hash_size);
  74. }
  75. #define for_each_hash_entry(he, offset, hash) \
  76. for (hash &= ~(PV_HE_PER_LINE - 1), he = &pv_lock_hash[hash], offset = 0; \
  77. offset < (1 << pv_lock_hash_bits); \
  78. offset++, he = &pv_lock_hash[(hash + offset) & ((1 << pv_lock_hash_bits) - 1)])
  79. static struct qspinlock **pv_hash(struct qspinlock *lock, struct pv_node *node)
  80. {
  81. unsigned long offset, hash = hash_ptr(lock, pv_lock_hash_bits);
  82. struct pv_hash_entry *he;
  83. for_each_hash_entry(he, offset, hash) {
  84. if (!cmpxchg(&he->lock, NULL, lock)) {
  85. WRITE_ONCE(he->node, node);
  86. return &he->lock;
  87. }
  88. }
  89. /*
  90. * Hard assume there is a free entry for us.
  91. *
  92. * This is guaranteed by ensuring every blocked lock only ever consumes
  93. * a single entry, and since we only have 4 nesting levels per CPU
  94. * and allocated 4*nr_possible_cpus(), this must be so.
  95. *
  96. * The single entry is guaranteed by having the lock owner unhash
  97. * before it releases.
  98. */
  99. BUG();
  100. }
  101. static struct pv_node *pv_unhash(struct qspinlock *lock)
  102. {
  103. unsigned long offset, hash = hash_ptr(lock, pv_lock_hash_bits);
  104. struct pv_hash_entry *he;
  105. struct pv_node *node;
  106. for_each_hash_entry(he, offset, hash) {
  107. if (READ_ONCE(he->lock) == lock) {
  108. node = READ_ONCE(he->node);
  109. WRITE_ONCE(he->lock, NULL);
  110. return node;
  111. }
  112. }
  113. /*
  114. * Hard assume we'll find an entry.
  115. *
  116. * This guarantees a limited lookup time and is itself guaranteed by
  117. * having the lock owner do the unhash -- IFF the unlock sees the
  118. * SLOW flag, there MUST be a hash entry.
  119. */
  120. BUG();
  121. }
  122. /*
  123. * Initialize the PV part of the mcs_spinlock node.
  124. */
  125. static void pv_init_node(struct mcs_spinlock *node)
  126. {
  127. struct pv_node *pn = (struct pv_node *)node;
  128. BUILD_BUG_ON(sizeof(struct pv_node) > 5*sizeof(struct mcs_spinlock));
  129. pn->cpu = smp_processor_id();
  130. pn->state = vcpu_running;
  131. }
  132. /*
  133. * Wait for node->locked to become true, halt the vcpu after a short spin.
  134. * pv_kick_node() is used to wake the vcpu again.
  135. */
  136. static void pv_wait_node(struct mcs_spinlock *node)
  137. {
  138. struct pv_node *pn = (struct pv_node *)node;
  139. int loop;
  140. for (;;) {
  141. for (loop = SPIN_THRESHOLD; loop; loop--) {
  142. if (READ_ONCE(node->locked))
  143. return;
  144. cpu_relax();
  145. }
  146. /*
  147. * Order pn->state vs pn->locked thusly:
  148. *
  149. * [S] pn->state = vcpu_halted [S] next->locked = 1
  150. * MB MB
  151. * [L] pn->locked [RmW] pn->state = vcpu_running
  152. *
  153. * Matches the xchg() from pv_kick_node().
  154. */
  155. smp_store_mb(pn->state, vcpu_halted);
  156. if (!READ_ONCE(node->locked))
  157. pv_wait(&pn->state, vcpu_halted);
  158. /*
  159. * Reset the vCPU state to avoid unncessary CPU kicking
  160. */
  161. WRITE_ONCE(pn->state, vcpu_running);
  162. /*
  163. * If the locked flag is still not set after wakeup, it is a
  164. * spurious wakeup and the vCPU should wait again. However,
  165. * there is a pretty high overhead for CPU halting and kicking.
  166. * So it is better to spin for a while in the hope that the
  167. * MCS lock will be released soon.
  168. */
  169. }
  170. /*
  171. * By now our node->locked should be 1 and our caller will not actually
  172. * spin-wait for it. We do however rely on our caller to do a
  173. * load-acquire for us.
  174. */
  175. }
  176. /*
  177. * Called after setting next->locked = 1, used to wake those stuck in
  178. * pv_wait_node().
  179. */
  180. static void pv_kick_node(struct mcs_spinlock *node)
  181. {
  182. struct pv_node *pn = (struct pv_node *)node;
  183. /*
  184. * Note that because node->locked is already set, this actual
  185. * mcs_spinlock entry could be re-used already.
  186. *
  187. * This should be fine however, kicking people for no reason is
  188. * harmless.
  189. *
  190. * See the comment in pv_wait_node().
  191. */
  192. if (xchg(&pn->state, vcpu_running) == vcpu_halted)
  193. pv_kick(pn->cpu);
  194. }
  195. /*
  196. * Wait for l->locked to become clear; halt the vcpu after a short spin.
  197. * __pv_queued_spin_unlock() will wake us.
  198. */
  199. static void pv_wait_head(struct qspinlock *lock, struct mcs_spinlock *node)
  200. {
  201. struct pv_node *pn = (struct pv_node *)node;
  202. struct __qspinlock *l = (void *)lock;
  203. struct qspinlock **lp = NULL;
  204. int loop;
  205. for (;;) {
  206. for (loop = SPIN_THRESHOLD; loop; loop--) {
  207. if (!READ_ONCE(l->locked))
  208. return;
  209. cpu_relax();
  210. }
  211. WRITE_ONCE(pn->state, vcpu_halted);
  212. if (!lp) { /* ONCE */
  213. lp = pv_hash(lock, pn);
  214. /*
  215. * lp must be set before setting _Q_SLOW_VAL
  216. *
  217. * [S] lp = lock [RmW] l = l->locked = 0
  218. * MB MB
  219. * [S] l->locked = _Q_SLOW_VAL [L] lp
  220. *
  221. * Matches the cmpxchg() in __pv_queued_spin_unlock().
  222. */
  223. if (!cmpxchg(&l->locked, _Q_LOCKED_VAL, _Q_SLOW_VAL)) {
  224. /*
  225. * The lock is free and _Q_SLOW_VAL has never
  226. * been set. Therefore we need to unhash before
  227. * getting the lock.
  228. */
  229. WRITE_ONCE(*lp, NULL);
  230. return;
  231. }
  232. }
  233. pv_wait(&l->locked, _Q_SLOW_VAL);
  234. /*
  235. * The unlocker should have freed the lock before kicking the
  236. * CPU. So if the lock is still not free, it is a spurious
  237. * wakeup and so the vCPU should wait again after spinning for
  238. * a while.
  239. */
  240. }
  241. /*
  242. * Lock is unlocked now; the caller will acquire it without waiting.
  243. * As with pv_wait_node() we rely on the caller to do a load-acquire
  244. * for us.
  245. */
  246. }
  247. /*
  248. * PV version of the unlock function to be used in stead of
  249. * queued_spin_unlock().
  250. */
  251. __visible void __pv_queued_spin_unlock(struct qspinlock *lock)
  252. {
  253. struct __qspinlock *l = (void *)lock;
  254. struct pv_node *node;
  255. /*
  256. * We must not unlock if SLOW, because in that case we must first
  257. * unhash. Otherwise it would be possible to have multiple @lock
  258. * entries, which would be BAD.
  259. */
  260. if (likely(cmpxchg(&l->locked, _Q_LOCKED_VAL, 0) == _Q_LOCKED_VAL))
  261. return;
  262. /*
  263. * Since the above failed to release, this must be the SLOW path.
  264. * Therefore start by looking up the blocked node and unhashing it.
  265. */
  266. node = pv_unhash(lock);
  267. /*
  268. * Now that we have a reference to the (likely) blocked pv_node,
  269. * release the lock.
  270. */
  271. smp_store_release(&l->locked, 0);
  272. /*
  273. * At this point the memory pointed at by lock can be freed/reused,
  274. * however we can still use the pv_node to kick the CPU.
  275. */
  276. if (READ_ONCE(node->state) == vcpu_halted)
  277. pv_kick(node->cpu);
  278. }
  279. /*
  280. * Include the architecture specific callee-save thunk of the
  281. * __pv_queued_spin_unlock(). This thunk is put together with
  282. * __pv_queued_spin_unlock() near the top of the file to make sure
  283. * that the callee-save thunk and the real unlock function are close
  284. * to each other sharing consecutive instruction cachelines.
  285. */
  286. #include <asm/qspinlock_paravirt.h>