hdaudio.h 17 KB

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  1. /*
  2. * HD-audio core stuff
  3. */
  4. #ifndef __SOUND_HDAUDIO_H
  5. #define __SOUND_HDAUDIO_H
  6. #include <linux/device.h>
  7. #include <linux/interrupt.h>
  8. #include <linux/timecounter.h>
  9. #include <sound/core.h>
  10. #include <sound/memalloc.h>
  11. #include <sound/hda_verbs.h>
  12. #include <drm/i915_component.h>
  13. /* codec node id */
  14. typedef u16 hda_nid_t;
  15. struct hdac_bus;
  16. struct hdac_stream;
  17. struct hdac_device;
  18. struct hdac_driver;
  19. struct hdac_widget_tree;
  20. /*
  21. * exported bus type
  22. */
  23. extern struct bus_type snd_hda_bus_type;
  24. /*
  25. * HDA device table
  26. */
  27. struct hda_device_id {
  28. __u32 vendor_id;
  29. __u32 rev_id;
  30. const char *name;
  31. unsigned long driver_data;
  32. };
  33. /*
  34. * generic arrays
  35. */
  36. struct snd_array {
  37. unsigned int used;
  38. unsigned int alloced;
  39. unsigned int elem_size;
  40. unsigned int alloc_align;
  41. void *list;
  42. };
  43. /*
  44. * HD-audio codec base device
  45. */
  46. struct hdac_device {
  47. struct device dev;
  48. int type;
  49. struct hdac_bus *bus;
  50. unsigned int addr; /* codec address */
  51. struct list_head list; /* list point for bus codec_list */
  52. hda_nid_t afg; /* AFG node id */
  53. hda_nid_t mfg; /* MFG node id */
  54. /* ids */
  55. unsigned int vendor_id;
  56. unsigned int subsystem_id;
  57. unsigned int revision_id;
  58. unsigned int afg_function_id;
  59. unsigned int mfg_function_id;
  60. unsigned int afg_unsol:1;
  61. unsigned int mfg_unsol:1;
  62. unsigned int power_caps; /* FG power caps */
  63. const char *vendor_name; /* codec vendor name */
  64. const char *chip_name; /* codec chip name */
  65. /* verb exec op override */
  66. int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
  67. unsigned int flags, unsigned int *res);
  68. /* widgets */
  69. unsigned int num_nodes;
  70. hda_nid_t start_nid, end_nid;
  71. /* misc flags */
  72. atomic_t in_pm; /* suspend/resume being performed */
  73. bool link_power_control:1;
  74. /* sysfs */
  75. struct hdac_widget_tree *widgets;
  76. /* regmap */
  77. struct regmap *regmap;
  78. struct snd_array vendor_verbs;
  79. bool lazy_cache:1; /* don't wake up for writes */
  80. bool caps_overwriting:1; /* caps overwrite being in process */
  81. bool cache_coef:1; /* cache COEF read/write too */
  82. };
  83. /* device/driver type used for matching */
  84. enum {
  85. HDA_DEV_CORE,
  86. HDA_DEV_LEGACY,
  87. HDA_DEV_ASOC,
  88. };
  89. /* direction */
  90. enum {
  91. HDA_INPUT, HDA_OUTPUT
  92. };
  93. #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
  94. int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
  95. const char *name, unsigned int addr);
  96. void snd_hdac_device_exit(struct hdac_device *dev);
  97. int snd_hdac_device_register(struct hdac_device *codec);
  98. void snd_hdac_device_unregister(struct hdac_device *codec);
  99. int snd_hdac_refresh_widgets(struct hdac_device *codec);
  100. unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
  101. unsigned int verb, unsigned int parm);
  102. int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
  103. unsigned int flags, unsigned int *res);
  104. int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
  105. unsigned int verb, unsigned int parm, unsigned int *res);
  106. int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
  107. unsigned int *res);
  108. int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
  109. int parm);
  110. int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
  111. unsigned int parm, unsigned int val);
  112. int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
  113. hda_nid_t *conn_list, int max_conns);
  114. int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
  115. hda_nid_t *start_id);
  116. unsigned int snd_hdac_calc_stream_format(unsigned int rate,
  117. unsigned int channels,
  118. unsigned int format,
  119. unsigned int maxbps,
  120. unsigned short spdif_ctls);
  121. int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
  122. u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
  123. bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
  124. unsigned int format);
  125. /**
  126. * snd_hdac_read_parm - read a codec parameter
  127. * @codec: the codec object
  128. * @nid: NID to read a parameter
  129. * @parm: parameter to read
  130. *
  131. * Returns -1 for error. If you need to distinguish the error more
  132. * strictly, use _snd_hdac_read_parm() directly.
  133. */
  134. static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
  135. int parm)
  136. {
  137. unsigned int val;
  138. return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
  139. }
  140. #ifdef CONFIG_PM
  141. void snd_hdac_power_up(struct hdac_device *codec);
  142. void snd_hdac_power_down(struct hdac_device *codec);
  143. void snd_hdac_power_up_pm(struct hdac_device *codec);
  144. void snd_hdac_power_down_pm(struct hdac_device *codec);
  145. #else
  146. static inline void snd_hdac_power_up(struct hdac_device *codec) {}
  147. static inline void snd_hdac_power_down(struct hdac_device *codec) {}
  148. static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
  149. static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
  150. #endif
  151. /*
  152. * HD-audio codec base driver
  153. */
  154. struct hdac_driver {
  155. struct device_driver driver;
  156. int type;
  157. const struct hda_device_id *id_table;
  158. int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
  159. void (*unsol_event)(struct hdac_device *dev, unsigned int event);
  160. };
  161. #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
  162. const struct hda_device_id *
  163. hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
  164. /*
  165. * Bus verb operators
  166. */
  167. struct hdac_bus_ops {
  168. /* send a single command */
  169. int (*command)(struct hdac_bus *bus, unsigned int cmd);
  170. /* get a response from the last command */
  171. int (*get_response)(struct hdac_bus *bus, unsigned int addr,
  172. unsigned int *res);
  173. /* control the link power */
  174. int (*link_power)(struct hdac_bus *bus, bool enable);
  175. };
  176. /*
  177. * Lowlevel I/O operators
  178. */
  179. struct hdac_io_ops {
  180. /* mapped register accesses */
  181. void (*reg_writel)(u32 value, u32 __iomem *addr);
  182. u32 (*reg_readl)(u32 __iomem *addr);
  183. void (*reg_writew)(u16 value, u16 __iomem *addr);
  184. u16 (*reg_readw)(u16 __iomem *addr);
  185. void (*reg_writeb)(u8 value, u8 __iomem *addr);
  186. u8 (*reg_readb)(u8 __iomem *addr);
  187. /* Allocation ops */
  188. int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
  189. struct snd_dma_buffer *buf);
  190. void (*dma_free_pages)(struct hdac_bus *bus,
  191. struct snd_dma_buffer *buf);
  192. };
  193. #define HDA_UNSOL_QUEUE_SIZE 64
  194. #define HDA_MAX_CODECS 8 /* limit by controller side */
  195. /* HD Audio class code */
  196. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  197. /*
  198. * CORB/RIRB
  199. *
  200. * Each CORB entry is 4byte, RIRB is 8byte
  201. */
  202. struct hdac_rb {
  203. __le32 *buf; /* virtual address of CORB/RIRB buffer */
  204. dma_addr_t addr; /* physical address of CORB/RIRB buffer */
  205. unsigned short rp, wp; /* RIRB read/write pointers */
  206. int cmds[HDA_MAX_CODECS]; /* number of pending requests */
  207. u32 res[HDA_MAX_CODECS]; /* last read value */
  208. };
  209. /*
  210. * HD-audio bus base driver
  211. */
  212. struct hdac_bus {
  213. struct device *dev;
  214. const struct hdac_bus_ops *ops;
  215. const struct hdac_io_ops *io_ops;
  216. /* h/w resources */
  217. unsigned long addr;
  218. void __iomem *remap_addr;
  219. int irq;
  220. /* codec linked list */
  221. struct list_head codec_list;
  222. unsigned int num_codecs;
  223. /* link caddr -> codec */
  224. struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
  225. /* unsolicited event queue */
  226. u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
  227. unsigned int unsol_rp, unsol_wp;
  228. struct work_struct unsol_work;
  229. /* bit flags of detected codecs */
  230. unsigned long codec_mask;
  231. /* bit flags of powered codecs */
  232. unsigned long codec_powered;
  233. /* CORB/RIRB */
  234. struct hdac_rb corb;
  235. struct hdac_rb rirb;
  236. unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
  237. /* CORB/RIRB and position buffers */
  238. struct snd_dma_buffer rb;
  239. struct snd_dma_buffer posbuf;
  240. /* hdac_stream linked list */
  241. struct list_head stream_list;
  242. /* operation state */
  243. bool chip_init:1; /* h/w initialized */
  244. /* behavior flags */
  245. bool sync_write:1; /* sync after verb write */
  246. bool use_posbuf:1; /* use position buffer */
  247. bool snoop:1; /* enable snooping */
  248. bool align_bdle_4k:1; /* BDLE align 4K boundary */
  249. bool reverse_assign:1; /* assign devices in reverse order */
  250. bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
  251. int bdl_pos_adj; /* BDL position adjustment */
  252. /* locks */
  253. spinlock_t reg_lock;
  254. struct mutex cmd_mutex;
  255. /* i915 component interface */
  256. struct i915_audio_component *audio_component;
  257. int i915_power_refcount;
  258. };
  259. int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
  260. const struct hdac_bus_ops *ops,
  261. const struct hdac_io_ops *io_ops);
  262. void snd_hdac_bus_exit(struct hdac_bus *bus);
  263. int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
  264. unsigned int cmd, unsigned int *res);
  265. int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
  266. unsigned int cmd, unsigned int *res);
  267. void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
  268. int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
  269. void snd_hdac_bus_remove_device(struct hdac_bus *bus,
  270. struct hdac_device *codec);
  271. static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
  272. {
  273. set_bit(codec->addr, &codec->bus->codec_powered);
  274. }
  275. static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
  276. {
  277. clear_bit(codec->addr, &codec->bus->codec_powered);
  278. }
  279. int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
  280. int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
  281. unsigned int *res);
  282. int snd_hdac_link_power(struct hdac_device *codec, bool enable);
  283. bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
  284. void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
  285. void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
  286. void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
  287. void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
  288. void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
  289. void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
  290. void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
  291. void (*ack)(struct hdac_bus *,
  292. struct hdac_stream *));
  293. int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
  294. void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
  295. /*
  296. * macros for easy use
  297. */
  298. #define _snd_hdac_chip_write(type, chip, reg, value) \
  299. ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
  300. #define _snd_hdac_chip_read(type, chip, reg) \
  301. ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
  302. /* read/write a register, pass without AZX_REG_ prefix */
  303. #define snd_hdac_chip_writel(chip, reg, value) \
  304. _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
  305. #define snd_hdac_chip_writew(chip, reg, value) \
  306. _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
  307. #define snd_hdac_chip_writeb(chip, reg, value) \
  308. _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
  309. #define snd_hdac_chip_readl(chip, reg) \
  310. _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
  311. #define snd_hdac_chip_readw(chip, reg) \
  312. _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
  313. #define snd_hdac_chip_readb(chip, reg) \
  314. _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
  315. /* update a register, pass without AZX_REG_ prefix */
  316. #define snd_hdac_chip_updatel(chip, reg, mask, val) \
  317. snd_hdac_chip_writel(chip, reg, \
  318. (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
  319. #define snd_hdac_chip_updatew(chip, reg, mask, val) \
  320. snd_hdac_chip_writew(chip, reg, \
  321. (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
  322. #define snd_hdac_chip_updateb(chip, reg, mask, val) \
  323. snd_hdac_chip_writeb(chip, reg, \
  324. (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
  325. /*
  326. * HD-audio stream
  327. */
  328. struct hdac_stream {
  329. struct hdac_bus *bus;
  330. struct snd_dma_buffer bdl; /* BDL buffer */
  331. __le32 *posbuf; /* position buffer pointer */
  332. int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
  333. unsigned int bufsize; /* size of the play buffer in bytes */
  334. unsigned int period_bytes; /* size of the period in bytes */
  335. unsigned int frags; /* number for period in the play buffer */
  336. unsigned int fifo_size; /* FIFO size */
  337. void __iomem *sd_addr; /* stream descriptor pointer */
  338. u32 sd_int_sta_mask; /* stream int status mask */
  339. /* pcm support */
  340. struct snd_pcm_substream *substream; /* assigned substream,
  341. * set in PCM open
  342. */
  343. unsigned int format_val; /* format value to be set in the
  344. * controller and the codec
  345. */
  346. unsigned char stream_tag; /* assigned stream */
  347. unsigned char index; /* stream index */
  348. int assigned_key; /* last device# key assigned to */
  349. bool opened:1;
  350. bool running:1;
  351. bool prepared:1;
  352. bool no_period_wakeup:1;
  353. bool locked:1;
  354. /* timestamp */
  355. unsigned long start_wallclk; /* start + minimum wallclk */
  356. unsigned long period_wallclk; /* wallclk for period */
  357. struct timecounter tc;
  358. struct cyclecounter cc;
  359. int delay_negative_threshold;
  360. struct list_head list;
  361. #ifdef CONFIG_SND_HDA_DSP_LOADER
  362. /* DSP access mutex */
  363. struct mutex dsp_mutex;
  364. #endif
  365. };
  366. void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
  367. int idx, int direction, int tag);
  368. struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
  369. struct snd_pcm_substream *substream);
  370. void snd_hdac_stream_release(struct hdac_stream *azx_dev);
  371. int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
  372. void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
  373. int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
  374. int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
  375. unsigned int format_val);
  376. void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
  377. void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
  378. void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
  379. void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
  380. void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
  381. unsigned int streams, unsigned int reg);
  382. void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
  383. unsigned int streams);
  384. void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
  385. unsigned int streams);
  386. /*
  387. * macros for easy use
  388. */
  389. #define _snd_hdac_stream_write(type, dev, reg, value) \
  390. ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
  391. #define _snd_hdac_stream_read(type, dev, reg) \
  392. ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
  393. /* read/write a register, pass without AZX_REG_ prefix */
  394. #define snd_hdac_stream_writel(dev, reg, value) \
  395. _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
  396. #define snd_hdac_stream_writew(dev, reg, value) \
  397. _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
  398. #define snd_hdac_stream_writeb(dev, reg, value) \
  399. _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
  400. #define snd_hdac_stream_readl(dev, reg) \
  401. _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
  402. #define snd_hdac_stream_readw(dev, reg) \
  403. _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
  404. #define snd_hdac_stream_readb(dev, reg) \
  405. _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
  406. /* update a register, pass without AZX_REG_ prefix */
  407. #define snd_hdac_stream_updatel(dev, reg, mask, val) \
  408. snd_hdac_stream_writel(dev, reg, \
  409. (snd_hdac_stream_readl(dev, reg) & \
  410. ~(mask)) | (val))
  411. #define snd_hdac_stream_updatew(dev, reg, mask, val) \
  412. snd_hdac_stream_writew(dev, reg, \
  413. (snd_hdac_stream_readw(dev, reg) & \
  414. ~(mask)) | (val))
  415. #define snd_hdac_stream_updateb(dev, reg, mask, val) \
  416. snd_hdac_stream_writeb(dev, reg, \
  417. (snd_hdac_stream_readb(dev, reg) & \
  418. ~(mask)) | (val))
  419. #ifdef CONFIG_SND_HDA_DSP_LOADER
  420. /* DSP lock helpers */
  421. #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
  422. #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
  423. #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
  424. #define snd_hdac_stream_is_locked(dev) ((dev)->locked)
  425. /* DSP loader helpers */
  426. int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
  427. unsigned int byte_size, struct snd_dma_buffer *bufp);
  428. void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
  429. void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
  430. struct snd_dma_buffer *dmab);
  431. #else /* CONFIG_SND_HDA_DSP_LOADER */
  432. #define snd_hdac_dsp_lock_init(dev) do {} while (0)
  433. #define snd_hdac_dsp_lock(dev) do {} while (0)
  434. #define snd_hdac_dsp_unlock(dev) do {} while (0)
  435. #define snd_hdac_stream_is_locked(dev) 0
  436. static inline int
  437. snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
  438. unsigned int byte_size, struct snd_dma_buffer *bufp)
  439. {
  440. return 0;
  441. }
  442. static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
  443. {
  444. }
  445. static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
  446. struct snd_dma_buffer *dmab)
  447. {
  448. }
  449. #endif /* CONFIG_SND_HDA_DSP_LOADER */
  450. /*
  451. * generic array helpers
  452. */
  453. void *snd_array_new(struct snd_array *array);
  454. void snd_array_free(struct snd_array *array);
  455. static inline void snd_array_init(struct snd_array *array, unsigned int size,
  456. unsigned int align)
  457. {
  458. array->elem_size = size;
  459. array->alloc_align = align;
  460. }
  461. static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
  462. {
  463. return array->list + idx * array->elem_size;
  464. }
  465. static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
  466. {
  467. return (unsigned long)(ptr - array->list) / array->elem_size;
  468. }
  469. #endif /* __SOUND_HDAUDIO_H */