s6e8ax0.c 24 KB

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  1. /* linux/drivers/video/exynos/s6e8ax0.c
  2. *
  3. * MIPI-DSI based s6e8ax0 AMOLED lcd 4.65 inch panel driver.
  4. *
  5. * Inki Dae, <inki.dae@samsung.com>
  6. * Donghwa Lee, <dh09.lee@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/mutex.h>
  16. #include <linux/wait.h>
  17. #include <linux/ctype.h>
  18. #include <linux/io.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/lcd.h>
  23. #include <linux/fb.h>
  24. #include <linux/backlight.h>
  25. #include <linux/regulator/consumer.h>
  26. #include <video/mipi_display.h>
  27. #include <video/exynos_mipi_dsim.h>
  28. #define LDI_MTP_LENGTH 24
  29. #define DSIM_PM_STABLE_TIME 10
  30. #define MIN_BRIGHTNESS 0
  31. #define MAX_BRIGHTNESS 24
  32. #define GAMMA_TABLE_COUNT 26
  33. #define POWER_IS_ON(pwr) ((pwr) == FB_BLANK_UNBLANK)
  34. #define POWER_IS_OFF(pwr) ((pwr) == FB_BLANK_POWERDOWN)
  35. #define POWER_IS_NRM(pwr) ((pwr) == FB_BLANK_NORMAL)
  36. #define lcd_to_master(a) (a->dsim_dev->master)
  37. #define lcd_to_master_ops(a) ((lcd_to_master(a))->master_ops)
  38. enum {
  39. DSIM_NONE_STATE = 0,
  40. DSIM_RESUME_COMPLETE = 1,
  41. DSIM_FRAME_DONE = 2,
  42. };
  43. struct s6e8ax0 {
  44. struct device *dev;
  45. unsigned int power;
  46. unsigned int id;
  47. unsigned int gamma;
  48. unsigned int acl_enable;
  49. unsigned int cur_acl;
  50. struct lcd_device *ld;
  51. struct backlight_device *bd;
  52. struct mipi_dsim_lcd_device *dsim_dev;
  53. struct lcd_platform_data *ddi_pd;
  54. struct mutex lock;
  55. bool enabled;
  56. };
  57. static struct regulator_bulk_data supplies[] = {
  58. { .supply = "vdd3", },
  59. { .supply = "vci", },
  60. };
  61. static void s6e8ax0_regulator_enable(struct s6e8ax0 *lcd)
  62. {
  63. int ret = 0;
  64. struct lcd_platform_data *pd = NULL;
  65. pd = lcd->ddi_pd;
  66. mutex_lock(&lcd->lock);
  67. if (!lcd->enabled) {
  68. ret = regulator_bulk_enable(ARRAY_SIZE(supplies), supplies);
  69. if (ret)
  70. goto out;
  71. lcd->enabled = true;
  72. }
  73. msleep(pd->power_on_delay);
  74. out:
  75. mutex_unlock(&lcd->lock);
  76. }
  77. static void s6e8ax0_regulator_disable(struct s6e8ax0 *lcd)
  78. {
  79. int ret = 0;
  80. mutex_lock(&lcd->lock);
  81. if (lcd->enabled) {
  82. ret = regulator_bulk_disable(ARRAY_SIZE(supplies), supplies);
  83. if (ret)
  84. goto out;
  85. lcd->enabled = false;
  86. }
  87. out:
  88. mutex_unlock(&lcd->lock);
  89. }
  90. static const unsigned char s6e8ax0_22_gamma_30[] = {
  91. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad, 0xaf,
  92. 0xbA, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1, 0xdc, 0xc0,
  93. 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
  94. };
  95. static const unsigned char s6e8ax0_22_gamma_50[] = {
  96. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xe8, 0x1f, 0xf7, 0xad, 0xc0,
  97. 0xb5, 0xc4, 0xdc, 0xc4, 0x9e, 0xc6, 0x9c, 0xbb, 0xd8, 0xbb,
  98. 0x00, 0x70, 0x00, 0x68, 0x00, 0x86,
  99. };
  100. static const unsigned char s6e8ax0_22_gamma_60[] = {
  101. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xde, 0x1f, 0xef, 0xad, 0xc4,
  102. 0xb3, 0xc3, 0xdd, 0xc4, 0x9e, 0xc6, 0x9c, 0xbc, 0xd6, 0xba,
  103. 0x00, 0x75, 0x00, 0x6e, 0x00, 0x8d,
  104. };
  105. static const unsigned char s6e8ax0_22_gamma_70[] = {
  106. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xd8, 0x1f, 0xe7, 0xaf, 0xc8,
  107. 0xb4, 0xc4, 0xdd, 0xc3, 0x9d, 0xc6, 0x9c, 0xbb, 0xd6, 0xb9,
  108. 0x00, 0x7a, 0x00, 0x72, 0x00, 0x93,
  109. };
  110. static const unsigned char s6e8ax0_22_gamma_80[] = {
  111. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xc9, 0x1f, 0xde, 0xae, 0xc9,
  112. 0xb1, 0xc3, 0xdd, 0xc2, 0x9d, 0xc5, 0x9b, 0xbc, 0xd6, 0xbb,
  113. 0x00, 0x7f, 0x00, 0x77, 0x00, 0x99,
  114. };
  115. static const unsigned char s6e8ax0_22_gamma_90[] = {
  116. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xc7, 0x1f, 0xd9, 0xb0, 0xcc,
  117. 0xb2, 0xc3, 0xdc, 0xc1, 0x9c, 0xc6, 0x9c, 0xbc, 0xd4, 0xb9,
  118. 0x00, 0x83, 0x00, 0x7b, 0x00, 0x9e,
  119. };
  120. static const unsigned char s6e8ax0_22_gamma_100[] = {
  121. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xbd, 0x80, 0xcd, 0xba, 0xce,
  122. 0xb3, 0xc4, 0xde, 0xc3, 0x9c, 0xc4, 0x9, 0xb8, 0xd3, 0xb6,
  123. 0x00, 0x88, 0x00, 0x80, 0x00, 0xa5,
  124. };
  125. static const unsigned char s6e8ax0_22_gamma_120[] = {
  126. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb9, 0x95, 0xc8, 0xb1, 0xcf,
  127. 0xb2, 0xc6, 0xdf, 0xc5, 0x9b, 0xc3, 0x99, 0xb6, 0xd2, 0xb6,
  128. 0x00, 0x8f, 0x00, 0x86, 0x00, 0xac,
  129. };
  130. static const unsigned char s6e8ax0_22_gamma_130[] = {
  131. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb7, 0xa0, 0xc7, 0xb1, 0xd0,
  132. 0xb2, 0xc4, 0xdd, 0xc3, 0x9a, 0xc3, 0x98, 0xb6, 0xd0, 0xb4,
  133. 0x00, 0x92, 0x00, 0x8a, 0x00, 0xb1,
  134. };
  135. static const unsigned char s6e8ax0_22_gamma_140[] = {
  136. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb7, 0xa0, 0xc5, 0xb2, 0xd0,
  137. 0xb3, 0xc3, 0xde, 0xc3, 0x9b, 0xc2, 0x98, 0xb6, 0xd0, 0xb4,
  138. 0x00, 0x95, 0x00, 0x8d, 0x00, 0xb5,
  139. };
  140. static const unsigned char s6e8ax0_22_gamma_150[] = {
  141. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb3, 0xa0, 0xc2, 0xb2, 0xd0,
  142. 0xb2, 0xc1, 0xdd, 0xc2, 0x9b, 0xc2, 0x98, 0xb4, 0xcf, 0xb1,
  143. 0x00, 0x99, 0x00, 0x90, 0x00, 0xba,
  144. };
  145. static const unsigned char s6e8ax0_22_gamma_160[] = {
  146. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xa5, 0xbf, 0xb0, 0xd0,
  147. 0xb1, 0xc3, 0xde, 0xc2, 0x99, 0xc1, 0x97, 0xb4, 0xce, 0xb1,
  148. 0x00, 0x9c, 0x00, 0x93, 0x00, 0xbe,
  149. };
  150. static const unsigned char s6e8ax0_22_gamma_170[] = {
  151. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb5, 0xbf, 0xb1, 0xd1,
  152. 0xb1, 0xc3, 0xde, 0xc3, 0x99, 0xc0, 0x96, 0xb4, 0xce, 0xb1,
  153. 0x00, 0x9f, 0x00, 0x96, 0x00, 0xc2,
  154. };
  155. static const unsigned char s6e8ax0_22_gamma_180[] = {
  156. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb7, 0xbe, 0xb3, 0xd2,
  157. 0xb3, 0xc3, 0xde, 0xc2, 0x97, 0xbf, 0x95, 0xb4, 0xcd, 0xb1,
  158. 0x00, 0xa2, 0x00, 0x99, 0x00, 0xc5,
  159. };
  160. static const unsigned char s6e8ax0_22_gamma_190[] = {
  161. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb9, 0xbe, 0xb2, 0xd2,
  162. 0xb2, 0xc3, 0xdd, 0xc3, 0x98, 0xbf, 0x95, 0xb2, 0xcc, 0xaf,
  163. 0x00, 0xa5, 0x00, 0x9c, 0x00, 0xc9,
  164. };
  165. static const unsigned char s6e8ax0_22_gamma_200[] = {
  166. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb9, 0xbc, 0xb2, 0xd2,
  167. 0xb1, 0xc4, 0xdd, 0xc3, 0x97, 0xbe, 0x95, 0xb1, 0xcb, 0xae,
  168. 0x00, 0xa8, 0x00, 0x9f, 0x00, 0xcd,
  169. };
  170. static const unsigned char s6e8ax0_22_gamma_210[] = {
  171. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xc1, 0xbd, 0xb1, 0xd1,
  172. 0xb1, 0xc2, 0xde, 0xc2, 0x97, 0xbe, 0x94, 0xB0, 0xc9, 0xad,
  173. 0x00, 0xae, 0x00, 0xa4, 0x00, 0xd4,
  174. };
  175. static const unsigned char s6e8ax0_22_gamma_220[] = {
  176. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xc7, 0xbd, 0xb1, 0xd1,
  177. 0xb1, 0xc2, 0xdd, 0xc2, 0x97, 0xbd, 0x94, 0xb0, 0xc9, 0xad,
  178. 0x00, 0xad, 0x00, 0xa2, 0x00, 0xd3,
  179. };
  180. static const unsigned char s6e8ax0_22_gamma_230[] = {
  181. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xc3, 0xbd, 0xb2, 0xd1,
  182. 0xb1, 0xc3, 0xdd, 0xc1, 0x96, 0xbd, 0x94, 0xb0, 0xc9, 0xad,
  183. 0x00, 0xb0, 0x00, 0xa7, 0x00, 0xd7,
  184. };
  185. static const unsigned char s6e8ax0_22_gamma_240[] = {
  186. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xcb, 0xbd, 0xb1, 0xd2,
  187. 0xb1, 0xc3, 0xdD, 0xc2, 0x95, 0xbd, 0x93, 0xaf, 0xc8, 0xab,
  188. 0x00, 0xb3, 0x00, 0xa9, 0x00, 0xdb,
  189. };
  190. static const unsigned char s6e8ax0_22_gamma_250[] = {
  191. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb3, 0xcc, 0xbe, 0xb0, 0xd2,
  192. 0xb0, 0xc3, 0xdD, 0xc2, 0x94, 0xbc, 0x92, 0xae, 0xc8, 0xab,
  193. 0x00, 0xb6, 0x00, 0xab, 0x00, 0xde,
  194. };
  195. static const unsigned char s6e8ax0_22_gamma_260[] = {
  196. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb3, 0xd0, 0xbe, 0xaf, 0xd1,
  197. 0xaf, 0xc2, 0xdd, 0xc1, 0x96, 0xbc, 0x93, 0xaf, 0xc8, 0xac,
  198. 0x00, 0xb7, 0x00, 0xad, 0x00, 0xe0,
  199. };
  200. static const unsigned char s6e8ax0_22_gamma_270[] = {
  201. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb2, 0xcF, 0xbd, 0xb0, 0xd2,
  202. 0xaf, 0xc2, 0xdc, 0xc1, 0x95, 0xbd, 0x93, 0xae, 0xc6, 0xaa,
  203. 0x00, 0xba, 0x00, 0xb0, 0x00, 0xe4,
  204. };
  205. static const unsigned char s6e8ax0_22_gamma_280[] = {
  206. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb2, 0xd0, 0xbd, 0xaf, 0xd0,
  207. 0xad, 0xc4, 0xdd, 0xc3, 0x95, 0xbd, 0x93, 0xac, 0xc5, 0xa9,
  208. 0x00, 0xbd, 0x00, 0xb2, 0x00, 0xe7,
  209. };
  210. static const unsigned char s6e8ax0_22_gamma_300[] = {
  211. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xb5, 0xd3, 0xbd, 0xb1, 0xd2,
  212. 0xb0, 0xc0, 0xdc, 0xc0, 0x94, 0xba, 0x91, 0xac, 0xc5, 0xa9,
  213. 0x00, 0xc2, 0x00, 0xb7, 0x00, 0xed,
  214. };
  215. static const unsigned char *s6e8ax0_22_gamma_table[] = {
  216. s6e8ax0_22_gamma_30,
  217. s6e8ax0_22_gamma_50,
  218. s6e8ax0_22_gamma_60,
  219. s6e8ax0_22_gamma_70,
  220. s6e8ax0_22_gamma_80,
  221. s6e8ax0_22_gamma_90,
  222. s6e8ax0_22_gamma_100,
  223. s6e8ax0_22_gamma_120,
  224. s6e8ax0_22_gamma_130,
  225. s6e8ax0_22_gamma_140,
  226. s6e8ax0_22_gamma_150,
  227. s6e8ax0_22_gamma_160,
  228. s6e8ax0_22_gamma_170,
  229. s6e8ax0_22_gamma_180,
  230. s6e8ax0_22_gamma_190,
  231. s6e8ax0_22_gamma_200,
  232. s6e8ax0_22_gamma_210,
  233. s6e8ax0_22_gamma_220,
  234. s6e8ax0_22_gamma_230,
  235. s6e8ax0_22_gamma_240,
  236. s6e8ax0_22_gamma_250,
  237. s6e8ax0_22_gamma_260,
  238. s6e8ax0_22_gamma_270,
  239. s6e8ax0_22_gamma_280,
  240. s6e8ax0_22_gamma_300,
  241. };
  242. static void s6e8ax0_panel_cond(struct s6e8ax0 *lcd)
  243. {
  244. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  245. static const unsigned char data_to_send[] = {
  246. 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, 0x7d,
  247. 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, 0x04, 0x08,
  248. 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, 0x23, 0x23, 0xc0,
  249. 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1, 0xff, 0xff, 0xc8
  250. };
  251. static const unsigned char data_to_send_panel_reverse[] = {
  252. 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, 0x7d,
  253. 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, 0x04, 0x08,
  254. 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, 0x23, 0x23, 0xc0,
  255. 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1, 0xf6, 0xf6, 0xc1
  256. };
  257. if (lcd->dsim_dev->panel_reverse)
  258. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  259. data_to_send_panel_reverse,
  260. ARRAY_SIZE(data_to_send_panel_reverse));
  261. else
  262. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  263. data_to_send, ARRAY_SIZE(data_to_send));
  264. }
  265. static void s6e8ax0_display_cond(struct s6e8ax0 *lcd)
  266. {
  267. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  268. static const unsigned char data_to_send[] = {
  269. 0xf2, 0x80, 0x03, 0x0d
  270. };
  271. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  272. data_to_send, ARRAY_SIZE(data_to_send));
  273. }
  274. /* Gamma 2.2 Setting (200cd, 7500K, 10MPCD) */
  275. static void s6e8ax0_gamma_cond(struct s6e8ax0 *lcd)
  276. {
  277. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  278. unsigned int gamma = lcd->bd->props.brightness;
  279. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  280. s6e8ax0_22_gamma_table[gamma],
  281. GAMMA_TABLE_COUNT);
  282. }
  283. static void s6e8ax0_gamma_update(struct s6e8ax0 *lcd)
  284. {
  285. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  286. static const unsigned char data_to_send[] = {
  287. 0xf7, 0x03
  288. };
  289. ops->cmd_write(lcd_to_master(lcd),
  290. MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
  291. ARRAY_SIZE(data_to_send));
  292. }
  293. static void s6e8ax0_etc_cond1(struct s6e8ax0 *lcd)
  294. {
  295. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  296. static const unsigned char data_to_send[] = {
  297. 0xd1, 0xfe, 0x80, 0x00, 0x01, 0x0b, 0x00, 0x00, 0x40,
  298. 0x0d, 0x00, 0x00
  299. };
  300. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  301. data_to_send, ARRAY_SIZE(data_to_send));
  302. }
  303. static void s6e8ax0_etc_cond2(struct s6e8ax0 *lcd)
  304. {
  305. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  306. static const unsigned char data_to_send[] = {
  307. 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
  308. 0x00
  309. };
  310. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  311. data_to_send, ARRAY_SIZE(data_to_send));
  312. }
  313. static void s6e8ax0_etc_cond3(struct s6e8ax0 *lcd)
  314. {
  315. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  316. static const unsigned char data_to_send[] = {
  317. 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
  318. };
  319. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  320. data_to_send, ARRAY_SIZE(data_to_send));
  321. }
  322. static void s6e8ax0_etc_cond4(struct s6e8ax0 *lcd)
  323. {
  324. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  325. static const unsigned char data_to_send[] = {
  326. 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
  327. };
  328. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  329. data_to_send, ARRAY_SIZE(data_to_send));
  330. }
  331. static void s6e8ax0_etc_cond5(struct s6e8ax0 *lcd)
  332. {
  333. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  334. static const unsigned char data_to_send[] = {
  335. 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
  336. };
  337. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  338. data_to_send, ARRAY_SIZE(data_to_send));
  339. }
  340. static void s6e8ax0_etc_cond6(struct s6e8ax0 *lcd)
  341. {
  342. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  343. static const unsigned char data_to_send[] = {
  344. 0xe3, 0x40
  345. };
  346. ops->cmd_write(lcd_to_master(lcd),
  347. MIPI_DSI_DCS_SHORT_WRITE_PARAM,
  348. data_to_send, ARRAY_SIZE(data_to_send));
  349. }
  350. static void s6e8ax0_etc_cond7(struct s6e8ax0 *lcd)
  351. {
  352. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  353. static const unsigned char data_to_send[] = {
  354. 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
  355. };
  356. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  357. data_to_send, ARRAY_SIZE(data_to_send));
  358. }
  359. static void s6e8ax0_elvss_set(struct s6e8ax0 *lcd)
  360. {
  361. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  362. static const unsigned char data_to_send[] = {
  363. 0xb1, 0x04, 0x00
  364. };
  365. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  366. data_to_send, ARRAY_SIZE(data_to_send));
  367. }
  368. static void s6e8ax0_elvss_nvm_set(struct s6e8ax0 *lcd)
  369. {
  370. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  371. static const unsigned char data_to_send[] = {
  372. 0xd9, 0x5c, 0x20, 0x0c, 0x0f, 0x41, 0x00, 0x10, 0x11,
  373. 0x12, 0xd1, 0x00, 0x00, 0x00, 0x00, 0x80, 0xcb, 0xed,
  374. 0x64, 0xaf
  375. };
  376. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  377. data_to_send, ARRAY_SIZE(data_to_send));
  378. }
  379. static void s6e8ax0_sleep_in(struct s6e8ax0 *lcd)
  380. {
  381. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  382. static const unsigned char data_to_send[] = {
  383. 0x10, 0x00
  384. };
  385. ops->cmd_write(lcd_to_master(lcd),
  386. MIPI_DSI_DCS_SHORT_WRITE,
  387. data_to_send, ARRAY_SIZE(data_to_send));
  388. }
  389. static void s6e8ax0_sleep_out(struct s6e8ax0 *lcd)
  390. {
  391. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  392. static const unsigned char data_to_send[] = {
  393. 0x11, 0x00
  394. };
  395. ops->cmd_write(lcd_to_master(lcd),
  396. MIPI_DSI_DCS_SHORT_WRITE,
  397. data_to_send, ARRAY_SIZE(data_to_send));
  398. }
  399. static void s6e8ax0_display_on(struct s6e8ax0 *lcd)
  400. {
  401. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  402. static const unsigned char data_to_send[] = {
  403. 0x29, 0x00
  404. };
  405. ops->cmd_write(lcd_to_master(lcd),
  406. MIPI_DSI_DCS_SHORT_WRITE,
  407. data_to_send, ARRAY_SIZE(data_to_send));
  408. }
  409. static void s6e8ax0_display_off(struct s6e8ax0 *lcd)
  410. {
  411. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  412. static const unsigned char data_to_send[] = {
  413. 0x28, 0x00
  414. };
  415. ops->cmd_write(lcd_to_master(lcd),
  416. MIPI_DSI_DCS_SHORT_WRITE,
  417. data_to_send, ARRAY_SIZE(data_to_send));
  418. }
  419. static void s6e8ax0_apply_level2_key(struct s6e8ax0 *lcd)
  420. {
  421. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  422. static const unsigned char data_to_send[] = {
  423. 0xf0, 0x5a, 0x5a
  424. };
  425. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  426. data_to_send, ARRAY_SIZE(data_to_send));
  427. }
  428. static void s6e8ax0_acl_on(struct s6e8ax0 *lcd)
  429. {
  430. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  431. static const unsigned char data_to_send[] = {
  432. 0xc0, 0x01
  433. };
  434. ops->cmd_write(lcd_to_master(lcd),
  435. MIPI_DSI_DCS_SHORT_WRITE,
  436. data_to_send, ARRAY_SIZE(data_to_send));
  437. }
  438. static void s6e8ax0_acl_off(struct s6e8ax0 *lcd)
  439. {
  440. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  441. static const unsigned char data_to_send[] = {
  442. 0xc0, 0x00
  443. };
  444. ops->cmd_write(lcd_to_master(lcd),
  445. MIPI_DSI_DCS_SHORT_WRITE,
  446. data_to_send, ARRAY_SIZE(data_to_send));
  447. }
  448. /* Full white 50% reducing setting */
  449. static void s6e8ax0_acl_ctrl_set(struct s6e8ax0 *lcd)
  450. {
  451. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  452. /* Full white 50% reducing setting */
  453. static const unsigned char cutoff_50[] = {
  454. 0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
  455. 0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
  456. 0x01, 0x08, 0x0f, 0x16, 0x1d, 0x24, 0x2a, 0x31, 0x38,
  457. 0x3f, 0x46
  458. };
  459. /* Full white 45% reducing setting */
  460. static const unsigned char cutoff_45[] = {
  461. 0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
  462. 0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
  463. 0x01, 0x07, 0x0d, 0x13, 0x19, 0x1f, 0x25, 0x2b, 0x31,
  464. 0x37, 0x3d
  465. };
  466. /* Full white 40% reducing setting */
  467. static const unsigned char cutoff_40[] = {
  468. 0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
  469. 0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
  470. 0x01, 0x06, 0x0c, 0x11, 0x16, 0x1c, 0x21, 0x26, 0x2b,
  471. 0x31, 0x36
  472. };
  473. if (lcd->acl_enable) {
  474. if (lcd->cur_acl == 0) {
  475. if (lcd->gamma == 0 || lcd->gamma == 1) {
  476. s6e8ax0_acl_off(lcd);
  477. dev_dbg(&lcd->ld->dev,
  478. "cur_acl=%d\n", lcd->cur_acl);
  479. } else
  480. s6e8ax0_acl_on(lcd);
  481. }
  482. switch (lcd->gamma) {
  483. case 0: /* 30cd */
  484. s6e8ax0_acl_off(lcd);
  485. lcd->cur_acl = 0;
  486. break;
  487. case 1 ... 3: /* 50cd ~ 90cd */
  488. ops->cmd_write(lcd_to_master(lcd),
  489. MIPI_DSI_DCS_LONG_WRITE,
  490. cutoff_40,
  491. ARRAY_SIZE(cutoff_40));
  492. lcd->cur_acl = 40;
  493. break;
  494. case 4 ... 7: /* 120cd ~ 210cd */
  495. ops->cmd_write(lcd_to_master(lcd),
  496. MIPI_DSI_DCS_LONG_WRITE,
  497. cutoff_45,
  498. ARRAY_SIZE(cutoff_45));
  499. lcd->cur_acl = 45;
  500. break;
  501. case 8 ... 10: /* 220cd ~ 300cd */
  502. ops->cmd_write(lcd_to_master(lcd),
  503. MIPI_DSI_DCS_LONG_WRITE,
  504. cutoff_50,
  505. ARRAY_SIZE(cutoff_50));
  506. lcd->cur_acl = 50;
  507. break;
  508. default:
  509. break;
  510. }
  511. } else {
  512. s6e8ax0_acl_off(lcd);
  513. lcd->cur_acl = 0;
  514. dev_dbg(&lcd->ld->dev, "cur_acl = %d\n", lcd->cur_acl);
  515. }
  516. }
  517. static void s6e8ax0_read_id(struct s6e8ax0 *lcd, u8 *mtp_id)
  518. {
  519. unsigned int ret;
  520. unsigned int addr = 0xd1; /* MTP ID */
  521. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  522. ret = ops->cmd_read(lcd_to_master(lcd),
  523. MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM,
  524. addr, 3, mtp_id);
  525. }
  526. static int s6e8ax0_panel_init(struct s6e8ax0 *lcd)
  527. {
  528. s6e8ax0_apply_level2_key(lcd);
  529. s6e8ax0_sleep_out(lcd);
  530. msleep(1);
  531. s6e8ax0_panel_cond(lcd);
  532. s6e8ax0_display_cond(lcd);
  533. s6e8ax0_gamma_cond(lcd);
  534. s6e8ax0_gamma_update(lcd);
  535. s6e8ax0_etc_cond1(lcd);
  536. s6e8ax0_etc_cond2(lcd);
  537. s6e8ax0_etc_cond3(lcd);
  538. s6e8ax0_etc_cond4(lcd);
  539. s6e8ax0_etc_cond5(lcd);
  540. s6e8ax0_etc_cond6(lcd);
  541. s6e8ax0_etc_cond7(lcd);
  542. s6e8ax0_elvss_nvm_set(lcd);
  543. s6e8ax0_elvss_set(lcd);
  544. s6e8ax0_acl_ctrl_set(lcd);
  545. s6e8ax0_acl_on(lcd);
  546. /* if ID3 value is not 33h, branch private elvss mode */
  547. msleep(lcd->ddi_pd->power_on_delay);
  548. return 0;
  549. }
  550. static int s6e8ax0_update_gamma_ctrl(struct s6e8ax0 *lcd, int brightness)
  551. {
  552. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  553. ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
  554. s6e8ax0_22_gamma_table[brightness],
  555. ARRAY_SIZE(s6e8ax0_22_gamma_table));
  556. /* update gamma table. */
  557. s6e8ax0_gamma_update(lcd);
  558. lcd->gamma = brightness;
  559. return 0;
  560. }
  561. static int s6e8ax0_gamma_ctrl(struct s6e8ax0 *lcd, int gamma)
  562. {
  563. s6e8ax0_update_gamma_ctrl(lcd, gamma);
  564. return 0;
  565. }
  566. static int s6e8ax0_set_power(struct lcd_device *ld, int power)
  567. {
  568. struct s6e8ax0 *lcd = lcd_get_data(ld);
  569. struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
  570. int ret = 0;
  571. if (power != FB_BLANK_UNBLANK && power != FB_BLANK_POWERDOWN &&
  572. power != FB_BLANK_NORMAL) {
  573. dev_err(lcd->dev, "power value should be 0, 1 or 4.\n");
  574. return -EINVAL;
  575. }
  576. if ((power == FB_BLANK_UNBLANK) && ops->set_blank_mode) {
  577. /* LCD power on */
  578. if ((POWER_IS_ON(power) && POWER_IS_OFF(lcd->power))
  579. || (POWER_IS_ON(power) && POWER_IS_NRM(lcd->power))) {
  580. ret = ops->set_blank_mode(lcd_to_master(lcd), power);
  581. if (!ret && lcd->power != power)
  582. lcd->power = power;
  583. }
  584. } else if ((power == FB_BLANK_POWERDOWN) && ops->set_early_blank_mode) {
  585. /* LCD power off */
  586. if ((POWER_IS_OFF(power) && POWER_IS_ON(lcd->power)) ||
  587. (POWER_IS_ON(lcd->power) && POWER_IS_NRM(power))) {
  588. ret = ops->set_early_blank_mode(lcd_to_master(lcd),
  589. power);
  590. if (!ret && lcd->power != power)
  591. lcd->power = power;
  592. }
  593. }
  594. return ret;
  595. }
  596. static int s6e8ax0_get_power(struct lcd_device *ld)
  597. {
  598. struct s6e8ax0 *lcd = lcd_get_data(ld);
  599. return lcd->power;
  600. }
  601. static int s6e8ax0_set_brightness(struct backlight_device *bd)
  602. {
  603. int ret = 0, brightness = bd->props.brightness;
  604. struct s6e8ax0 *lcd = bl_get_data(bd);
  605. if (brightness < MIN_BRIGHTNESS ||
  606. brightness > bd->props.max_brightness) {
  607. dev_err(lcd->dev, "lcd brightness should be %d to %d.\n",
  608. MIN_BRIGHTNESS, MAX_BRIGHTNESS);
  609. return -EINVAL;
  610. }
  611. ret = s6e8ax0_gamma_ctrl(lcd, brightness);
  612. if (ret) {
  613. dev_err(&bd->dev, "lcd brightness setting failed.\n");
  614. return -EIO;
  615. }
  616. return ret;
  617. }
  618. static struct lcd_ops s6e8ax0_lcd_ops = {
  619. .set_power = s6e8ax0_set_power,
  620. .get_power = s6e8ax0_get_power,
  621. };
  622. static const struct backlight_ops s6e8ax0_backlight_ops = {
  623. .update_status = s6e8ax0_set_brightness,
  624. };
  625. static void s6e8ax0_power_on(struct mipi_dsim_lcd_device *dsim_dev, int power)
  626. {
  627. struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);
  628. msleep(lcd->ddi_pd->power_on_delay);
  629. /* lcd power on */
  630. if (power)
  631. s6e8ax0_regulator_enable(lcd);
  632. else
  633. s6e8ax0_regulator_disable(lcd);
  634. msleep(lcd->ddi_pd->reset_delay);
  635. /* lcd reset */
  636. if (lcd->ddi_pd->reset)
  637. lcd->ddi_pd->reset(lcd->ld);
  638. msleep(5);
  639. }
  640. static void s6e8ax0_set_sequence(struct mipi_dsim_lcd_device *dsim_dev)
  641. {
  642. struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);
  643. s6e8ax0_panel_init(lcd);
  644. s6e8ax0_display_on(lcd);
  645. lcd->power = FB_BLANK_UNBLANK;
  646. }
  647. static int s6e8ax0_probe(struct mipi_dsim_lcd_device *dsim_dev)
  648. {
  649. struct s6e8ax0 *lcd;
  650. int ret;
  651. u8 mtp_id[3] = {0, };
  652. lcd = devm_kzalloc(&dsim_dev->dev, sizeof(struct s6e8ax0), GFP_KERNEL);
  653. if (!lcd) {
  654. dev_err(&dsim_dev->dev, "failed to allocate s6e8ax0 structure.\n");
  655. return -ENOMEM;
  656. }
  657. lcd->dsim_dev = dsim_dev;
  658. lcd->ddi_pd = (struct lcd_platform_data *)dsim_dev->platform_data;
  659. lcd->dev = &dsim_dev->dev;
  660. mutex_init(&lcd->lock);
  661. ret = devm_regulator_bulk_get(lcd->dev, ARRAY_SIZE(supplies), supplies);
  662. if (ret) {
  663. dev_err(lcd->dev, "Failed to get regulators: %d\n", ret);
  664. return ret;
  665. }
  666. lcd->ld = devm_lcd_device_register(lcd->dev, "s6e8ax0", lcd->dev, lcd,
  667. &s6e8ax0_lcd_ops);
  668. if (IS_ERR(lcd->ld)) {
  669. dev_err(lcd->dev, "failed to register lcd ops.\n");
  670. return PTR_ERR(lcd->ld);
  671. }
  672. lcd->bd = devm_backlight_device_register(lcd->dev, "s6e8ax0-bl",
  673. lcd->dev, lcd, &s6e8ax0_backlight_ops, NULL);
  674. if (IS_ERR(lcd->bd)) {
  675. dev_err(lcd->dev, "failed to register backlight ops.\n");
  676. return PTR_ERR(lcd->bd);
  677. }
  678. lcd->bd->props.max_brightness = MAX_BRIGHTNESS;
  679. lcd->bd->props.brightness = MAX_BRIGHTNESS;
  680. s6e8ax0_read_id(lcd, mtp_id);
  681. if (mtp_id[0] == 0x00)
  682. dev_err(lcd->dev, "read id failed\n");
  683. dev_info(lcd->dev, "Read ID : %x, %x, %x\n",
  684. mtp_id[0], mtp_id[1], mtp_id[2]);
  685. if (mtp_id[2] == 0x33)
  686. dev_info(lcd->dev,
  687. "ID-3 is 0xff does not support dynamic elvss\n");
  688. else
  689. dev_info(lcd->dev,
  690. "ID-3 is 0x%x support dynamic elvss\n", mtp_id[2]);
  691. lcd->acl_enable = 1;
  692. lcd->cur_acl = 0;
  693. dev_set_drvdata(&dsim_dev->dev, lcd);
  694. dev_dbg(lcd->dev, "probed s6e8ax0 panel driver.\n");
  695. return 0;
  696. }
  697. #ifdef CONFIG_PM
  698. static int s6e8ax0_suspend(struct mipi_dsim_lcd_device *dsim_dev)
  699. {
  700. struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);
  701. s6e8ax0_sleep_in(lcd);
  702. msleep(lcd->ddi_pd->power_off_delay);
  703. s6e8ax0_display_off(lcd);
  704. s6e8ax0_regulator_disable(lcd);
  705. return 0;
  706. }
  707. static int s6e8ax0_resume(struct mipi_dsim_lcd_device *dsim_dev)
  708. {
  709. struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);
  710. s6e8ax0_sleep_out(lcd);
  711. msleep(lcd->ddi_pd->power_on_delay);
  712. s6e8ax0_regulator_enable(lcd);
  713. s6e8ax0_set_sequence(dsim_dev);
  714. return 0;
  715. }
  716. #else
  717. #define s6e8ax0_suspend NULL
  718. #define s6e8ax0_resume NULL
  719. #endif
  720. static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
  721. .name = "s6e8ax0",
  722. .id = -1,
  723. .power_on = s6e8ax0_power_on,
  724. .set_sequence = s6e8ax0_set_sequence,
  725. .probe = s6e8ax0_probe,
  726. .suspend = s6e8ax0_suspend,
  727. .resume = s6e8ax0_resume,
  728. };
  729. static int s6e8ax0_init(void)
  730. {
  731. exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
  732. return 0;
  733. }
  734. static void s6e8ax0_exit(void)
  735. {
  736. return;
  737. }
  738. module_init(s6e8ax0_init);
  739. module_exit(s6e8ax0_exit);
  740. MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
  741. MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
  742. MODULE_DESCRIPTION("MIPI-DSI based s6e8ax0 AMOLED LCD Panel Driver");
  743. MODULE_LICENSE("GPL");