tdo24m.c 11 KB

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  1. /*
  2. * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
  3. *
  4. * Copyright (C) 2008 Marvell International Ltd.
  5. * Eric Miao <eric.miao@marvell.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * publishhed by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/device.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/tdo24m.h>
  17. #include <linux/fb.h>
  18. #include <linux/lcd.h>
  19. #include <linux/slab.h>
  20. #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
  21. #define TDO24M_SPI_BUFF_SIZE (4)
  22. #define MODE_QVGA 0
  23. #define MODE_VGA 1
  24. struct tdo24m {
  25. struct spi_device *spi_dev;
  26. struct lcd_device *lcd_dev;
  27. struct spi_message msg;
  28. struct spi_transfer xfer;
  29. uint8_t *buf;
  30. int (*adj_mode)(struct tdo24m *lcd, int mode);
  31. int color_invert;
  32. int power;
  33. int mode;
  34. };
  35. /* use bit 30, 31 as the indicator of command parameter number */
  36. #define CMD0(x) ((0 << 30) | (x))
  37. #define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1))
  38. #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\
  39. ((x1) << 9) | 0x100 | (x2))
  40. #define CMD_NULL (-1)
  41. static const uint32_t lcd_panel_reset[] = {
  42. CMD0(0x1), /* reset */
  43. CMD0(0x0), /* nop */
  44. CMD0(0x0), /* nop */
  45. CMD0(0x0), /* nop */
  46. CMD_NULL,
  47. };
  48. static const uint32_t lcd_panel_on[] = {
  49. CMD0(0x29), /* Display ON */
  50. CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
  51. CMD0(0x11), /* Sleep out */
  52. CMD1(0xB0, 0x16), /* Wake */
  53. CMD_NULL,
  54. };
  55. static const uint32_t lcd_panel_off[] = {
  56. CMD0(0x28), /* Display OFF */
  57. CMD2(0xB8, 0x80, 0x02), /* Output Control */
  58. CMD0(0x10), /* Sleep in */
  59. CMD1(0xB0, 0x00), /* Deep stand by in */
  60. CMD_NULL,
  61. };
  62. static const uint32_t lcd_vga_pass_through_tdo24m[] = {
  63. CMD1(0xB0, 0x16),
  64. CMD1(0xBC, 0x80),
  65. CMD1(0xE1, 0x00),
  66. CMD1(0x36, 0x50),
  67. CMD1(0x3B, 0x00),
  68. CMD_NULL,
  69. };
  70. static const uint32_t lcd_qvga_pass_through_tdo24m[] = {
  71. CMD1(0xB0, 0x16),
  72. CMD1(0xBC, 0x81),
  73. CMD1(0xE1, 0x00),
  74. CMD1(0x36, 0x50),
  75. CMD1(0x3B, 0x22),
  76. CMD_NULL,
  77. };
  78. static const uint32_t lcd_vga_transfer_tdo24m[] = {
  79. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  80. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  81. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  82. CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
  83. CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
  84. CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
  85. CMD1(0xd5, 0x14), /* ASW timing control (2) */
  86. CMD0(0x21), /* Invert for normally black display */
  87. CMD0(0x29), /* Display on */
  88. CMD_NULL,
  89. };
  90. static const uint32_t lcd_qvga_transfer[] = {
  91. CMD1(0xd6, 0x02), /* Blanking period control (1) */
  92. CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
  93. CMD1(0xd8, 0x01), /* CKV timing control on/off */
  94. CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
  95. CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
  96. CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
  97. CMD1(0xe0, 0x0a), /* ASW timing control (2) */
  98. CMD0(0x21), /* Invert for normally black display */
  99. CMD0(0x29), /* Display on */
  100. CMD_NULL,
  101. };
  102. static const uint32_t lcd_vga_pass_through_tdo35s[] = {
  103. CMD1(0xB0, 0x16),
  104. CMD1(0xBC, 0x80),
  105. CMD1(0xE1, 0x00),
  106. CMD1(0x3B, 0x00),
  107. CMD_NULL,
  108. };
  109. static const uint32_t lcd_qvga_pass_through_tdo35s[] = {
  110. CMD1(0xB0, 0x16),
  111. CMD1(0xBC, 0x81),
  112. CMD1(0xE1, 0x00),
  113. CMD1(0x3B, 0x22),
  114. CMD_NULL,
  115. };
  116. static const uint32_t lcd_vga_transfer_tdo35s[] = {
  117. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  118. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  119. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  120. CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */
  121. CMD2(0xd3, 0x14, 0x28), /* OEV timing control */
  122. CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */
  123. CMD1(0xd5, 0x28), /* ASW timing control (2) */
  124. CMD0(0x21), /* Invert for normally black display */
  125. CMD0(0x29), /* Display on */
  126. CMD_NULL,
  127. };
  128. static const uint32_t lcd_panel_config[] = {
  129. CMD2(0xb8, 0xff, 0xf9), /* Output control */
  130. CMD0(0x11), /* sleep out */
  131. CMD1(0xba, 0x01), /* Display mode (1) */
  132. CMD1(0xbb, 0x00), /* Display mode (2) */
  133. CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
  134. CMD1(0xbf, 0x10), /* Drive system change control */
  135. CMD1(0xb1, 0x56), /* Booster operation setup */
  136. CMD1(0xb2, 0x33), /* Booster mode setup */
  137. CMD1(0xb3, 0x11), /* Booster frequency setup */
  138. CMD1(0xb4, 0x02), /* Op amp/system clock */
  139. CMD1(0xb5, 0x35), /* VCS voltage */
  140. CMD1(0xb6, 0x40), /* VCOM voltage */
  141. CMD1(0xb7, 0x03), /* External display signal */
  142. CMD1(0xbd, 0x00), /* ASW slew rate */
  143. CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
  144. CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
  145. CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
  146. CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
  147. CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
  148. CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
  149. CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
  150. CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
  151. CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
  152. CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
  153. CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
  154. CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
  155. CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
  156. CMD_NULL,
  157. };
  158. static int tdo24m_writes(struct tdo24m *lcd, const uint32_t *array)
  159. {
  160. struct spi_transfer *x = &lcd->xfer;
  161. const uint32_t *p = array;
  162. uint32_t data;
  163. int nparams, err = 0;
  164. for (; *p != CMD_NULL; p++) {
  165. if (!lcd->color_invert && *p == CMD0(0x21))
  166. continue;
  167. nparams = (*p >> 30) & 0x3;
  168. data = *p << (7 - nparams);
  169. switch (nparams) {
  170. case 0:
  171. lcd->buf[0] = (data >> 8) & 0xff;
  172. lcd->buf[1] = data & 0xff;
  173. break;
  174. case 1:
  175. lcd->buf[0] = (data >> 16) & 0xff;
  176. lcd->buf[1] = (data >> 8) & 0xff;
  177. lcd->buf[2] = data & 0xff;
  178. break;
  179. case 2:
  180. lcd->buf[0] = (data >> 24) & 0xff;
  181. lcd->buf[1] = (data >> 16) & 0xff;
  182. lcd->buf[2] = (data >> 8) & 0xff;
  183. lcd->buf[3] = data & 0xff;
  184. break;
  185. default:
  186. continue;
  187. }
  188. x->len = nparams + 2;
  189. err = spi_sync(lcd->spi_dev, &lcd->msg);
  190. if (err)
  191. break;
  192. }
  193. return err;
  194. }
  195. static int tdo24m_adj_mode(struct tdo24m *lcd, int mode)
  196. {
  197. switch (mode) {
  198. case MODE_VGA:
  199. tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m);
  200. tdo24m_writes(lcd, lcd_panel_config);
  201. tdo24m_writes(lcd, lcd_vga_transfer_tdo24m);
  202. break;
  203. case MODE_QVGA:
  204. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m);
  205. tdo24m_writes(lcd, lcd_panel_config);
  206. tdo24m_writes(lcd, lcd_qvga_transfer);
  207. break;
  208. default:
  209. return -EINVAL;
  210. }
  211. lcd->mode = mode;
  212. return 0;
  213. }
  214. static int tdo35s_adj_mode(struct tdo24m *lcd, int mode)
  215. {
  216. switch (mode) {
  217. case MODE_VGA:
  218. tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s);
  219. tdo24m_writes(lcd, lcd_panel_config);
  220. tdo24m_writes(lcd, lcd_vga_transfer_tdo35s);
  221. break;
  222. case MODE_QVGA:
  223. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s);
  224. tdo24m_writes(lcd, lcd_panel_config);
  225. tdo24m_writes(lcd, lcd_qvga_transfer);
  226. break;
  227. default:
  228. return -EINVAL;
  229. }
  230. lcd->mode = mode;
  231. return 0;
  232. }
  233. static int tdo24m_power_on(struct tdo24m *lcd)
  234. {
  235. int err;
  236. err = tdo24m_writes(lcd, lcd_panel_on);
  237. if (err)
  238. goto out;
  239. err = tdo24m_writes(lcd, lcd_panel_reset);
  240. if (err)
  241. goto out;
  242. err = lcd->adj_mode(lcd, lcd->mode);
  243. out:
  244. return err;
  245. }
  246. static int tdo24m_power_off(struct tdo24m *lcd)
  247. {
  248. return tdo24m_writes(lcd, lcd_panel_off);
  249. }
  250. static int tdo24m_power(struct tdo24m *lcd, int power)
  251. {
  252. int ret = 0;
  253. if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
  254. ret = tdo24m_power_on(lcd);
  255. else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
  256. ret = tdo24m_power_off(lcd);
  257. if (!ret)
  258. lcd->power = power;
  259. return ret;
  260. }
  261. static int tdo24m_set_power(struct lcd_device *ld, int power)
  262. {
  263. struct tdo24m *lcd = lcd_get_data(ld);
  264. return tdo24m_power(lcd, power);
  265. }
  266. static int tdo24m_get_power(struct lcd_device *ld)
  267. {
  268. struct tdo24m *lcd = lcd_get_data(ld);
  269. return lcd->power;
  270. }
  271. static int tdo24m_set_mode(struct lcd_device *ld, struct fb_videomode *m)
  272. {
  273. struct tdo24m *lcd = lcd_get_data(ld);
  274. int mode = MODE_QVGA;
  275. if (m->xres == 640 || m->xres == 480)
  276. mode = MODE_VGA;
  277. if (lcd->mode == mode)
  278. return 0;
  279. return lcd->adj_mode(lcd, mode);
  280. }
  281. static struct lcd_ops tdo24m_ops = {
  282. .get_power = tdo24m_get_power,
  283. .set_power = tdo24m_set_power,
  284. .set_mode = tdo24m_set_mode,
  285. };
  286. static int tdo24m_probe(struct spi_device *spi)
  287. {
  288. struct tdo24m *lcd;
  289. struct spi_message *m;
  290. struct spi_transfer *x;
  291. struct tdo24m_platform_data *pdata;
  292. enum tdo24m_model model;
  293. int err;
  294. pdata = dev_get_platdata(&spi->dev);
  295. if (pdata)
  296. model = pdata->model;
  297. else
  298. model = TDO24M;
  299. spi->bits_per_word = 8;
  300. spi->mode = SPI_MODE_3;
  301. err = spi_setup(spi);
  302. if (err)
  303. return err;
  304. lcd = devm_kzalloc(&spi->dev, sizeof(struct tdo24m), GFP_KERNEL);
  305. if (!lcd)
  306. return -ENOMEM;
  307. lcd->spi_dev = spi;
  308. lcd->power = FB_BLANK_POWERDOWN;
  309. lcd->mode = MODE_VGA; /* default to VGA */
  310. lcd->buf = devm_kzalloc(&spi->dev, TDO24M_SPI_BUFF_SIZE, GFP_KERNEL);
  311. if (lcd->buf == NULL)
  312. return -ENOMEM;
  313. m = &lcd->msg;
  314. x = &lcd->xfer;
  315. spi_message_init(m);
  316. x->cs_change = 1;
  317. x->tx_buf = &lcd->buf[0];
  318. spi_message_add_tail(x, m);
  319. switch (model) {
  320. case TDO24M:
  321. lcd->color_invert = 1;
  322. lcd->adj_mode = tdo24m_adj_mode;
  323. break;
  324. case TDO35S:
  325. lcd->adj_mode = tdo35s_adj_mode;
  326. lcd->color_invert = 0;
  327. break;
  328. default:
  329. dev_err(&spi->dev, "Unsupported model");
  330. return -EINVAL;
  331. }
  332. lcd->lcd_dev = devm_lcd_device_register(&spi->dev, "tdo24m", &spi->dev,
  333. lcd, &tdo24m_ops);
  334. if (IS_ERR(lcd->lcd_dev))
  335. return PTR_ERR(lcd->lcd_dev);
  336. spi_set_drvdata(spi, lcd);
  337. err = tdo24m_power(lcd, FB_BLANK_UNBLANK);
  338. if (err)
  339. return err;
  340. return 0;
  341. }
  342. static int tdo24m_remove(struct spi_device *spi)
  343. {
  344. struct tdo24m *lcd = spi_get_drvdata(spi);
  345. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  346. return 0;
  347. }
  348. #ifdef CONFIG_PM_SLEEP
  349. static int tdo24m_suspend(struct device *dev)
  350. {
  351. struct tdo24m *lcd = dev_get_drvdata(dev);
  352. return tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  353. }
  354. static int tdo24m_resume(struct device *dev)
  355. {
  356. struct tdo24m *lcd = dev_get_drvdata(dev);
  357. return tdo24m_power(lcd, FB_BLANK_UNBLANK);
  358. }
  359. #endif
  360. static SIMPLE_DEV_PM_OPS(tdo24m_pm_ops, tdo24m_suspend, tdo24m_resume);
  361. /* Power down all displays on reboot, poweroff or halt */
  362. static void tdo24m_shutdown(struct spi_device *spi)
  363. {
  364. struct tdo24m *lcd = spi_get_drvdata(spi);
  365. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  366. }
  367. static struct spi_driver tdo24m_driver = {
  368. .driver = {
  369. .name = "tdo24m",
  370. .owner = THIS_MODULE,
  371. .pm = &tdo24m_pm_ops,
  372. },
  373. .probe = tdo24m_probe,
  374. .remove = tdo24m_remove,
  375. .shutdown = tdo24m_shutdown,
  376. };
  377. module_spi_driver(tdo24m_driver);
  378. MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
  379. MODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel");
  380. MODULE_LICENSE("GPL");
  381. MODULE_ALIAS("spi:tdo24m");