fusbh200-hcd.c 165 KB

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  1. /*
  2. * Faraday FUSBH200 EHCI-like driver
  3. *
  4. * Copyright (c) 2013 Faraday Technology Corporation
  5. *
  6. * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
  7. * Feng-Hsin Chiang <john453@faraday-tech.com>
  8. * Po-Yu Chuang <ratbert.chuang@gmail.com>
  9. *
  10. * Most of code borrowed from the Linux-3.7 EHCI driver
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  19. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  20. * for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software Foundation,
  24. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. */
  26. #include <linux/module.h>
  27. #include <linux/device.h>
  28. #include <linux/dmapool.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/ioport.h>
  32. #include <linux/sched.h>
  33. #include <linux/vmalloc.h>
  34. #include <linux/errno.h>
  35. #include <linux/init.h>
  36. #include <linux/hrtimer.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/usb.h>
  40. #include <linux/usb/hcd.h>
  41. #include <linux/moduleparam.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/slab.h>
  45. #include <linux/uaccess.h>
  46. #include <linux/platform_device.h>
  47. #include <asm/byteorder.h>
  48. #include <asm/io.h>
  49. #include <asm/irq.h>
  50. #include <asm/unaligned.h>
  51. /*-------------------------------------------------------------------------*/
  52. #define DRIVER_AUTHOR "Yuan-Hsin Chen"
  53. #define DRIVER_DESC "FUSBH200 Host Controller (EHCI) Driver"
  54. static const char hcd_name [] = "fusbh200_hcd";
  55. #undef FUSBH200_URB_TRACE
  56. /* magic numbers that can affect system performance */
  57. #define FUSBH200_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
  58. #define FUSBH200_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
  59. #define FUSBH200_TUNE_RL_TT 0
  60. #define FUSBH200_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
  61. #define FUSBH200_TUNE_MULT_TT 1
  62. /*
  63. * Some drivers think it's safe to schedule isochronous transfers more than
  64. * 256 ms into the future (partly as a result of an old bug in the scheduling
  65. * code). In an attempt to avoid trouble, we will use a minimum scheduling
  66. * length of 512 frames instead of 256.
  67. */
  68. #define FUSBH200_TUNE_FLS 1 /* (medium) 512-frame schedule */
  69. /* Initial IRQ latency: faster than hw default */
  70. static int log2_irq_thresh = 0; // 0 to 6
  71. module_param (log2_irq_thresh, int, S_IRUGO);
  72. MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  73. /* initial park setting: slower than hw default */
  74. static unsigned park = 0;
  75. module_param (park, uint, S_IRUGO);
  76. MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  77. /* for link power management(LPM) feature */
  78. static unsigned int hird;
  79. module_param(hird, int, S_IRUGO);
  80. MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
  81. #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
  82. #include "fusbh200.h"
  83. /*-------------------------------------------------------------------------*/
  84. #define fusbh200_dbg(fusbh200, fmt, args...) \
  85. dev_dbg (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  86. #define fusbh200_err(fusbh200, fmt, args...) \
  87. dev_err (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  88. #define fusbh200_info(fusbh200, fmt, args...) \
  89. dev_info (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  90. #define fusbh200_warn(fusbh200, fmt, args...) \
  91. dev_warn (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  92. /* check the values in the HCSPARAMS register
  93. * (host controller _Structural_ parameters)
  94. * see EHCI spec, Table 2-4 for each value
  95. */
  96. static void dbg_hcs_params (struct fusbh200_hcd *fusbh200, char *label)
  97. {
  98. u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  99. fusbh200_dbg (fusbh200,
  100. "%s hcs_params 0x%x ports=%d\n",
  101. label, params,
  102. HCS_N_PORTS (params)
  103. );
  104. }
  105. /* check the values in the HCCPARAMS register
  106. * (host controller _Capability_ parameters)
  107. * see EHCI Spec, Table 2-5 for each value
  108. * */
  109. static void dbg_hcc_params (struct fusbh200_hcd *fusbh200, char *label)
  110. {
  111. u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  112. fusbh200_dbg (fusbh200,
  113. "%s hcc_params %04x uframes %s%s\n",
  114. label,
  115. params,
  116. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  117. HCC_CANPARK(params) ? " park" : "");
  118. }
  119. static void __maybe_unused
  120. dbg_qtd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
  121. {
  122. fusbh200_dbg(fusbh200, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  123. hc32_to_cpup(fusbh200, &qtd->hw_next),
  124. hc32_to_cpup(fusbh200, &qtd->hw_alt_next),
  125. hc32_to_cpup(fusbh200, &qtd->hw_token),
  126. hc32_to_cpup(fusbh200, &qtd->hw_buf [0]));
  127. if (qtd->hw_buf [1])
  128. fusbh200_dbg(fusbh200, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  129. hc32_to_cpup(fusbh200, &qtd->hw_buf[1]),
  130. hc32_to_cpup(fusbh200, &qtd->hw_buf[2]),
  131. hc32_to_cpup(fusbh200, &qtd->hw_buf[3]),
  132. hc32_to_cpup(fusbh200, &qtd->hw_buf[4]));
  133. }
  134. static void __maybe_unused
  135. dbg_qh (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  136. {
  137. struct fusbh200_qh_hw *hw = qh->hw;
  138. fusbh200_dbg (fusbh200, "%s qh %p n%08x info %x %x qtd %x\n", label,
  139. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  140. dbg_qtd("overlay", fusbh200, (struct fusbh200_qtd *) &hw->hw_qtd_next);
  141. }
  142. static void __maybe_unused
  143. dbg_itd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
  144. {
  145. fusbh200_dbg (fusbh200, "%s [%d] itd %p, next %08x, urb %p\n",
  146. label, itd->frame, itd, hc32_to_cpu(fusbh200, itd->hw_next),
  147. itd->urb);
  148. fusbh200_dbg (fusbh200,
  149. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  150. hc32_to_cpu(fusbh200, itd->hw_transaction[0]),
  151. hc32_to_cpu(fusbh200, itd->hw_transaction[1]),
  152. hc32_to_cpu(fusbh200, itd->hw_transaction[2]),
  153. hc32_to_cpu(fusbh200, itd->hw_transaction[3]),
  154. hc32_to_cpu(fusbh200, itd->hw_transaction[4]),
  155. hc32_to_cpu(fusbh200, itd->hw_transaction[5]),
  156. hc32_to_cpu(fusbh200, itd->hw_transaction[6]),
  157. hc32_to_cpu(fusbh200, itd->hw_transaction[7]));
  158. fusbh200_dbg (fusbh200,
  159. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  160. hc32_to_cpu(fusbh200, itd->hw_bufp[0]),
  161. hc32_to_cpu(fusbh200, itd->hw_bufp[1]),
  162. hc32_to_cpu(fusbh200, itd->hw_bufp[2]),
  163. hc32_to_cpu(fusbh200, itd->hw_bufp[3]),
  164. hc32_to_cpu(fusbh200, itd->hw_bufp[4]),
  165. hc32_to_cpu(fusbh200, itd->hw_bufp[5]),
  166. hc32_to_cpu(fusbh200, itd->hw_bufp[6]));
  167. fusbh200_dbg (fusbh200, " index: %d %d %d %d %d %d %d %d\n",
  168. itd->index[0], itd->index[1], itd->index[2],
  169. itd->index[3], itd->index[4], itd->index[5],
  170. itd->index[6], itd->index[7]);
  171. }
  172. static int __maybe_unused
  173. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  174. {
  175. return scnprintf (buf, len,
  176. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
  177. label, label [0] ? " " : "", status,
  178. (status & STS_ASS) ? " Async" : "",
  179. (status & STS_PSS) ? " Periodic" : "",
  180. (status & STS_RECL) ? " Recl" : "",
  181. (status & STS_HALT) ? " Halt" : "",
  182. (status & STS_IAA) ? " IAA" : "",
  183. (status & STS_FATAL) ? " FATAL" : "",
  184. (status & STS_FLR) ? " FLR" : "",
  185. (status & STS_PCD) ? " PCD" : "",
  186. (status & STS_ERR) ? " ERR" : "",
  187. (status & STS_INT) ? " INT" : ""
  188. );
  189. }
  190. static int __maybe_unused
  191. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  192. {
  193. return scnprintf (buf, len,
  194. "%s%sintrenable %02x%s%s%s%s%s%s",
  195. label, label [0] ? " " : "", enable,
  196. (enable & STS_IAA) ? " IAA" : "",
  197. (enable & STS_FATAL) ? " FATAL" : "",
  198. (enable & STS_FLR) ? " FLR" : "",
  199. (enable & STS_PCD) ? " PCD" : "",
  200. (enable & STS_ERR) ? " ERR" : "",
  201. (enable & STS_INT) ? " INT" : ""
  202. );
  203. }
  204. static const char *const fls_strings [] =
  205. { "1024", "512", "256", "??" };
  206. static int
  207. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  208. {
  209. return scnprintf (buf, len,
  210. "%s%scommand %07x %s=%d ithresh=%d%s%s%s "
  211. "period=%s%s %s",
  212. label, label [0] ? " " : "", command,
  213. (command & CMD_PARK) ? " park" : "(park)",
  214. CMD_PARK_CNT (command),
  215. (command >> 16) & 0x3f,
  216. (command & CMD_IAAD) ? " IAAD" : "",
  217. (command & CMD_ASE) ? " Async" : "",
  218. (command & CMD_PSE) ? " Periodic" : "",
  219. fls_strings [(command >> 2) & 0x3],
  220. (command & CMD_RESET) ? " Reset" : "",
  221. (command & CMD_RUN) ? "RUN" : "HALT"
  222. );
  223. }
  224. static int
  225. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  226. {
  227. char *sig;
  228. /* signaling state */
  229. switch (status & (3 << 10)) {
  230. case 0 << 10: sig = "se0"; break;
  231. case 1 << 10: sig = "k"; break; /* low speed */
  232. case 2 << 10: sig = "j"; break;
  233. default: sig = "?"; break;
  234. }
  235. return scnprintf (buf, len,
  236. "%s%sport:%d status %06x %d "
  237. "sig=%s%s%s%s%s%s%s%s",
  238. label, label [0] ? " " : "", port, status,
  239. status>>25,/*device address */
  240. sig,
  241. (status & PORT_RESET) ? " RESET" : "",
  242. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  243. (status & PORT_RESUME) ? " RESUME" : "",
  244. (status & PORT_PEC) ? " PEC" : "",
  245. (status & PORT_PE) ? " PE" : "",
  246. (status & PORT_CSC) ? " CSC" : "",
  247. (status & PORT_CONNECT) ? " CONNECT" : "");
  248. }
  249. /* functions have the "wrong" filename when they're output... */
  250. #define dbg_status(fusbh200, label, status) { \
  251. char _buf [80]; \
  252. dbg_status_buf (_buf, sizeof _buf, label, status); \
  253. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  254. }
  255. #define dbg_cmd(fusbh200, label, command) { \
  256. char _buf [80]; \
  257. dbg_command_buf (_buf, sizeof _buf, label, command); \
  258. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  259. }
  260. #define dbg_port(fusbh200, label, port, status) { \
  261. char _buf [80]; \
  262. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  263. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  264. }
  265. /*-------------------------------------------------------------------------*/
  266. /* troubleshooting help: expose state in debugfs */
  267. static int debug_async_open(struct inode *, struct file *);
  268. static int debug_periodic_open(struct inode *, struct file *);
  269. static int debug_registers_open(struct inode *, struct file *);
  270. static int debug_async_open(struct inode *, struct file *);
  271. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  272. static int debug_close(struct inode *, struct file *);
  273. static const struct file_operations debug_async_fops = {
  274. .owner = THIS_MODULE,
  275. .open = debug_async_open,
  276. .read = debug_output,
  277. .release = debug_close,
  278. .llseek = default_llseek,
  279. };
  280. static const struct file_operations debug_periodic_fops = {
  281. .owner = THIS_MODULE,
  282. .open = debug_periodic_open,
  283. .read = debug_output,
  284. .release = debug_close,
  285. .llseek = default_llseek,
  286. };
  287. static const struct file_operations debug_registers_fops = {
  288. .owner = THIS_MODULE,
  289. .open = debug_registers_open,
  290. .read = debug_output,
  291. .release = debug_close,
  292. .llseek = default_llseek,
  293. };
  294. static struct dentry *fusbh200_debug_root;
  295. struct debug_buffer {
  296. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  297. struct usb_bus *bus;
  298. struct mutex mutex; /* protect filling of buffer */
  299. size_t count; /* number of characters filled into buffer */
  300. char *output_buf;
  301. size_t alloc_size;
  302. };
  303. #define speed_char(info1) ({ char tmp; \
  304. switch (info1 & (3 << 12)) { \
  305. case QH_FULL_SPEED: tmp = 'f'; break; \
  306. case QH_LOW_SPEED: tmp = 'l'; break; \
  307. case QH_HIGH_SPEED: tmp = 'h'; break; \
  308. default: tmp = '?'; break; \
  309. } tmp; })
  310. static inline char token_mark(struct fusbh200_hcd *fusbh200, __hc32 token)
  311. {
  312. __u32 v = hc32_to_cpu(fusbh200, token);
  313. if (v & QTD_STS_ACTIVE)
  314. return '*';
  315. if (v & QTD_STS_HALT)
  316. return '-';
  317. if (!IS_SHORT_READ (v))
  318. return ' ';
  319. /* tries to advance through hw_alt_next */
  320. return '/';
  321. }
  322. static void qh_lines (
  323. struct fusbh200_hcd *fusbh200,
  324. struct fusbh200_qh *qh,
  325. char **nextp,
  326. unsigned *sizep
  327. )
  328. {
  329. u32 scratch;
  330. u32 hw_curr;
  331. struct fusbh200_qtd *td;
  332. unsigned temp;
  333. unsigned size = *sizep;
  334. char *next = *nextp;
  335. char mark;
  336. __le32 list_end = FUSBH200_LIST_END(fusbh200);
  337. struct fusbh200_qh_hw *hw = qh->hw;
  338. if (hw->hw_qtd_next == list_end) /* NEC does this */
  339. mark = '@';
  340. else
  341. mark = token_mark(fusbh200, hw->hw_token);
  342. if (mark == '/') { /* qh_alt_next controls qh advance? */
  343. if ((hw->hw_alt_next & QTD_MASK(fusbh200))
  344. == fusbh200->async->hw->hw_alt_next)
  345. mark = '#'; /* blocked */
  346. else if (hw->hw_alt_next == list_end)
  347. mark = '.'; /* use hw_qtd_next */
  348. /* else alt_next points to some other qtd */
  349. }
  350. scratch = hc32_to_cpup(fusbh200, &hw->hw_info1);
  351. hw_curr = (mark == '*') ? hc32_to_cpup(fusbh200, &hw->hw_current) : 0;
  352. temp = scnprintf (next, size,
  353. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  354. qh, scratch & 0x007f,
  355. speed_char (scratch),
  356. (scratch >> 8) & 0x000f,
  357. scratch, hc32_to_cpup(fusbh200, &hw->hw_info2),
  358. hc32_to_cpup(fusbh200, &hw->hw_token), mark,
  359. (cpu_to_hc32(fusbh200, QTD_TOGGLE) & hw->hw_token)
  360. ? "data1" : "data0",
  361. (hc32_to_cpup(fusbh200, &hw->hw_alt_next) >> 1) & 0x0f);
  362. size -= temp;
  363. next += temp;
  364. /* hc may be modifying the list as we read it ... */
  365. list_for_each_entry(td, &qh->qtd_list, qtd_list) {
  366. scratch = hc32_to_cpup(fusbh200, &td->hw_token);
  367. mark = ' ';
  368. if (hw_curr == td->qtd_dma)
  369. mark = '*';
  370. else if (hw->hw_qtd_next == cpu_to_hc32(fusbh200, td->qtd_dma))
  371. mark = '+';
  372. else if (QTD_LENGTH (scratch)) {
  373. if (td->hw_alt_next == fusbh200->async->hw->hw_alt_next)
  374. mark = '#';
  375. else if (td->hw_alt_next != list_end)
  376. mark = '/';
  377. }
  378. temp = snprintf (next, size,
  379. "\n\t%p%c%s len=%d %08x urb %p",
  380. td, mark, ({ char *tmp;
  381. switch ((scratch>>8)&0x03) {
  382. case 0: tmp = "out"; break;
  383. case 1: tmp = "in"; break;
  384. case 2: tmp = "setup"; break;
  385. default: tmp = "?"; break;
  386. } tmp;}),
  387. (scratch >> 16) & 0x7fff,
  388. scratch,
  389. td->urb);
  390. if (size < temp)
  391. temp = size;
  392. size -= temp;
  393. next += temp;
  394. if (temp == size)
  395. goto done;
  396. }
  397. temp = snprintf (next, size, "\n");
  398. if (size < temp)
  399. temp = size;
  400. size -= temp;
  401. next += temp;
  402. done:
  403. *sizep = size;
  404. *nextp = next;
  405. }
  406. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  407. {
  408. struct usb_hcd *hcd;
  409. struct fusbh200_hcd *fusbh200;
  410. unsigned long flags;
  411. unsigned temp, size;
  412. char *next;
  413. struct fusbh200_qh *qh;
  414. hcd = bus_to_hcd(buf->bus);
  415. fusbh200 = hcd_to_fusbh200 (hcd);
  416. next = buf->output_buf;
  417. size = buf->alloc_size;
  418. *next = 0;
  419. /* dumps a snapshot of the async schedule.
  420. * usually empty except for long-term bulk reads, or head.
  421. * one QH per line, and TDs we know about
  422. */
  423. spin_lock_irqsave (&fusbh200->lock, flags);
  424. for (qh = fusbh200->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  425. qh_lines (fusbh200, qh, &next, &size);
  426. if (fusbh200->async_unlink && size > 0) {
  427. temp = scnprintf(next, size, "\nunlink =\n");
  428. size -= temp;
  429. next += temp;
  430. for (qh = fusbh200->async_unlink; size > 0 && qh;
  431. qh = qh->unlink_next)
  432. qh_lines (fusbh200, qh, &next, &size);
  433. }
  434. spin_unlock_irqrestore (&fusbh200->lock, flags);
  435. return strlen(buf->output_buf);
  436. }
  437. #define DBG_SCHED_LIMIT 64
  438. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  439. {
  440. struct usb_hcd *hcd;
  441. struct fusbh200_hcd *fusbh200;
  442. unsigned long flags;
  443. union fusbh200_shadow p, *seen;
  444. unsigned temp, size, seen_count;
  445. char *next;
  446. unsigned i;
  447. __hc32 tag;
  448. seen = kmalloc(DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC);
  449. if (!seen)
  450. return 0;
  451. seen_count = 0;
  452. hcd = bus_to_hcd(buf->bus);
  453. fusbh200 = hcd_to_fusbh200 (hcd);
  454. next = buf->output_buf;
  455. size = buf->alloc_size;
  456. temp = scnprintf (next, size, "size = %d\n", fusbh200->periodic_size);
  457. size -= temp;
  458. next += temp;
  459. /* dump a snapshot of the periodic schedule.
  460. * iso changes, interrupt usually doesn't.
  461. */
  462. spin_lock_irqsave (&fusbh200->lock, flags);
  463. for (i = 0; i < fusbh200->periodic_size; i++) {
  464. p = fusbh200->pshadow [i];
  465. if (likely (!p.ptr))
  466. continue;
  467. tag = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [i]);
  468. temp = scnprintf (next, size, "%4d: ", i);
  469. size -= temp;
  470. next += temp;
  471. do {
  472. struct fusbh200_qh_hw *hw;
  473. switch (hc32_to_cpu(fusbh200, tag)) {
  474. case Q_TYPE_QH:
  475. hw = p.qh->hw;
  476. temp = scnprintf (next, size, " qh%d-%04x/%p",
  477. p.qh->period,
  478. hc32_to_cpup(fusbh200,
  479. &hw->hw_info2)
  480. /* uframe masks */
  481. & (QH_CMASK | QH_SMASK),
  482. p.qh);
  483. size -= temp;
  484. next += temp;
  485. /* don't repeat what follows this qh */
  486. for (temp = 0; temp < seen_count; temp++) {
  487. if (seen [temp].ptr != p.ptr)
  488. continue;
  489. if (p.qh->qh_next.ptr) {
  490. temp = scnprintf (next, size,
  491. " ...");
  492. size -= temp;
  493. next += temp;
  494. }
  495. break;
  496. }
  497. /* show more info the first time around */
  498. if (temp == seen_count) {
  499. u32 scratch = hc32_to_cpup(fusbh200,
  500. &hw->hw_info1);
  501. struct fusbh200_qtd *qtd;
  502. char *type = "";
  503. /* count tds, get ep direction */
  504. temp = 0;
  505. list_for_each_entry (qtd,
  506. &p.qh->qtd_list,
  507. qtd_list) {
  508. temp++;
  509. switch (0x03 & (hc32_to_cpu(
  510. fusbh200,
  511. qtd->hw_token) >> 8)) {
  512. case 0: type = "out"; continue;
  513. case 1: type = "in"; continue;
  514. }
  515. }
  516. temp = scnprintf (next, size,
  517. " (%c%d ep%d%s "
  518. "[%d/%d] q%d p%d)",
  519. speed_char (scratch),
  520. scratch & 0x007f,
  521. (scratch >> 8) & 0x000f, type,
  522. p.qh->usecs, p.qh->c_usecs,
  523. temp,
  524. 0x7ff & (scratch >> 16));
  525. if (seen_count < DBG_SCHED_LIMIT)
  526. seen [seen_count++].qh = p.qh;
  527. } else
  528. temp = 0;
  529. tag = Q_NEXT_TYPE(fusbh200, hw->hw_next);
  530. p = p.qh->qh_next;
  531. break;
  532. case Q_TYPE_FSTN:
  533. temp = scnprintf (next, size,
  534. " fstn-%8x/%p", p.fstn->hw_prev,
  535. p.fstn);
  536. tag = Q_NEXT_TYPE(fusbh200, p.fstn->hw_next);
  537. p = p.fstn->fstn_next;
  538. break;
  539. case Q_TYPE_ITD:
  540. temp = scnprintf (next, size,
  541. " itd/%p", p.itd);
  542. tag = Q_NEXT_TYPE(fusbh200, p.itd->hw_next);
  543. p = p.itd->itd_next;
  544. break;
  545. }
  546. size -= temp;
  547. next += temp;
  548. } while (p.ptr);
  549. temp = scnprintf (next, size, "\n");
  550. size -= temp;
  551. next += temp;
  552. }
  553. spin_unlock_irqrestore (&fusbh200->lock, flags);
  554. kfree (seen);
  555. return buf->alloc_size - size;
  556. }
  557. #undef DBG_SCHED_LIMIT
  558. static const char *rh_state_string(struct fusbh200_hcd *fusbh200)
  559. {
  560. switch (fusbh200->rh_state) {
  561. case FUSBH200_RH_HALTED:
  562. return "halted";
  563. case FUSBH200_RH_SUSPENDED:
  564. return "suspended";
  565. case FUSBH200_RH_RUNNING:
  566. return "running";
  567. case FUSBH200_RH_STOPPING:
  568. return "stopping";
  569. }
  570. return "?";
  571. }
  572. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  573. {
  574. struct usb_hcd *hcd;
  575. struct fusbh200_hcd *fusbh200;
  576. unsigned long flags;
  577. unsigned temp, size, i;
  578. char *next, scratch [80];
  579. static char fmt [] = "%*s\n";
  580. static char label [] = "";
  581. hcd = bus_to_hcd(buf->bus);
  582. fusbh200 = hcd_to_fusbh200 (hcd);
  583. next = buf->output_buf;
  584. size = buf->alloc_size;
  585. spin_lock_irqsave (&fusbh200->lock, flags);
  586. if (!HCD_HW_ACCESSIBLE(hcd)) {
  587. size = scnprintf (next, size,
  588. "bus %s, device %s\n"
  589. "%s\n"
  590. "SUSPENDED (no register access)\n",
  591. hcd->self.controller->bus->name,
  592. dev_name(hcd->self.controller),
  593. hcd->product_desc);
  594. goto done;
  595. }
  596. /* Capability Registers */
  597. i = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  598. temp = scnprintf (next, size,
  599. "bus %s, device %s\n"
  600. "%s\n"
  601. "EHCI %x.%02x, rh state %s\n",
  602. hcd->self.controller->bus->name,
  603. dev_name(hcd->self.controller),
  604. hcd->product_desc,
  605. i >> 8, i & 0x0ff, rh_state_string(fusbh200));
  606. size -= temp;
  607. next += temp;
  608. // FIXME interpret both types of params
  609. i = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  610. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  611. size -= temp;
  612. next += temp;
  613. i = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  614. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  615. size -= temp;
  616. next += temp;
  617. /* Operational Registers */
  618. temp = dbg_status_buf (scratch, sizeof scratch, label,
  619. fusbh200_readl(fusbh200, &fusbh200->regs->status));
  620. temp = scnprintf (next, size, fmt, temp, scratch);
  621. size -= temp;
  622. next += temp;
  623. temp = dbg_command_buf (scratch, sizeof scratch, label,
  624. fusbh200_readl(fusbh200, &fusbh200->regs->command));
  625. temp = scnprintf (next, size, fmt, temp, scratch);
  626. size -= temp;
  627. next += temp;
  628. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  629. fusbh200_readl(fusbh200, &fusbh200->regs->intr_enable));
  630. temp = scnprintf (next, size, fmt, temp, scratch);
  631. size -= temp;
  632. next += temp;
  633. temp = scnprintf (next, size, "uframe %04x\n",
  634. fusbh200_read_frame_index(fusbh200));
  635. size -= temp;
  636. next += temp;
  637. if (fusbh200->async_unlink) {
  638. temp = scnprintf(next, size, "async unlink qh %p\n",
  639. fusbh200->async_unlink);
  640. size -= temp;
  641. next += temp;
  642. }
  643. temp = scnprintf (next, size,
  644. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  645. fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
  646. fusbh200->stats.lost_iaa);
  647. size -= temp;
  648. next += temp;
  649. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  650. fusbh200->stats.complete, fusbh200->stats.unlink);
  651. size -= temp;
  652. next += temp;
  653. done:
  654. spin_unlock_irqrestore (&fusbh200->lock, flags);
  655. return buf->alloc_size - size;
  656. }
  657. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  658. ssize_t (*fill_func)(struct debug_buffer *))
  659. {
  660. struct debug_buffer *buf;
  661. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  662. if (buf) {
  663. buf->bus = bus;
  664. buf->fill_func = fill_func;
  665. mutex_init(&buf->mutex);
  666. buf->alloc_size = PAGE_SIZE;
  667. }
  668. return buf;
  669. }
  670. static int fill_buffer(struct debug_buffer *buf)
  671. {
  672. int ret = 0;
  673. if (!buf->output_buf)
  674. buf->output_buf = vmalloc(buf->alloc_size);
  675. if (!buf->output_buf) {
  676. ret = -ENOMEM;
  677. goto out;
  678. }
  679. ret = buf->fill_func(buf);
  680. if (ret >= 0) {
  681. buf->count = ret;
  682. ret = 0;
  683. }
  684. out:
  685. return ret;
  686. }
  687. static ssize_t debug_output(struct file *file, char __user *user_buf,
  688. size_t len, loff_t *offset)
  689. {
  690. struct debug_buffer *buf = file->private_data;
  691. int ret = 0;
  692. mutex_lock(&buf->mutex);
  693. if (buf->count == 0) {
  694. ret = fill_buffer(buf);
  695. if (ret != 0) {
  696. mutex_unlock(&buf->mutex);
  697. goto out;
  698. }
  699. }
  700. mutex_unlock(&buf->mutex);
  701. ret = simple_read_from_buffer(user_buf, len, offset,
  702. buf->output_buf, buf->count);
  703. out:
  704. return ret;
  705. }
  706. static int debug_close(struct inode *inode, struct file *file)
  707. {
  708. struct debug_buffer *buf = file->private_data;
  709. if (buf) {
  710. vfree(buf->output_buf);
  711. kfree(buf);
  712. }
  713. return 0;
  714. }
  715. static int debug_async_open(struct inode *inode, struct file *file)
  716. {
  717. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  718. return file->private_data ? 0 : -ENOMEM;
  719. }
  720. static int debug_periodic_open(struct inode *inode, struct file *file)
  721. {
  722. struct debug_buffer *buf;
  723. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  724. if (!buf)
  725. return -ENOMEM;
  726. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  727. file->private_data = buf;
  728. return 0;
  729. }
  730. static int debug_registers_open(struct inode *inode, struct file *file)
  731. {
  732. file->private_data = alloc_buffer(inode->i_private,
  733. fill_registers_buffer);
  734. return file->private_data ? 0 : -ENOMEM;
  735. }
  736. static inline void create_debug_files (struct fusbh200_hcd *fusbh200)
  737. {
  738. struct usb_bus *bus = &fusbh200_to_hcd(fusbh200)->self;
  739. fusbh200->debug_dir = debugfs_create_dir(bus->bus_name, fusbh200_debug_root);
  740. if (!fusbh200->debug_dir)
  741. return;
  742. if (!debugfs_create_file("async", S_IRUGO, fusbh200->debug_dir, bus,
  743. &debug_async_fops))
  744. goto file_error;
  745. if (!debugfs_create_file("periodic", S_IRUGO, fusbh200->debug_dir, bus,
  746. &debug_periodic_fops))
  747. goto file_error;
  748. if (!debugfs_create_file("registers", S_IRUGO, fusbh200->debug_dir, bus,
  749. &debug_registers_fops))
  750. goto file_error;
  751. return;
  752. file_error:
  753. debugfs_remove_recursive(fusbh200->debug_dir);
  754. }
  755. static inline void remove_debug_files (struct fusbh200_hcd *fusbh200)
  756. {
  757. debugfs_remove_recursive(fusbh200->debug_dir);
  758. }
  759. /*-------------------------------------------------------------------------*/
  760. /*
  761. * handshake - spin reading hc until handshake completes or fails
  762. * @ptr: address of hc register to be read
  763. * @mask: bits to look at in result of read
  764. * @done: value of those bits when handshake succeeds
  765. * @usec: timeout in microseconds
  766. *
  767. * Returns negative errno, or zero on success
  768. *
  769. * Success happens when the "mask" bits have the specified value (hardware
  770. * handshake done). There are two failure modes: "usec" have passed (major
  771. * hardware flakeout), or the register reads as all-ones (hardware removed).
  772. *
  773. * That last failure should_only happen in cases like physical cardbus eject
  774. * before driver shutdown. But it also seems to be caused by bugs in cardbus
  775. * bridge shutdown: shutting down the bridge before the devices using it.
  776. */
  777. static int handshake (struct fusbh200_hcd *fusbh200, void __iomem *ptr,
  778. u32 mask, u32 done, int usec)
  779. {
  780. u32 result;
  781. do {
  782. result = fusbh200_readl(fusbh200, ptr);
  783. if (result == ~(u32)0) /* card removed */
  784. return -ENODEV;
  785. result &= mask;
  786. if (result == done)
  787. return 0;
  788. udelay (1);
  789. usec--;
  790. } while (usec > 0);
  791. return -ETIMEDOUT;
  792. }
  793. /*
  794. * Force HC to halt state from unknown (EHCI spec section 2.3).
  795. * Must be called with interrupts enabled and the lock not held.
  796. */
  797. static int fusbh200_halt (struct fusbh200_hcd *fusbh200)
  798. {
  799. u32 temp;
  800. spin_lock_irq(&fusbh200->lock);
  801. /* disable any irqs left enabled by previous code */
  802. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  803. /*
  804. * This routine gets called during probe before fusbh200->command
  805. * has been initialized, so we can't rely on its value.
  806. */
  807. fusbh200->command &= ~CMD_RUN;
  808. temp = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  809. temp &= ~(CMD_RUN | CMD_IAAD);
  810. fusbh200_writel(fusbh200, temp, &fusbh200->regs->command);
  811. spin_unlock_irq(&fusbh200->lock);
  812. synchronize_irq(fusbh200_to_hcd(fusbh200)->irq);
  813. return handshake(fusbh200, &fusbh200->regs->status,
  814. STS_HALT, STS_HALT, 16 * 125);
  815. }
  816. /*
  817. * Reset a non-running (STS_HALT == 1) controller.
  818. * Must be called with interrupts enabled and the lock not held.
  819. */
  820. static int fusbh200_reset (struct fusbh200_hcd *fusbh200)
  821. {
  822. int retval;
  823. u32 command = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  824. /* If the EHCI debug controller is active, special care must be
  825. * taken before and after a host controller reset */
  826. if (fusbh200->debug && !dbgp_reset_prep(fusbh200_to_hcd(fusbh200)))
  827. fusbh200->debug = NULL;
  828. command |= CMD_RESET;
  829. dbg_cmd (fusbh200, "reset", command);
  830. fusbh200_writel(fusbh200, command, &fusbh200->regs->command);
  831. fusbh200->rh_state = FUSBH200_RH_HALTED;
  832. fusbh200->next_statechange = jiffies;
  833. retval = handshake (fusbh200, &fusbh200->regs->command,
  834. CMD_RESET, 0, 250 * 1000);
  835. if (retval)
  836. return retval;
  837. if (fusbh200->debug)
  838. dbgp_external_startup(fusbh200_to_hcd(fusbh200));
  839. fusbh200->port_c_suspend = fusbh200->suspended_ports =
  840. fusbh200->resuming_ports = 0;
  841. return retval;
  842. }
  843. /*
  844. * Idle the controller (turn off the schedules).
  845. * Must be called with interrupts enabled and the lock not held.
  846. */
  847. static void fusbh200_quiesce (struct fusbh200_hcd *fusbh200)
  848. {
  849. u32 temp;
  850. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  851. return;
  852. /* wait for any schedule enables/disables to take effect */
  853. temp = (fusbh200->command << 10) & (STS_ASS | STS_PSS);
  854. handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
  855. /* then disable anything that's still active */
  856. spin_lock_irq(&fusbh200->lock);
  857. fusbh200->command &= ~(CMD_ASE | CMD_PSE);
  858. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  859. spin_unlock_irq(&fusbh200->lock);
  860. /* hardware can take 16 microframes to turn off ... */
  861. handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
  862. }
  863. /*-------------------------------------------------------------------------*/
  864. static void end_unlink_async(struct fusbh200_hcd *fusbh200);
  865. static void unlink_empty_async(struct fusbh200_hcd *fusbh200);
  866. static void fusbh200_work(struct fusbh200_hcd *fusbh200);
  867. static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  868. static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  869. /*-------------------------------------------------------------------------*/
  870. /* Set a bit in the USBCMD register */
  871. static void fusbh200_set_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
  872. {
  873. fusbh200->command |= bit;
  874. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  875. /* unblock posted write */
  876. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  877. }
  878. /* Clear a bit in the USBCMD register */
  879. static void fusbh200_clear_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
  880. {
  881. fusbh200->command &= ~bit;
  882. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  883. /* unblock posted write */
  884. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  885. }
  886. /*-------------------------------------------------------------------------*/
  887. /*
  888. * EHCI timer support... Now using hrtimers.
  889. *
  890. * Lots of different events are triggered from fusbh200->hrtimer. Whenever
  891. * the timer routine runs, it checks each possible event; events that are
  892. * currently enabled and whose expiration time has passed get handled.
  893. * The set of enabled events is stored as a collection of bitflags in
  894. * fusbh200->enabled_hrtimer_events, and they are numbered in order of
  895. * increasing delay values (ranging between 1 ms and 100 ms).
  896. *
  897. * Rather than implementing a sorted list or tree of all pending events,
  898. * we keep track only of the lowest-numbered pending event, in
  899. * fusbh200->next_hrtimer_event. Whenever fusbh200->hrtimer gets restarted, its
  900. * expiration time is set to the timeout value for this event.
  901. *
  902. * As a result, events might not get handled right away; the actual delay
  903. * could be anywhere up to twice the requested delay. This doesn't
  904. * matter, because none of the events are especially time-critical. The
  905. * ones that matter most all have a delay of 1 ms, so they will be
  906. * handled after 2 ms at most, which is okay. In addition to this, we
  907. * allow for an expiration range of 1 ms.
  908. */
  909. /*
  910. * Delay lengths for the hrtimer event types.
  911. * Keep this list sorted by delay length, in the same order as
  912. * the event types indexed by enum fusbh200_hrtimer_event in fusbh200.h.
  913. */
  914. static unsigned event_delays_ns[] = {
  915. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_ASS */
  916. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_PSS */
  917. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_DEAD */
  918. 1125 * NSEC_PER_USEC, /* FUSBH200_HRTIMER_UNLINK_INTR */
  919. 2 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_FREE_ITDS */
  920. 6 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
  921. 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
  922. 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
  923. 15 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
  924. 100 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IO_WATCHDOG */
  925. };
  926. /* Enable a pending hrtimer event */
  927. static void fusbh200_enable_event(struct fusbh200_hcd *fusbh200, unsigned event,
  928. bool resched)
  929. {
  930. ktime_t *timeout = &fusbh200->hr_timeouts[event];
  931. if (resched)
  932. *timeout = ktime_add(ktime_get(),
  933. ktime_set(0, event_delays_ns[event]));
  934. fusbh200->enabled_hrtimer_events |= (1 << event);
  935. /* Track only the lowest-numbered pending event */
  936. if (event < fusbh200->next_hrtimer_event) {
  937. fusbh200->next_hrtimer_event = event;
  938. hrtimer_start_range_ns(&fusbh200->hrtimer, *timeout,
  939. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  940. }
  941. }
  942. /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
  943. static void fusbh200_poll_ASS(struct fusbh200_hcd *fusbh200)
  944. {
  945. unsigned actual, want;
  946. /* Don't enable anything if the controller isn't running (e.g., died) */
  947. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  948. return;
  949. want = (fusbh200->command & CMD_ASE) ? STS_ASS : 0;
  950. actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_ASS;
  951. if (want != actual) {
  952. /* Poll again later, but give up after about 20 ms */
  953. if (fusbh200->ASS_poll_count++ < 20) {
  954. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_ASS, true);
  955. return;
  956. }
  957. fusbh200_dbg(fusbh200, "Waited too long for the async schedule status (%x/%x), giving up\n",
  958. want, actual);
  959. }
  960. fusbh200->ASS_poll_count = 0;
  961. /* The status is up-to-date; restart or stop the schedule as needed */
  962. if (want == 0) { /* Stopped */
  963. if (fusbh200->async_count > 0)
  964. fusbh200_set_command_bit(fusbh200, CMD_ASE);
  965. } else { /* Running */
  966. if (fusbh200->async_count == 0) {
  967. /* Turn off the schedule after a while */
  968. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_ASYNC,
  969. true);
  970. }
  971. }
  972. }
  973. /* Turn off the async schedule after a brief delay */
  974. static void fusbh200_disable_ASE(struct fusbh200_hcd *fusbh200)
  975. {
  976. fusbh200_clear_command_bit(fusbh200, CMD_ASE);
  977. }
  978. /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
  979. static void fusbh200_poll_PSS(struct fusbh200_hcd *fusbh200)
  980. {
  981. unsigned actual, want;
  982. /* Don't do anything if the controller isn't running (e.g., died) */
  983. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  984. return;
  985. want = (fusbh200->command & CMD_PSE) ? STS_PSS : 0;
  986. actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_PSS;
  987. if (want != actual) {
  988. /* Poll again later, but give up after about 20 ms */
  989. if (fusbh200->PSS_poll_count++ < 20) {
  990. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_PSS, true);
  991. return;
  992. }
  993. fusbh200_dbg(fusbh200, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
  994. want, actual);
  995. }
  996. fusbh200->PSS_poll_count = 0;
  997. /* The status is up-to-date; restart or stop the schedule as needed */
  998. if (want == 0) { /* Stopped */
  999. if (fusbh200->periodic_count > 0)
  1000. fusbh200_set_command_bit(fusbh200, CMD_PSE);
  1001. } else { /* Running */
  1002. if (fusbh200->periodic_count == 0) {
  1003. /* Turn off the schedule after a while */
  1004. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_PERIODIC,
  1005. true);
  1006. }
  1007. }
  1008. }
  1009. /* Turn off the periodic schedule after a brief delay */
  1010. static void fusbh200_disable_PSE(struct fusbh200_hcd *fusbh200)
  1011. {
  1012. fusbh200_clear_command_bit(fusbh200, CMD_PSE);
  1013. }
  1014. /* Poll the STS_HALT status bit; see when a dead controller stops */
  1015. static void fusbh200_handle_controller_death(struct fusbh200_hcd *fusbh200)
  1016. {
  1017. if (!(fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_HALT)) {
  1018. /* Give up after a few milliseconds */
  1019. if (fusbh200->died_poll_count++ < 5) {
  1020. /* Try again later */
  1021. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_DEAD, true);
  1022. return;
  1023. }
  1024. fusbh200_warn(fusbh200, "Waited too long for the controller to stop, giving up\n");
  1025. }
  1026. /* Clean up the mess */
  1027. fusbh200->rh_state = FUSBH200_RH_HALTED;
  1028. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  1029. fusbh200_work(fusbh200);
  1030. end_unlink_async(fusbh200);
  1031. /* Not in process context, so don't try to reset the controller */
  1032. }
  1033. /* Handle unlinked interrupt QHs once they are gone from the hardware */
  1034. static void fusbh200_handle_intr_unlinks(struct fusbh200_hcd *fusbh200)
  1035. {
  1036. bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
  1037. /*
  1038. * Process all the QHs on the intr_unlink list that were added
  1039. * before the current unlink cycle began. The list is in
  1040. * temporal order, so stop when we reach the first entry in the
  1041. * current cycle. But if the root hub isn't running then
  1042. * process all the QHs on the list.
  1043. */
  1044. fusbh200->intr_unlinking = true;
  1045. while (fusbh200->intr_unlink) {
  1046. struct fusbh200_qh *qh = fusbh200->intr_unlink;
  1047. if (!stopped && qh->unlink_cycle == fusbh200->intr_unlink_cycle)
  1048. break;
  1049. fusbh200->intr_unlink = qh->unlink_next;
  1050. qh->unlink_next = NULL;
  1051. end_unlink_intr(fusbh200, qh);
  1052. }
  1053. /* Handle remaining entries later */
  1054. if (fusbh200->intr_unlink) {
  1055. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
  1056. ++fusbh200->intr_unlink_cycle;
  1057. }
  1058. fusbh200->intr_unlinking = false;
  1059. }
  1060. /* Start another free-iTDs/siTDs cycle */
  1061. static void start_free_itds(struct fusbh200_hcd *fusbh200)
  1062. {
  1063. if (!(fusbh200->enabled_hrtimer_events & BIT(FUSBH200_HRTIMER_FREE_ITDS))) {
  1064. fusbh200->last_itd_to_free = list_entry(
  1065. fusbh200->cached_itd_list.prev,
  1066. struct fusbh200_itd, itd_list);
  1067. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_FREE_ITDS, true);
  1068. }
  1069. }
  1070. /* Wait for controller to stop using old iTDs and siTDs */
  1071. static void end_free_itds(struct fusbh200_hcd *fusbh200)
  1072. {
  1073. struct fusbh200_itd *itd, *n;
  1074. if (fusbh200->rh_state < FUSBH200_RH_RUNNING) {
  1075. fusbh200->last_itd_to_free = NULL;
  1076. }
  1077. list_for_each_entry_safe(itd, n, &fusbh200->cached_itd_list, itd_list) {
  1078. list_del(&itd->itd_list);
  1079. dma_pool_free(fusbh200->itd_pool, itd, itd->itd_dma);
  1080. if (itd == fusbh200->last_itd_to_free)
  1081. break;
  1082. }
  1083. if (!list_empty(&fusbh200->cached_itd_list))
  1084. start_free_itds(fusbh200);
  1085. }
  1086. /* Handle lost (or very late) IAA interrupts */
  1087. static void fusbh200_iaa_watchdog(struct fusbh200_hcd *fusbh200)
  1088. {
  1089. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  1090. return;
  1091. /*
  1092. * Lost IAA irqs wedge things badly; seen first with a vt8235.
  1093. * So we need this watchdog, but must protect it against both
  1094. * (a) SMP races against real IAA firing and retriggering, and
  1095. * (b) clean HC shutdown, when IAA watchdog was pending.
  1096. */
  1097. if (fusbh200->async_iaa) {
  1098. u32 cmd, status;
  1099. /* If we get here, IAA is *REALLY* late. It's barely
  1100. * conceivable that the system is so busy that CMD_IAAD
  1101. * is still legitimately set, so let's be sure it's
  1102. * clear before we read STS_IAA. (The HC should clear
  1103. * CMD_IAAD when it sets STS_IAA.)
  1104. */
  1105. cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  1106. /*
  1107. * If IAA is set here it either legitimately triggered
  1108. * after the watchdog timer expired (_way_ late, so we'll
  1109. * still count it as lost) ... or a silicon erratum:
  1110. * - VIA seems to set IAA without triggering the IRQ;
  1111. * - IAAD potentially cleared without setting IAA.
  1112. */
  1113. status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
  1114. if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
  1115. COUNT(fusbh200->stats.lost_iaa);
  1116. fusbh200_writel(fusbh200, STS_IAA, &fusbh200->regs->status);
  1117. }
  1118. fusbh200_dbg(fusbh200, "IAA watchdog: status %x cmd %x\n",
  1119. status, cmd);
  1120. end_unlink_async(fusbh200);
  1121. }
  1122. }
  1123. /* Enable the I/O watchdog, if appropriate */
  1124. static void turn_on_io_watchdog(struct fusbh200_hcd *fusbh200)
  1125. {
  1126. /* Not needed if the controller isn't running or it's already enabled */
  1127. if (fusbh200->rh_state != FUSBH200_RH_RUNNING ||
  1128. (fusbh200->enabled_hrtimer_events &
  1129. BIT(FUSBH200_HRTIMER_IO_WATCHDOG)))
  1130. return;
  1131. /*
  1132. * Isochronous transfers always need the watchdog.
  1133. * For other sorts we use it only if the flag is set.
  1134. */
  1135. if (fusbh200->isoc_count > 0 || (fusbh200->need_io_watchdog &&
  1136. fusbh200->async_count + fusbh200->intr_count > 0))
  1137. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IO_WATCHDOG, true);
  1138. }
  1139. /*
  1140. * Handler functions for the hrtimer event types.
  1141. * Keep this array in the same order as the event types indexed by
  1142. * enum fusbh200_hrtimer_event in fusbh200.h.
  1143. */
  1144. static void (*event_handlers[])(struct fusbh200_hcd *) = {
  1145. fusbh200_poll_ASS, /* FUSBH200_HRTIMER_POLL_ASS */
  1146. fusbh200_poll_PSS, /* FUSBH200_HRTIMER_POLL_PSS */
  1147. fusbh200_handle_controller_death, /* FUSBH200_HRTIMER_POLL_DEAD */
  1148. fusbh200_handle_intr_unlinks, /* FUSBH200_HRTIMER_UNLINK_INTR */
  1149. end_free_itds, /* FUSBH200_HRTIMER_FREE_ITDS */
  1150. unlink_empty_async, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
  1151. fusbh200_iaa_watchdog, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
  1152. fusbh200_disable_PSE, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
  1153. fusbh200_disable_ASE, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
  1154. fusbh200_work, /* FUSBH200_HRTIMER_IO_WATCHDOG */
  1155. };
  1156. static enum hrtimer_restart fusbh200_hrtimer_func(struct hrtimer *t)
  1157. {
  1158. struct fusbh200_hcd *fusbh200 = container_of(t, struct fusbh200_hcd, hrtimer);
  1159. ktime_t now;
  1160. unsigned long events;
  1161. unsigned long flags;
  1162. unsigned e;
  1163. spin_lock_irqsave(&fusbh200->lock, flags);
  1164. events = fusbh200->enabled_hrtimer_events;
  1165. fusbh200->enabled_hrtimer_events = 0;
  1166. fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
  1167. /*
  1168. * Check each pending event. If its time has expired, handle
  1169. * the event; otherwise re-enable it.
  1170. */
  1171. now = ktime_get();
  1172. for_each_set_bit(e, &events, FUSBH200_HRTIMER_NUM_EVENTS) {
  1173. if (now.tv64 >= fusbh200->hr_timeouts[e].tv64)
  1174. event_handlers[e](fusbh200);
  1175. else
  1176. fusbh200_enable_event(fusbh200, e, false);
  1177. }
  1178. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1179. return HRTIMER_NORESTART;
  1180. }
  1181. /*-------------------------------------------------------------------------*/
  1182. #define fusbh200_bus_suspend NULL
  1183. #define fusbh200_bus_resume NULL
  1184. /*-------------------------------------------------------------------------*/
  1185. static int check_reset_complete (
  1186. struct fusbh200_hcd *fusbh200,
  1187. int index,
  1188. u32 __iomem *status_reg,
  1189. int port_status
  1190. ) {
  1191. if (!(port_status & PORT_CONNECT))
  1192. return port_status;
  1193. /* if reset finished and it's still not enabled -- handoff */
  1194. if (!(port_status & PORT_PE)) {
  1195. /* with integrated TT, there's nobody to hand it to! */
  1196. fusbh200_dbg (fusbh200,
  1197. "Failed to enable port %d on root hub TT\n",
  1198. index+1);
  1199. return port_status;
  1200. } else {
  1201. fusbh200_dbg(fusbh200, "port %d reset complete, port enabled\n",
  1202. index + 1);
  1203. }
  1204. return port_status;
  1205. }
  1206. /*-------------------------------------------------------------------------*/
  1207. /* build "status change" packet (one or two bytes) from HC registers */
  1208. static int
  1209. fusbh200_hub_status_data (struct usb_hcd *hcd, char *buf)
  1210. {
  1211. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  1212. u32 temp, status;
  1213. u32 mask;
  1214. int retval = 1;
  1215. unsigned long flags;
  1216. /* init status to no-changes */
  1217. buf [0] = 0;
  1218. /* Inform the core about resumes-in-progress by returning
  1219. * a non-zero value even if there are no status changes.
  1220. */
  1221. status = fusbh200->resuming_ports;
  1222. mask = PORT_CSC | PORT_PEC;
  1223. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  1224. /* no hub change reports (bit 0) for now (power, ...) */
  1225. /* port N changes (bit N)? */
  1226. spin_lock_irqsave (&fusbh200->lock, flags);
  1227. temp = fusbh200_readl(fusbh200, &fusbh200->regs->port_status);
  1228. /*
  1229. * Return status information even for ports with OWNER set.
  1230. * Otherwise hub_wq wouldn't see the disconnect event when a
  1231. * high-speed device is switched over to the companion
  1232. * controller by the user.
  1233. */
  1234. if ((temp & mask) != 0 || test_bit(0, &fusbh200->port_c_suspend)
  1235. || (fusbh200->reset_done[0] && time_after_eq(
  1236. jiffies, fusbh200->reset_done[0]))) {
  1237. buf [0] |= 1 << 1;
  1238. status = STS_PCD;
  1239. }
  1240. /* FIXME autosuspend idle root hubs */
  1241. spin_unlock_irqrestore (&fusbh200->lock, flags);
  1242. return status ? retval : 0;
  1243. }
  1244. /*-------------------------------------------------------------------------*/
  1245. static void
  1246. fusbh200_hub_descriptor (
  1247. struct fusbh200_hcd *fusbh200,
  1248. struct usb_hub_descriptor *desc
  1249. ) {
  1250. int ports = HCS_N_PORTS (fusbh200->hcs_params);
  1251. u16 temp;
  1252. desc->bDescriptorType = USB_DT_HUB;
  1253. desc->bPwrOn2PwrGood = 10; /* fusbh200 1.0, 2.3.9 says 20ms max */
  1254. desc->bHubContrCurrent = 0;
  1255. desc->bNbrPorts = ports;
  1256. temp = 1 + (ports / 8);
  1257. desc->bDescLength = 7 + 2 * temp;
  1258. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  1259. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  1260. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  1261. temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
  1262. temp |= HUB_CHAR_NO_LPSM; /* no power switching */
  1263. desc->wHubCharacteristics = cpu_to_le16(temp);
  1264. }
  1265. /*-------------------------------------------------------------------------*/
  1266. static int fusbh200_hub_control (
  1267. struct usb_hcd *hcd,
  1268. u16 typeReq,
  1269. u16 wValue,
  1270. u16 wIndex,
  1271. char *buf,
  1272. u16 wLength
  1273. ) {
  1274. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  1275. int ports = HCS_N_PORTS (fusbh200->hcs_params);
  1276. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  1277. u32 temp, temp1, status;
  1278. unsigned long flags;
  1279. int retval = 0;
  1280. unsigned selector;
  1281. /*
  1282. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  1283. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  1284. * (track current state ourselves) ... blink for diagnostics,
  1285. * power, "this is the one", etc. EHCI spec supports this.
  1286. */
  1287. spin_lock_irqsave (&fusbh200->lock, flags);
  1288. switch (typeReq) {
  1289. case ClearHubFeature:
  1290. switch (wValue) {
  1291. case C_HUB_LOCAL_POWER:
  1292. case C_HUB_OVER_CURRENT:
  1293. /* no hub-wide feature/status flags */
  1294. break;
  1295. default:
  1296. goto error;
  1297. }
  1298. break;
  1299. case ClearPortFeature:
  1300. if (!wIndex || wIndex > ports)
  1301. goto error;
  1302. wIndex--;
  1303. temp = fusbh200_readl(fusbh200, status_reg);
  1304. temp &= ~PORT_RWC_BITS;
  1305. /*
  1306. * Even if OWNER is set, so the port is owned by the
  1307. * companion controller, hub_wq needs to be able to clear
  1308. * the port-change status bits (especially
  1309. * USB_PORT_STAT_C_CONNECTION).
  1310. */
  1311. switch (wValue) {
  1312. case USB_PORT_FEAT_ENABLE:
  1313. fusbh200_writel(fusbh200, temp & ~PORT_PE, status_reg);
  1314. break;
  1315. case USB_PORT_FEAT_C_ENABLE:
  1316. fusbh200_writel(fusbh200, temp | PORT_PEC, status_reg);
  1317. break;
  1318. case USB_PORT_FEAT_SUSPEND:
  1319. if (temp & PORT_RESET)
  1320. goto error;
  1321. if (!(temp & PORT_SUSPEND))
  1322. break;
  1323. if ((temp & PORT_PE) == 0)
  1324. goto error;
  1325. fusbh200_writel(fusbh200, temp | PORT_RESUME, status_reg);
  1326. fusbh200->reset_done[wIndex] = jiffies
  1327. + msecs_to_jiffies(USB_RESUME_TIMEOUT);
  1328. break;
  1329. case USB_PORT_FEAT_C_SUSPEND:
  1330. clear_bit(wIndex, &fusbh200->port_c_suspend);
  1331. break;
  1332. case USB_PORT_FEAT_C_CONNECTION:
  1333. fusbh200_writel(fusbh200, temp | PORT_CSC, status_reg);
  1334. break;
  1335. case USB_PORT_FEAT_C_OVER_CURRENT:
  1336. fusbh200_writel(fusbh200, temp | BMISR_OVC, &fusbh200->regs->bmisr);
  1337. break;
  1338. case USB_PORT_FEAT_C_RESET:
  1339. /* GetPortStatus clears reset */
  1340. break;
  1341. default:
  1342. goto error;
  1343. }
  1344. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted write */
  1345. break;
  1346. case GetHubDescriptor:
  1347. fusbh200_hub_descriptor (fusbh200, (struct usb_hub_descriptor *)
  1348. buf);
  1349. break;
  1350. case GetHubStatus:
  1351. /* no hub-wide feature/status flags */
  1352. memset (buf, 0, 4);
  1353. //cpu_to_le32s ((u32 *) buf);
  1354. break;
  1355. case GetPortStatus:
  1356. if (!wIndex || wIndex > ports)
  1357. goto error;
  1358. wIndex--;
  1359. status = 0;
  1360. temp = fusbh200_readl(fusbh200, status_reg);
  1361. // wPortChange bits
  1362. if (temp & PORT_CSC)
  1363. status |= USB_PORT_STAT_C_CONNECTION << 16;
  1364. if (temp & PORT_PEC)
  1365. status |= USB_PORT_STAT_C_ENABLE << 16;
  1366. temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
  1367. if (temp1 & BMISR_OVC)
  1368. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  1369. /* whoever resumes must GetPortStatus to complete it!! */
  1370. if (temp & PORT_RESUME) {
  1371. /* Remote Wakeup received? */
  1372. if (!fusbh200->reset_done[wIndex]) {
  1373. /* resume signaling for 20 msec */
  1374. fusbh200->reset_done[wIndex] = jiffies
  1375. + msecs_to_jiffies(20);
  1376. /* check the port again */
  1377. mod_timer(&fusbh200_to_hcd(fusbh200)->rh_timer,
  1378. fusbh200->reset_done[wIndex]);
  1379. }
  1380. /* resume completed? */
  1381. else if (time_after_eq(jiffies,
  1382. fusbh200->reset_done[wIndex])) {
  1383. clear_bit(wIndex, &fusbh200->suspended_ports);
  1384. set_bit(wIndex, &fusbh200->port_c_suspend);
  1385. fusbh200->reset_done[wIndex] = 0;
  1386. /* stop resume signaling */
  1387. temp = fusbh200_readl(fusbh200, status_reg);
  1388. fusbh200_writel(fusbh200,
  1389. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  1390. status_reg);
  1391. clear_bit(wIndex, &fusbh200->resuming_ports);
  1392. retval = handshake(fusbh200, status_reg,
  1393. PORT_RESUME, 0, 2000 /* 2msec */);
  1394. if (retval != 0) {
  1395. fusbh200_err(fusbh200,
  1396. "port %d resume error %d\n",
  1397. wIndex + 1, retval);
  1398. goto error;
  1399. }
  1400. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  1401. }
  1402. }
  1403. /* whoever resets must GetPortStatus to complete it!! */
  1404. if ((temp & PORT_RESET)
  1405. && time_after_eq(jiffies,
  1406. fusbh200->reset_done[wIndex])) {
  1407. status |= USB_PORT_STAT_C_RESET << 16;
  1408. fusbh200->reset_done [wIndex] = 0;
  1409. clear_bit(wIndex, &fusbh200->resuming_ports);
  1410. /* force reset to complete */
  1411. fusbh200_writel(fusbh200, temp & ~(PORT_RWC_BITS | PORT_RESET),
  1412. status_reg);
  1413. /* REVISIT: some hardware needs 550+ usec to clear
  1414. * this bit; seems too long to spin routinely...
  1415. */
  1416. retval = handshake(fusbh200, status_reg,
  1417. PORT_RESET, 0, 1000);
  1418. if (retval != 0) {
  1419. fusbh200_err (fusbh200, "port %d reset error %d\n",
  1420. wIndex + 1, retval);
  1421. goto error;
  1422. }
  1423. /* see what we found out */
  1424. temp = check_reset_complete (fusbh200, wIndex, status_reg,
  1425. fusbh200_readl(fusbh200, status_reg));
  1426. }
  1427. if (!(temp & (PORT_RESUME|PORT_RESET))) {
  1428. fusbh200->reset_done[wIndex] = 0;
  1429. clear_bit(wIndex, &fusbh200->resuming_ports);
  1430. }
  1431. /* transfer dedicated ports to the companion hc */
  1432. if ((temp & PORT_CONNECT) &&
  1433. test_bit(wIndex, &fusbh200->companion_ports)) {
  1434. temp &= ~PORT_RWC_BITS;
  1435. fusbh200_writel(fusbh200, temp, status_reg);
  1436. fusbh200_dbg(fusbh200, "port %d --> companion\n", wIndex + 1);
  1437. temp = fusbh200_readl(fusbh200, status_reg);
  1438. }
  1439. /*
  1440. * Even if OWNER is set, there's no harm letting hub_wq
  1441. * see the wPortStatus values (they should all be 0 except
  1442. * for PORT_POWER anyway).
  1443. */
  1444. if (temp & PORT_CONNECT) {
  1445. status |= USB_PORT_STAT_CONNECTION;
  1446. status |= fusbh200_port_speed(fusbh200, temp);
  1447. }
  1448. if (temp & PORT_PE)
  1449. status |= USB_PORT_STAT_ENABLE;
  1450. /* maybe the port was unsuspended without our knowledge */
  1451. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  1452. status |= USB_PORT_STAT_SUSPEND;
  1453. } else if (test_bit(wIndex, &fusbh200->suspended_ports)) {
  1454. clear_bit(wIndex, &fusbh200->suspended_ports);
  1455. clear_bit(wIndex, &fusbh200->resuming_ports);
  1456. fusbh200->reset_done[wIndex] = 0;
  1457. if (temp & PORT_PE)
  1458. set_bit(wIndex, &fusbh200->port_c_suspend);
  1459. }
  1460. temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
  1461. if (temp1 & BMISR_OVC)
  1462. status |= USB_PORT_STAT_OVERCURRENT;
  1463. if (temp & PORT_RESET)
  1464. status |= USB_PORT_STAT_RESET;
  1465. if (test_bit(wIndex, &fusbh200->port_c_suspend))
  1466. status |= USB_PORT_STAT_C_SUSPEND << 16;
  1467. if (status & ~0xffff) /* only if wPortChange is interesting */
  1468. dbg_port(fusbh200, "GetStatus", wIndex + 1, temp);
  1469. put_unaligned_le32(status, buf);
  1470. break;
  1471. case SetHubFeature:
  1472. switch (wValue) {
  1473. case C_HUB_LOCAL_POWER:
  1474. case C_HUB_OVER_CURRENT:
  1475. /* no hub-wide feature/status flags */
  1476. break;
  1477. default:
  1478. goto error;
  1479. }
  1480. break;
  1481. case SetPortFeature:
  1482. selector = wIndex >> 8;
  1483. wIndex &= 0xff;
  1484. if (!wIndex || wIndex > ports)
  1485. goto error;
  1486. wIndex--;
  1487. temp = fusbh200_readl(fusbh200, status_reg);
  1488. temp &= ~PORT_RWC_BITS;
  1489. switch (wValue) {
  1490. case USB_PORT_FEAT_SUSPEND:
  1491. if ((temp & PORT_PE) == 0
  1492. || (temp & PORT_RESET) != 0)
  1493. goto error;
  1494. /* After above check the port must be connected.
  1495. * Set appropriate bit thus could put phy into low power
  1496. * mode if we have hostpc feature
  1497. */
  1498. fusbh200_writel(fusbh200, temp | PORT_SUSPEND, status_reg);
  1499. set_bit(wIndex, &fusbh200->suspended_ports);
  1500. break;
  1501. case USB_PORT_FEAT_RESET:
  1502. if (temp & PORT_RESUME)
  1503. goto error;
  1504. /* line status bits may report this as low speed,
  1505. * which can be fine if this root hub has a
  1506. * transaction translator built in.
  1507. */
  1508. fusbh200_dbg(fusbh200, "port %d reset\n", wIndex + 1);
  1509. temp |= PORT_RESET;
  1510. temp &= ~PORT_PE;
  1511. /*
  1512. * caller must wait, then call GetPortStatus
  1513. * usb 2.0 spec says 50 ms resets on root
  1514. */
  1515. fusbh200->reset_done [wIndex] = jiffies
  1516. + msecs_to_jiffies (50);
  1517. fusbh200_writel(fusbh200, temp, status_reg);
  1518. break;
  1519. /* For downstream facing ports (these): one hub port is put
  1520. * into test mode according to USB2 11.24.2.13, then the hub
  1521. * must be reset (which for root hub now means rmmod+modprobe,
  1522. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  1523. * about the EHCI-specific stuff.
  1524. */
  1525. case USB_PORT_FEAT_TEST:
  1526. if (!selector || selector > 5)
  1527. goto error;
  1528. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1529. fusbh200_quiesce(fusbh200);
  1530. spin_lock_irqsave(&fusbh200->lock, flags);
  1531. /* Put all enabled ports into suspend */
  1532. temp = fusbh200_readl(fusbh200, status_reg) & ~PORT_RWC_BITS;
  1533. if (temp & PORT_PE)
  1534. fusbh200_writel(fusbh200, temp | PORT_SUSPEND,
  1535. status_reg);
  1536. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1537. fusbh200_halt(fusbh200);
  1538. spin_lock_irqsave(&fusbh200->lock, flags);
  1539. temp = fusbh200_readl(fusbh200, status_reg);
  1540. temp |= selector << 16;
  1541. fusbh200_writel(fusbh200, temp, status_reg);
  1542. break;
  1543. default:
  1544. goto error;
  1545. }
  1546. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
  1547. break;
  1548. default:
  1549. error:
  1550. /* "stall" on error */
  1551. retval = -EPIPE;
  1552. }
  1553. spin_unlock_irqrestore (&fusbh200->lock, flags);
  1554. return retval;
  1555. }
  1556. static void __maybe_unused fusbh200_relinquish_port(struct usb_hcd *hcd,
  1557. int portnum)
  1558. {
  1559. return;
  1560. }
  1561. static int __maybe_unused fusbh200_port_handed_over(struct usb_hcd *hcd,
  1562. int portnum)
  1563. {
  1564. return 0;
  1565. }
  1566. /*-------------------------------------------------------------------------*/
  1567. /*
  1568. * There's basically three types of memory:
  1569. * - data used only by the HCD ... kmalloc is fine
  1570. * - async and periodic schedules, shared by HC and HCD ... these
  1571. * need to use dma_pool or dma_alloc_coherent
  1572. * - driver buffers, read/written by HC ... single shot DMA mapped
  1573. *
  1574. * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
  1575. * No memory seen by this driver is pageable.
  1576. */
  1577. /*-------------------------------------------------------------------------*/
  1578. /* Allocate the key transfer structures from the previously allocated pool */
  1579. static inline void fusbh200_qtd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd,
  1580. dma_addr_t dma)
  1581. {
  1582. memset (qtd, 0, sizeof *qtd);
  1583. qtd->qtd_dma = dma;
  1584. qtd->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
  1585. qtd->hw_next = FUSBH200_LIST_END(fusbh200);
  1586. qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  1587. INIT_LIST_HEAD (&qtd->qtd_list);
  1588. }
  1589. static struct fusbh200_qtd *fusbh200_qtd_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1590. {
  1591. struct fusbh200_qtd *qtd;
  1592. dma_addr_t dma;
  1593. qtd = dma_pool_alloc (fusbh200->qtd_pool, flags, &dma);
  1594. if (qtd != NULL) {
  1595. fusbh200_qtd_init(fusbh200, qtd, dma);
  1596. }
  1597. return qtd;
  1598. }
  1599. static inline void fusbh200_qtd_free (struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
  1600. {
  1601. dma_pool_free (fusbh200->qtd_pool, qtd, qtd->qtd_dma);
  1602. }
  1603. static void qh_destroy(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1604. {
  1605. /* clean qtds first, and know this is not linked */
  1606. if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
  1607. fusbh200_dbg (fusbh200, "unused qh not empty!\n");
  1608. BUG ();
  1609. }
  1610. if (qh->dummy)
  1611. fusbh200_qtd_free (fusbh200, qh->dummy);
  1612. dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
  1613. kfree(qh);
  1614. }
  1615. static struct fusbh200_qh *fusbh200_qh_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1616. {
  1617. struct fusbh200_qh *qh;
  1618. dma_addr_t dma;
  1619. qh = kzalloc(sizeof *qh, GFP_ATOMIC);
  1620. if (!qh)
  1621. goto done;
  1622. qh->hw = (struct fusbh200_qh_hw *)
  1623. dma_pool_alloc(fusbh200->qh_pool, flags, &dma);
  1624. if (!qh->hw)
  1625. goto fail;
  1626. memset(qh->hw, 0, sizeof *qh->hw);
  1627. qh->qh_dma = dma;
  1628. // INIT_LIST_HEAD (&qh->qh_list);
  1629. INIT_LIST_HEAD (&qh->qtd_list);
  1630. /* dummy td enables safe urb queuing */
  1631. qh->dummy = fusbh200_qtd_alloc (fusbh200, flags);
  1632. if (qh->dummy == NULL) {
  1633. fusbh200_dbg (fusbh200, "no dummy td\n");
  1634. goto fail1;
  1635. }
  1636. done:
  1637. return qh;
  1638. fail1:
  1639. dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
  1640. fail:
  1641. kfree(qh);
  1642. return NULL;
  1643. }
  1644. /*-------------------------------------------------------------------------*/
  1645. /* The queue heads and transfer descriptors are managed from pools tied
  1646. * to each of the "per device" structures.
  1647. * This is the initialisation and cleanup code.
  1648. */
  1649. static void fusbh200_mem_cleanup (struct fusbh200_hcd *fusbh200)
  1650. {
  1651. if (fusbh200->async)
  1652. qh_destroy(fusbh200, fusbh200->async);
  1653. fusbh200->async = NULL;
  1654. if (fusbh200->dummy)
  1655. qh_destroy(fusbh200, fusbh200->dummy);
  1656. fusbh200->dummy = NULL;
  1657. /* DMA consistent memory and pools */
  1658. if (fusbh200->qtd_pool)
  1659. dma_pool_destroy (fusbh200->qtd_pool);
  1660. fusbh200->qtd_pool = NULL;
  1661. if (fusbh200->qh_pool) {
  1662. dma_pool_destroy (fusbh200->qh_pool);
  1663. fusbh200->qh_pool = NULL;
  1664. }
  1665. if (fusbh200->itd_pool)
  1666. dma_pool_destroy (fusbh200->itd_pool);
  1667. fusbh200->itd_pool = NULL;
  1668. if (fusbh200->periodic)
  1669. dma_free_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
  1670. fusbh200->periodic_size * sizeof (u32),
  1671. fusbh200->periodic, fusbh200->periodic_dma);
  1672. fusbh200->periodic = NULL;
  1673. /* shadow periodic table */
  1674. kfree(fusbh200->pshadow);
  1675. fusbh200->pshadow = NULL;
  1676. }
  1677. /* remember to add cleanup code (above) if you add anything here */
  1678. static int fusbh200_mem_init (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1679. {
  1680. int i;
  1681. /* QTDs for control/bulk/intr transfers */
  1682. fusbh200->qtd_pool = dma_pool_create ("fusbh200_qtd",
  1683. fusbh200_to_hcd(fusbh200)->self.controller,
  1684. sizeof (struct fusbh200_qtd),
  1685. 32 /* byte alignment (for hw parts) */,
  1686. 4096 /* can't cross 4K */);
  1687. if (!fusbh200->qtd_pool) {
  1688. goto fail;
  1689. }
  1690. /* QHs for control/bulk/intr transfers */
  1691. fusbh200->qh_pool = dma_pool_create ("fusbh200_qh",
  1692. fusbh200_to_hcd(fusbh200)->self.controller,
  1693. sizeof(struct fusbh200_qh_hw),
  1694. 32 /* byte alignment (for hw parts) */,
  1695. 4096 /* can't cross 4K */);
  1696. if (!fusbh200->qh_pool) {
  1697. goto fail;
  1698. }
  1699. fusbh200->async = fusbh200_qh_alloc (fusbh200, flags);
  1700. if (!fusbh200->async) {
  1701. goto fail;
  1702. }
  1703. /* ITD for high speed ISO transfers */
  1704. fusbh200->itd_pool = dma_pool_create ("fusbh200_itd",
  1705. fusbh200_to_hcd(fusbh200)->self.controller,
  1706. sizeof (struct fusbh200_itd),
  1707. 64 /* byte alignment (for hw parts) */,
  1708. 4096 /* can't cross 4K */);
  1709. if (!fusbh200->itd_pool) {
  1710. goto fail;
  1711. }
  1712. /* Hardware periodic table */
  1713. fusbh200->periodic = (__le32 *)
  1714. dma_alloc_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
  1715. fusbh200->periodic_size * sizeof(__le32),
  1716. &fusbh200->periodic_dma, 0);
  1717. if (fusbh200->periodic == NULL) {
  1718. goto fail;
  1719. }
  1720. for (i = 0; i < fusbh200->periodic_size; i++)
  1721. fusbh200->periodic[i] = FUSBH200_LIST_END(fusbh200);
  1722. /* software shadow of hardware table */
  1723. fusbh200->pshadow = kcalloc(fusbh200->periodic_size, sizeof(void *), flags);
  1724. if (fusbh200->pshadow != NULL)
  1725. return 0;
  1726. fail:
  1727. fusbh200_dbg (fusbh200, "couldn't init memory\n");
  1728. fusbh200_mem_cleanup (fusbh200);
  1729. return -ENOMEM;
  1730. }
  1731. /*-------------------------------------------------------------------------*/
  1732. /*
  1733. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  1734. *
  1735. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  1736. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  1737. * buffers needed for the larger number). We use one QH per endpoint, queue
  1738. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  1739. *
  1740. * ISO traffic uses "ISO TD" (itd) records, and (along with
  1741. * interrupts) needs careful scheduling. Performance improvements can be
  1742. * an ongoing challenge. That's in "ehci-sched.c".
  1743. *
  1744. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  1745. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  1746. * (b) special fields in qh entries or (c) split iso entries. TTs will
  1747. * buffer low/full speed data so the host collects it at high speed.
  1748. */
  1749. /*-------------------------------------------------------------------------*/
  1750. /* fill a qtd, returning how much of the buffer we were able to queue up */
  1751. static int
  1752. qtd_fill(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd, dma_addr_t buf,
  1753. size_t len, int token, int maxpacket)
  1754. {
  1755. int i, count;
  1756. u64 addr = buf;
  1757. /* one buffer entry per 4K ... first might be short or unaligned */
  1758. qtd->hw_buf[0] = cpu_to_hc32(fusbh200, (u32)addr);
  1759. qtd->hw_buf_hi[0] = cpu_to_hc32(fusbh200, (u32)(addr >> 32));
  1760. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  1761. if (likely (len < count)) /* ... iff needed */
  1762. count = len;
  1763. else {
  1764. buf += 0x1000;
  1765. buf &= ~0x0fff;
  1766. /* per-qtd limit: from 16K to 20K (best alignment) */
  1767. for (i = 1; count < len && i < 5; i++) {
  1768. addr = buf;
  1769. qtd->hw_buf[i] = cpu_to_hc32(fusbh200, (u32)addr);
  1770. qtd->hw_buf_hi[i] = cpu_to_hc32(fusbh200,
  1771. (u32)(addr >> 32));
  1772. buf += 0x1000;
  1773. if ((count + 0x1000) < len)
  1774. count += 0x1000;
  1775. else
  1776. count = len;
  1777. }
  1778. /* short packets may only terminate transfers */
  1779. if (count != len)
  1780. count -= (count % maxpacket);
  1781. }
  1782. qtd->hw_token = cpu_to_hc32(fusbh200, (count << 16) | token);
  1783. qtd->length = count;
  1784. return count;
  1785. }
  1786. /*-------------------------------------------------------------------------*/
  1787. static inline void
  1788. qh_update (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh, struct fusbh200_qtd *qtd)
  1789. {
  1790. struct fusbh200_qh_hw *hw = qh->hw;
  1791. /* writes to an active overlay are unsafe */
  1792. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  1793. hw->hw_qtd_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  1794. hw->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  1795. /* Except for control endpoints, we make hardware maintain data
  1796. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  1797. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  1798. * ever clear it.
  1799. */
  1800. if (!(hw->hw_info1 & cpu_to_hc32(fusbh200, QH_TOGGLE_CTL))) {
  1801. unsigned is_out, epnum;
  1802. is_out = qh->is_out;
  1803. epnum = (hc32_to_cpup(fusbh200, &hw->hw_info1) >> 8) & 0x0f;
  1804. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  1805. hw->hw_token &= ~cpu_to_hc32(fusbh200, QTD_TOGGLE);
  1806. usb_settoggle (qh->dev, epnum, is_out, 1);
  1807. }
  1808. }
  1809. hw->hw_token &= cpu_to_hc32(fusbh200, QTD_TOGGLE | QTD_STS_PING);
  1810. }
  1811. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  1812. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  1813. * recovery (including urb dequeue) would need software changes to a QH...
  1814. */
  1815. static void
  1816. qh_refresh (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1817. {
  1818. struct fusbh200_qtd *qtd;
  1819. if (list_empty (&qh->qtd_list))
  1820. qtd = qh->dummy;
  1821. else {
  1822. qtd = list_entry (qh->qtd_list.next,
  1823. struct fusbh200_qtd, qtd_list);
  1824. /*
  1825. * first qtd may already be partially processed.
  1826. * If we come here during unlink, the QH overlay region
  1827. * might have reference to the just unlinked qtd. The
  1828. * qtd is updated in qh_completions(). Update the QH
  1829. * overlay here.
  1830. */
  1831. if (cpu_to_hc32(fusbh200, qtd->qtd_dma) == qh->hw->hw_current) {
  1832. qh->hw->hw_qtd_next = qtd->hw_next;
  1833. qtd = NULL;
  1834. }
  1835. }
  1836. if (qtd)
  1837. qh_update (fusbh200, qh, qtd);
  1838. }
  1839. /*-------------------------------------------------------------------------*/
  1840. static void qh_link_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  1841. static void fusbh200_clear_tt_buffer_complete(struct usb_hcd *hcd,
  1842. struct usb_host_endpoint *ep)
  1843. {
  1844. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  1845. struct fusbh200_qh *qh = ep->hcpriv;
  1846. unsigned long flags;
  1847. spin_lock_irqsave(&fusbh200->lock, flags);
  1848. qh->clearing_tt = 0;
  1849. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  1850. && fusbh200->rh_state == FUSBH200_RH_RUNNING)
  1851. qh_link_async(fusbh200, qh);
  1852. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1853. }
  1854. static void fusbh200_clear_tt_buffer(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh,
  1855. struct urb *urb, u32 token)
  1856. {
  1857. /* If an async split transaction gets an error or is unlinked,
  1858. * the TT buffer may be left in an indeterminate state. We
  1859. * have to clear the TT buffer.
  1860. *
  1861. * Note: this routine is never called for Isochronous transfers.
  1862. */
  1863. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  1864. struct usb_device *tt = urb->dev->tt->hub;
  1865. dev_dbg(&tt->dev,
  1866. "clear tt buffer port %d, a%d ep%d t%08x\n",
  1867. urb->dev->ttport, urb->dev->devnum,
  1868. usb_pipeendpoint(urb->pipe), token);
  1869. if (urb->dev->tt->hub !=
  1870. fusbh200_to_hcd(fusbh200)->self.root_hub) {
  1871. if (usb_hub_clear_tt_buffer(urb) == 0)
  1872. qh->clearing_tt = 1;
  1873. }
  1874. }
  1875. }
  1876. static int qtd_copy_status (
  1877. struct fusbh200_hcd *fusbh200,
  1878. struct urb *urb,
  1879. size_t length,
  1880. u32 token
  1881. )
  1882. {
  1883. int status = -EINPROGRESS;
  1884. /* count IN/OUT bytes, not SETUP (even short packets) */
  1885. if (likely (QTD_PID (token) != 2))
  1886. urb->actual_length += length - QTD_LENGTH (token);
  1887. /* don't modify error codes */
  1888. if (unlikely(urb->unlinked))
  1889. return status;
  1890. /* force cleanup after short read; not always an error */
  1891. if (unlikely (IS_SHORT_READ (token)))
  1892. status = -EREMOTEIO;
  1893. /* serious "can't proceed" faults reported by the hardware */
  1894. if (token & QTD_STS_HALT) {
  1895. if (token & QTD_STS_BABBLE) {
  1896. /* FIXME "must" disable babbling device's port too */
  1897. status = -EOVERFLOW;
  1898. /* CERR nonzero + halt --> stall */
  1899. } else if (QTD_CERR(token)) {
  1900. status = -EPIPE;
  1901. /* In theory, more than one of the following bits can be set
  1902. * since they are sticky and the transaction is retried.
  1903. * Which to test first is rather arbitrary.
  1904. */
  1905. } else if (token & QTD_STS_MMF) {
  1906. /* fs/ls interrupt xfer missed the complete-split */
  1907. status = -EPROTO;
  1908. } else if (token & QTD_STS_DBE) {
  1909. status = (QTD_PID (token) == 1) /* IN ? */
  1910. ? -ENOSR /* hc couldn't read data */
  1911. : -ECOMM; /* hc couldn't write data */
  1912. } else if (token & QTD_STS_XACT) {
  1913. /* timeout, bad CRC, wrong PID, etc */
  1914. fusbh200_dbg(fusbh200, "devpath %s ep%d%s 3strikes\n",
  1915. urb->dev->devpath,
  1916. usb_pipeendpoint(urb->pipe),
  1917. usb_pipein(urb->pipe) ? "in" : "out");
  1918. status = -EPROTO;
  1919. } else { /* unknown */
  1920. status = -EPROTO;
  1921. }
  1922. fusbh200_dbg(fusbh200,
  1923. "dev%d ep%d%s qtd token %08x --> status %d\n",
  1924. usb_pipedevice (urb->pipe),
  1925. usb_pipeendpoint (urb->pipe),
  1926. usb_pipein (urb->pipe) ? "in" : "out",
  1927. token, status);
  1928. }
  1929. return status;
  1930. }
  1931. static void
  1932. fusbh200_urb_done(struct fusbh200_hcd *fusbh200, struct urb *urb, int status)
  1933. __releases(fusbh200->lock)
  1934. __acquires(fusbh200->lock)
  1935. {
  1936. if (likely (urb->hcpriv != NULL)) {
  1937. struct fusbh200_qh *qh = (struct fusbh200_qh *) urb->hcpriv;
  1938. /* S-mask in a QH means it's an interrupt urb */
  1939. if ((qh->hw->hw_info2 & cpu_to_hc32(fusbh200, QH_SMASK)) != 0) {
  1940. /* ... update hc-wide periodic stats (for usbfs) */
  1941. fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs--;
  1942. }
  1943. }
  1944. if (unlikely(urb->unlinked)) {
  1945. COUNT(fusbh200->stats.unlink);
  1946. } else {
  1947. /* report non-error and short read status as zero */
  1948. if (status == -EINPROGRESS || status == -EREMOTEIO)
  1949. status = 0;
  1950. COUNT(fusbh200->stats.complete);
  1951. }
  1952. #ifdef FUSBH200_URB_TRACE
  1953. fusbh200_dbg (fusbh200,
  1954. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  1955. __func__, urb->dev->devpath, urb,
  1956. usb_pipeendpoint (urb->pipe),
  1957. usb_pipein (urb->pipe) ? "in" : "out",
  1958. status,
  1959. urb->actual_length, urb->transfer_buffer_length);
  1960. #endif
  1961. /* complete() can reenter this HCD */
  1962. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  1963. spin_unlock (&fusbh200->lock);
  1964. usb_hcd_giveback_urb(fusbh200_to_hcd(fusbh200), urb, status);
  1965. spin_lock (&fusbh200->lock);
  1966. }
  1967. static int qh_schedule (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  1968. /*
  1969. * Process and free completed qtds for a qh, returning URBs to drivers.
  1970. * Chases up to qh->hw_current. Returns number of completions called,
  1971. * indicating how much "real" work we did.
  1972. */
  1973. static unsigned
  1974. qh_completions (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1975. {
  1976. struct fusbh200_qtd *last, *end = qh->dummy;
  1977. struct list_head *entry, *tmp;
  1978. int last_status;
  1979. int stopped;
  1980. unsigned count = 0;
  1981. u8 state;
  1982. struct fusbh200_qh_hw *hw = qh->hw;
  1983. if (unlikely (list_empty (&qh->qtd_list)))
  1984. return count;
  1985. /* completions (or tasks on other cpus) must never clobber HALT
  1986. * till we've gone through and cleaned everything up, even when
  1987. * they add urbs to this qh's queue or mark them for unlinking.
  1988. *
  1989. * NOTE: unlinking expects to be done in queue order.
  1990. *
  1991. * It's a bug for qh->qh_state to be anything other than
  1992. * QH_STATE_IDLE, unless our caller is scan_async() or
  1993. * scan_intr().
  1994. */
  1995. state = qh->qh_state;
  1996. qh->qh_state = QH_STATE_COMPLETING;
  1997. stopped = (state == QH_STATE_IDLE);
  1998. rescan:
  1999. last = NULL;
  2000. last_status = -EINPROGRESS;
  2001. qh->needs_rescan = 0;
  2002. /* remove de-activated QTDs from front of queue.
  2003. * after faults (including short reads), cleanup this urb
  2004. * then let the queue advance.
  2005. * if queue is stopped, handles unlinks.
  2006. */
  2007. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  2008. struct fusbh200_qtd *qtd;
  2009. struct urb *urb;
  2010. u32 token = 0;
  2011. qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
  2012. urb = qtd->urb;
  2013. /* clean up any state from previous QTD ...*/
  2014. if (last) {
  2015. if (likely (last->urb != urb)) {
  2016. fusbh200_urb_done(fusbh200, last->urb, last_status);
  2017. count++;
  2018. last_status = -EINPROGRESS;
  2019. }
  2020. fusbh200_qtd_free (fusbh200, last);
  2021. last = NULL;
  2022. }
  2023. /* ignore urbs submitted during completions we reported */
  2024. if (qtd == end)
  2025. break;
  2026. /* hardware copies qtd out of qh overlay */
  2027. rmb ();
  2028. token = hc32_to_cpu(fusbh200, qtd->hw_token);
  2029. /* always clean up qtds the hc de-activated */
  2030. retry_xacterr:
  2031. if ((token & QTD_STS_ACTIVE) == 0) {
  2032. /* Report Data Buffer Error: non-fatal but useful */
  2033. if (token & QTD_STS_DBE)
  2034. fusbh200_dbg(fusbh200,
  2035. "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  2036. urb,
  2037. usb_endpoint_num(&urb->ep->desc),
  2038. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  2039. urb->transfer_buffer_length,
  2040. qtd,
  2041. qh);
  2042. /* on STALL, error, and short reads this urb must
  2043. * complete and all its qtds must be recycled.
  2044. */
  2045. if ((token & QTD_STS_HALT) != 0) {
  2046. /* retry transaction errors until we
  2047. * reach the software xacterr limit
  2048. */
  2049. if ((token & QTD_STS_XACT) &&
  2050. QTD_CERR(token) == 0 &&
  2051. ++qh->xacterrs < QH_XACTERR_MAX &&
  2052. !urb->unlinked) {
  2053. fusbh200_dbg(fusbh200,
  2054. "detected XactErr len %zu/%zu retry %d\n",
  2055. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  2056. /* reset the token in the qtd and the
  2057. * qh overlay (which still contains
  2058. * the qtd) so that we pick up from
  2059. * where we left off
  2060. */
  2061. token &= ~QTD_STS_HALT;
  2062. token |= QTD_STS_ACTIVE |
  2063. (FUSBH200_TUNE_CERR << 10);
  2064. qtd->hw_token = cpu_to_hc32(fusbh200,
  2065. token);
  2066. wmb();
  2067. hw->hw_token = cpu_to_hc32(fusbh200,
  2068. token);
  2069. goto retry_xacterr;
  2070. }
  2071. stopped = 1;
  2072. /* magic dummy for some short reads; qh won't advance.
  2073. * that silicon quirk can kick in with this dummy too.
  2074. *
  2075. * other short reads won't stop the queue, including
  2076. * control transfers (status stage handles that) or
  2077. * most other single-qtd reads ... the queue stops if
  2078. * URB_SHORT_NOT_OK was set so the driver submitting
  2079. * the urbs could clean it up.
  2080. */
  2081. } else if (IS_SHORT_READ (token)
  2082. && !(qtd->hw_alt_next
  2083. & FUSBH200_LIST_END(fusbh200))) {
  2084. stopped = 1;
  2085. }
  2086. /* stop scanning when we reach qtds the hc is using */
  2087. } else if (likely (!stopped
  2088. && fusbh200->rh_state >= FUSBH200_RH_RUNNING)) {
  2089. break;
  2090. /* scan the whole queue for unlinks whenever it stops */
  2091. } else {
  2092. stopped = 1;
  2093. /* cancel everything if we halt, suspend, etc */
  2094. if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  2095. last_status = -ESHUTDOWN;
  2096. /* this qtd is active; skip it unless a previous qtd
  2097. * for its urb faulted, or its urb was canceled.
  2098. */
  2099. else if (last_status == -EINPROGRESS && !urb->unlinked)
  2100. continue;
  2101. /* qh unlinked; token in overlay may be most current */
  2102. if (state == QH_STATE_IDLE
  2103. && cpu_to_hc32(fusbh200, qtd->qtd_dma)
  2104. == hw->hw_current) {
  2105. token = hc32_to_cpu(fusbh200, hw->hw_token);
  2106. /* An unlink may leave an incomplete
  2107. * async transaction in the TT buffer.
  2108. * We have to clear it.
  2109. */
  2110. fusbh200_clear_tt_buffer(fusbh200, qh, urb, token);
  2111. }
  2112. }
  2113. /* unless we already know the urb's status, collect qtd status
  2114. * and update count of bytes transferred. in common short read
  2115. * cases with only one data qtd (including control transfers),
  2116. * queue processing won't halt. but with two or more qtds (for
  2117. * example, with a 32 KB transfer), when the first qtd gets a
  2118. * short read the second must be removed by hand.
  2119. */
  2120. if (last_status == -EINPROGRESS) {
  2121. last_status = qtd_copy_status(fusbh200, urb,
  2122. qtd->length, token);
  2123. if (last_status == -EREMOTEIO
  2124. && (qtd->hw_alt_next
  2125. & FUSBH200_LIST_END(fusbh200)))
  2126. last_status = -EINPROGRESS;
  2127. /* As part of low/full-speed endpoint-halt processing
  2128. * we must clear the TT buffer (11.17.5).
  2129. */
  2130. if (unlikely(last_status != -EINPROGRESS &&
  2131. last_status != -EREMOTEIO)) {
  2132. /* The TT's in some hubs malfunction when they
  2133. * receive this request following a STALL (they
  2134. * stop sending isochronous packets). Since a
  2135. * STALL can't leave the TT buffer in a busy
  2136. * state (if you believe Figures 11-48 - 11-51
  2137. * in the USB 2.0 spec), we won't clear the TT
  2138. * buffer in this case. Strictly speaking this
  2139. * is a violation of the spec.
  2140. */
  2141. if (last_status != -EPIPE)
  2142. fusbh200_clear_tt_buffer(fusbh200, qh, urb,
  2143. token);
  2144. }
  2145. }
  2146. /* if we're removing something not at the queue head,
  2147. * patch the hardware queue pointer.
  2148. */
  2149. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  2150. last = list_entry (qtd->qtd_list.prev,
  2151. struct fusbh200_qtd, qtd_list);
  2152. last->hw_next = qtd->hw_next;
  2153. }
  2154. /* remove qtd; it's recycled after possible urb completion */
  2155. list_del (&qtd->qtd_list);
  2156. last = qtd;
  2157. /* reinit the xacterr counter for the next qtd */
  2158. qh->xacterrs = 0;
  2159. }
  2160. /* last urb's completion might still need calling */
  2161. if (likely (last != NULL)) {
  2162. fusbh200_urb_done(fusbh200, last->urb, last_status);
  2163. count++;
  2164. fusbh200_qtd_free (fusbh200, last);
  2165. }
  2166. /* Do we need to rescan for URBs dequeued during a giveback? */
  2167. if (unlikely(qh->needs_rescan)) {
  2168. /* If the QH is already unlinked, do the rescan now. */
  2169. if (state == QH_STATE_IDLE)
  2170. goto rescan;
  2171. /* Otherwise we have to wait until the QH is fully unlinked.
  2172. * Our caller will start an unlink if qh->needs_rescan is
  2173. * set. But if an unlink has already started, nothing needs
  2174. * to be done.
  2175. */
  2176. if (state != QH_STATE_LINKED)
  2177. qh->needs_rescan = 0;
  2178. }
  2179. /* restore original state; caller must unlink or relink */
  2180. qh->qh_state = state;
  2181. /* be sure the hardware's done with the qh before refreshing
  2182. * it after fault cleanup, or recovering from silicon wrongly
  2183. * overlaying the dummy qtd (which reduces DMA chatter).
  2184. */
  2185. if (stopped != 0 || hw->hw_qtd_next == FUSBH200_LIST_END(fusbh200)) {
  2186. switch (state) {
  2187. case QH_STATE_IDLE:
  2188. qh_refresh(fusbh200, qh);
  2189. break;
  2190. case QH_STATE_LINKED:
  2191. /* We won't refresh a QH that's linked (after the HC
  2192. * stopped the queue). That avoids a race:
  2193. * - HC reads first part of QH;
  2194. * - CPU updates that first part and the token;
  2195. * - HC reads rest of that QH, including token
  2196. * Result: HC gets an inconsistent image, and then
  2197. * DMAs to/from the wrong memory (corrupting it).
  2198. *
  2199. * That should be rare for interrupt transfers,
  2200. * except maybe high bandwidth ...
  2201. */
  2202. /* Tell the caller to start an unlink */
  2203. qh->needs_rescan = 1;
  2204. break;
  2205. /* otherwise, unlink already started */
  2206. }
  2207. }
  2208. return count;
  2209. }
  2210. /*-------------------------------------------------------------------------*/
  2211. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  2212. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  2213. // ... and packet size, for any kind of endpoint descriptor
  2214. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  2215. /*
  2216. * reverse of qh_urb_transaction: free a list of TDs.
  2217. * used for cleanup after errors, before HC sees an URB's TDs.
  2218. */
  2219. static void qtd_list_free (
  2220. struct fusbh200_hcd *fusbh200,
  2221. struct urb *urb,
  2222. struct list_head *qtd_list
  2223. ) {
  2224. struct list_head *entry, *temp;
  2225. list_for_each_safe (entry, temp, qtd_list) {
  2226. struct fusbh200_qtd *qtd;
  2227. qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
  2228. list_del (&qtd->qtd_list);
  2229. fusbh200_qtd_free (fusbh200, qtd);
  2230. }
  2231. }
  2232. /*
  2233. * create a list of filled qtds for this URB; won't link into qh.
  2234. */
  2235. static struct list_head *
  2236. qh_urb_transaction (
  2237. struct fusbh200_hcd *fusbh200,
  2238. struct urb *urb,
  2239. struct list_head *head,
  2240. gfp_t flags
  2241. ) {
  2242. struct fusbh200_qtd *qtd, *qtd_prev;
  2243. dma_addr_t buf;
  2244. int len, this_sg_len, maxpacket;
  2245. int is_input;
  2246. u32 token;
  2247. int i;
  2248. struct scatterlist *sg;
  2249. /*
  2250. * URBs map to sequences of QTDs: one logical transaction
  2251. */
  2252. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2253. if (unlikely (!qtd))
  2254. return NULL;
  2255. list_add_tail (&qtd->qtd_list, head);
  2256. qtd->urb = urb;
  2257. token = QTD_STS_ACTIVE;
  2258. token |= (FUSBH200_TUNE_CERR << 10);
  2259. /* for split transactions, SplitXState initialized to zero */
  2260. len = urb->transfer_buffer_length;
  2261. is_input = usb_pipein (urb->pipe);
  2262. if (usb_pipecontrol (urb->pipe)) {
  2263. /* SETUP pid */
  2264. qtd_fill(fusbh200, qtd, urb->setup_dma,
  2265. sizeof (struct usb_ctrlrequest),
  2266. token | (2 /* "setup" */ << 8), 8);
  2267. /* ... and always at least one more pid */
  2268. token ^= QTD_TOGGLE;
  2269. qtd_prev = qtd;
  2270. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2271. if (unlikely (!qtd))
  2272. goto cleanup;
  2273. qtd->urb = urb;
  2274. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2275. list_add_tail (&qtd->qtd_list, head);
  2276. /* for zero length DATA stages, STATUS is always IN */
  2277. if (len == 0)
  2278. token |= (1 /* "in" */ << 8);
  2279. }
  2280. /*
  2281. * data transfer stage: buffer setup
  2282. */
  2283. i = urb->num_mapped_sgs;
  2284. if (len > 0 && i > 0) {
  2285. sg = urb->sg;
  2286. buf = sg_dma_address(sg);
  2287. /* urb->transfer_buffer_length may be smaller than the
  2288. * size of the scatterlist (or vice versa)
  2289. */
  2290. this_sg_len = min_t(int, sg_dma_len(sg), len);
  2291. } else {
  2292. sg = NULL;
  2293. buf = urb->transfer_dma;
  2294. this_sg_len = len;
  2295. }
  2296. if (is_input)
  2297. token |= (1 /* "in" */ << 8);
  2298. /* else it's already initted to "out" pid (0 << 8) */
  2299. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  2300. /*
  2301. * buffer gets wrapped in one or more qtds;
  2302. * last one may be "short" (including zero len)
  2303. * and may serve as a control status ack
  2304. */
  2305. for (;;) {
  2306. int this_qtd_len;
  2307. this_qtd_len = qtd_fill(fusbh200, qtd, buf, this_sg_len, token,
  2308. maxpacket);
  2309. this_sg_len -= this_qtd_len;
  2310. len -= this_qtd_len;
  2311. buf += this_qtd_len;
  2312. /*
  2313. * short reads advance to a "magic" dummy instead of the next
  2314. * qtd ... that forces the queue to stop, for manual cleanup.
  2315. * (this will usually be overridden later.)
  2316. */
  2317. if (is_input)
  2318. qtd->hw_alt_next = fusbh200->async->hw->hw_alt_next;
  2319. /* qh makes control packets use qtd toggle; maybe switch it */
  2320. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  2321. token ^= QTD_TOGGLE;
  2322. if (likely(this_sg_len <= 0)) {
  2323. if (--i <= 0 || len <= 0)
  2324. break;
  2325. sg = sg_next(sg);
  2326. buf = sg_dma_address(sg);
  2327. this_sg_len = min_t(int, sg_dma_len(sg), len);
  2328. }
  2329. qtd_prev = qtd;
  2330. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2331. if (unlikely (!qtd))
  2332. goto cleanup;
  2333. qtd->urb = urb;
  2334. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2335. list_add_tail (&qtd->qtd_list, head);
  2336. }
  2337. /*
  2338. * unless the caller requires manual cleanup after short reads,
  2339. * have the alt_next mechanism keep the queue running after the
  2340. * last data qtd (the only one, for control and most other cases).
  2341. */
  2342. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  2343. || usb_pipecontrol (urb->pipe)))
  2344. qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  2345. /*
  2346. * control requests may need a terminating data "status" ack;
  2347. * other OUT ones may need a terminating short packet
  2348. * (zero length).
  2349. */
  2350. if (likely (urb->transfer_buffer_length != 0)) {
  2351. int one_more = 0;
  2352. if (usb_pipecontrol (urb->pipe)) {
  2353. one_more = 1;
  2354. token ^= 0x0100; /* "in" <--> "out" */
  2355. token |= QTD_TOGGLE; /* force DATA1 */
  2356. } else if (usb_pipeout(urb->pipe)
  2357. && (urb->transfer_flags & URB_ZERO_PACKET)
  2358. && !(urb->transfer_buffer_length % maxpacket)) {
  2359. one_more = 1;
  2360. }
  2361. if (one_more) {
  2362. qtd_prev = qtd;
  2363. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2364. if (unlikely (!qtd))
  2365. goto cleanup;
  2366. qtd->urb = urb;
  2367. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2368. list_add_tail (&qtd->qtd_list, head);
  2369. /* never any data in such packets */
  2370. qtd_fill(fusbh200, qtd, 0, 0, token, 0);
  2371. }
  2372. }
  2373. /* by default, enable interrupt on urb completion */
  2374. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  2375. qtd->hw_token |= cpu_to_hc32(fusbh200, QTD_IOC);
  2376. return head;
  2377. cleanup:
  2378. qtd_list_free (fusbh200, urb, head);
  2379. return NULL;
  2380. }
  2381. /*-------------------------------------------------------------------------*/
  2382. // Would be best to create all qh's from config descriptors,
  2383. // when each interface/altsetting is established. Unlink
  2384. // any previous qh and cancel its urbs first; endpoints are
  2385. // implicitly reset then (data toggle too).
  2386. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  2387. /*
  2388. * Each QH holds a qtd list; a QH is used for everything except iso.
  2389. *
  2390. * For interrupt urbs, the scheduler must set the microframe scheduling
  2391. * mask(s) each time the QH gets scheduled. For highspeed, that's
  2392. * just one microframe in the s-mask. For split interrupt transactions
  2393. * there are additional complications: c-mask, maybe FSTNs.
  2394. */
  2395. static struct fusbh200_qh *
  2396. qh_make (
  2397. struct fusbh200_hcd *fusbh200,
  2398. struct urb *urb,
  2399. gfp_t flags
  2400. ) {
  2401. struct fusbh200_qh *qh = fusbh200_qh_alloc (fusbh200, flags);
  2402. u32 info1 = 0, info2 = 0;
  2403. int is_input, type;
  2404. int maxp = 0;
  2405. struct usb_tt *tt = urb->dev->tt;
  2406. struct fusbh200_qh_hw *hw;
  2407. if (!qh)
  2408. return qh;
  2409. /*
  2410. * init endpoint/device data for this QH
  2411. */
  2412. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  2413. info1 |= usb_pipedevice (urb->pipe) << 0;
  2414. is_input = usb_pipein (urb->pipe);
  2415. type = usb_pipetype (urb->pipe);
  2416. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  2417. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  2418. * acts like up to 3KB, but is built from smaller packets.
  2419. */
  2420. if (max_packet(maxp) > 1024) {
  2421. fusbh200_dbg(fusbh200, "bogus qh maxpacket %d\n", max_packet(maxp));
  2422. goto done;
  2423. }
  2424. /* Compute interrupt scheduling parameters just once, and save.
  2425. * - allowing for high bandwidth, how many nsec/uframe are used?
  2426. * - split transactions need a second CSPLIT uframe; same question
  2427. * - splits also need a schedule gap (for full/low speed I/O)
  2428. * - qh has a polling interval
  2429. *
  2430. * For control/bulk requests, the HC or TT handles these.
  2431. */
  2432. if (type == PIPE_INTERRUPT) {
  2433. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  2434. is_input, 0,
  2435. hb_mult(maxp) * max_packet(maxp)));
  2436. qh->start = NO_FRAME;
  2437. if (urb->dev->speed == USB_SPEED_HIGH) {
  2438. qh->c_usecs = 0;
  2439. qh->gap_uf = 0;
  2440. qh->period = urb->interval >> 3;
  2441. if (qh->period == 0 && urb->interval != 1) {
  2442. /* NOTE interval 2 or 4 uframes could work.
  2443. * But interval 1 scheduling is simpler, and
  2444. * includes high bandwidth.
  2445. */
  2446. urb->interval = 1;
  2447. } else if (qh->period > fusbh200->periodic_size) {
  2448. qh->period = fusbh200->periodic_size;
  2449. urb->interval = qh->period << 3;
  2450. }
  2451. } else {
  2452. int think_time;
  2453. /* gap is f(FS/LS transfer times) */
  2454. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  2455. is_input, 0, maxp) / (125 * 1000);
  2456. /* FIXME this just approximates SPLIT/CSPLIT times */
  2457. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  2458. qh->c_usecs = qh->usecs + HS_USECS (0);
  2459. qh->usecs = HS_USECS (1);
  2460. } else { // SPLIT+DATA, gap, CSPLIT
  2461. qh->usecs += HS_USECS (1);
  2462. qh->c_usecs = HS_USECS (0);
  2463. }
  2464. think_time = tt ? tt->think_time : 0;
  2465. qh->tt_usecs = NS_TO_US (think_time +
  2466. usb_calc_bus_time (urb->dev->speed,
  2467. is_input, 0, max_packet (maxp)));
  2468. qh->period = urb->interval;
  2469. if (qh->period > fusbh200->periodic_size) {
  2470. qh->period = fusbh200->periodic_size;
  2471. urb->interval = qh->period;
  2472. }
  2473. }
  2474. }
  2475. /* support for tt scheduling, and access to toggles */
  2476. qh->dev = urb->dev;
  2477. /* using TT? */
  2478. switch (urb->dev->speed) {
  2479. case USB_SPEED_LOW:
  2480. info1 |= QH_LOW_SPEED;
  2481. /* FALL THROUGH */
  2482. case USB_SPEED_FULL:
  2483. /* EPS 0 means "full" */
  2484. if (type != PIPE_INTERRUPT)
  2485. info1 |= (FUSBH200_TUNE_RL_TT << 28);
  2486. if (type == PIPE_CONTROL) {
  2487. info1 |= QH_CONTROL_EP; /* for TT */
  2488. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  2489. }
  2490. info1 |= maxp << 16;
  2491. info2 |= (FUSBH200_TUNE_MULT_TT << 30);
  2492. /* Some Freescale processors have an erratum in which the
  2493. * port number in the queue head was 0..N-1 instead of 1..N.
  2494. */
  2495. if (fusbh200_has_fsl_portno_bug(fusbh200))
  2496. info2 |= (urb->dev->ttport-1) << 23;
  2497. else
  2498. info2 |= urb->dev->ttport << 23;
  2499. /* set the address of the TT; for TDI's integrated
  2500. * root hub tt, leave it zeroed.
  2501. */
  2502. if (tt && tt->hub != fusbh200_to_hcd(fusbh200)->self.root_hub)
  2503. info2 |= tt->hub->devnum << 16;
  2504. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  2505. break;
  2506. case USB_SPEED_HIGH: /* no TT involved */
  2507. info1 |= QH_HIGH_SPEED;
  2508. if (type == PIPE_CONTROL) {
  2509. info1 |= (FUSBH200_TUNE_RL_HS << 28);
  2510. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  2511. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  2512. info2 |= (FUSBH200_TUNE_MULT_HS << 30);
  2513. } else if (type == PIPE_BULK) {
  2514. info1 |= (FUSBH200_TUNE_RL_HS << 28);
  2515. /* The USB spec says that high speed bulk endpoints
  2516. * always use 512 byte maxpacket. But some device
  2517. * vendors decided to ignore that, and MSFT is happy
  2518. * to help them do so. So now people expect to use
  2519. * such nonconformant devices with Linux too; sigh.
  2520. */
  2521. info1 |= max_packet(maxp) << 16;
  2522. info2 |= (FUSBH200_TUNE_MULT_HS << 30);
  2523. } else { /* PIPE_INTERRUPT */
  2524. info1 |= max_packet (maxp) << 16;
  2525. info2 |= hb_mult (maxp) << 30;
  2526. }
  2527. break;
  2528. default:
  2529. fusbh200_dbg(fusbh200, "bogus dev %p speed %d\n", urb->dev,
  2530. urb->dev->speed);
  2531. done:
  2532. qh_destroy(fusbh200, qh);
  2533. return NULL;
  2534. }
  2535. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  2536. /* init as live, toggle clear, advance to dummy */
  2537. qh->qh_state = QH_STATE_IDLE;
  2538. hw = qh->hw;
  2539. hw->hw_info1 = cpu_to_hc32(fusbh200, info1);
  2540. hw->hw_info2 = cpu_to_hc32(fusbh200, info2);
  2541. qh->is_out = !is_input;
  2542. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  2543. qh_refresh (fusbh200, qh);
  2544. return qh;
  2545. }
  2546. /*-------------------------------------------------------------------------*/
  2547. static void enable_async(struct fusbh200_hcd *fusbh200)
  2548. {
  2549. if (fusbh200->async_count++)
  2550. return;
  2551. /* Stop waiting to turn off the async schedule */
  2552. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_ASYNC);
  2553. /* Don't start the schedule until ASS is 0 */
  2554. fusbh200_poll_ASS(fusbh200);
  2555. turn_on_io_watchdog(fusbh200);
  2556. }
  2557. static void disable_async(struct fusbh200_hcd *fusbh200)
  2558. {
  2559. if (--fusbh200->async_count)
  2560. return;
  2561. /* The async schedule and async_unlink list are supposed to be empty */
  2562. WARN_ON(fusbh200->async->qh_next.qh || fusbh200->async_unlink);
  2563. /* Don't turn off the schedule until ASS is 1 */
  2564. fusbh200_poll_ASS(fusbh200);
  2565. }
  2566. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  2567. static void qh_link_async (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2568. {
  2569. __hc32 dma = QH_NEXT(fusbh200, qh->qh_dma);
  2570. struct fusbh200_qh *head;
  2571. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  2572. if (unlikely(qh->clearing_tt))
  2573. return;
  2574. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  2575. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  2576. qh_refresh(fusbh200, qh);
  2577. /* splice right after start */
  2578. head = fusbh200->async;
  2579. qh->qh_next = head->qh_next;
  2580. qh->hw->hw_next = head->hw->hw_next;
  2581. wmb ();
  2582. head->qh_next.qh = qh;
  2583. head->hw->hw_next = dma;
  2584. qh->xacterrs = 0;
  2585. qh->qh_state = QH_STATE_LINKED;
  2586. /* qtd completions reported later by interrupt */
  2587. enable_async(fusbh200);
  2588. }
  2589. /*-------------------------------------------------------------------------*/
  2590. /*
  2591. * For control/bulk/interrupt, return QH with these TDs appended.
  2592. * Allocates and initializes the QH if necessary.
  2593. * Returns null if it can't allocate a QH it needs to.
  2594. * If the QH has TDs (urbs) already, that's great.
  2595. */
  2596. static struct fusbh200_qh *qh_append_tds (
  2597. struct fusbh200_hcd *fusbh200,
  2598. struct urb *urb,
  2599. struct list_head *qtd_list,
  2600. int epnum,
  2601. void **ptr
  2602. )
  2603. {
  2604. struct fusbh200_qh *qh = NULL;
  2605. __hc32 qh_addr_mask = cpu_to_hc32(fusbh200, 0x7f);
  2606. qh = (struct fusbh200_qh *) *ptr;
  2607. if (unlikely (qh == NULL)) {
  2608. /* can't sleep here, we have fusbh200->lock... */
  2609. qh = qh_make (fusbh200, urb, GFP_ATOMIC);
  2610. *ptr = qh;
  2611. }
  2612. if (likely (qh != NULL)) {
  2613. struct fusbh200_qtd *qtd;
  2614. if (unlikely (list_empty (qtd_list)))
  2615. qtd = NULL;
  2616. else
  2617. qtd = list_entry (qtd_list->next, struct fusbh200_qtd,
  2618. qtd_list);
  2619. /* control qh may need patching ... */
  2620. if (unlikely (epnum == 0)) {
  2621. /* usb_reset_device() briefly reverts to address 0 */
  2622. if (usb_pipedevice (urb->pipe) == 0)
  2623. qh->hw->hw_info1 &= ~qh_addr_mask;
  2624. }
  2625. /* just one way to queue requests: swap with the dummy qtd.
  2626. * only hc or qh_refresh() ever modify the overlay.
  2627. */
  2628. if (likely (qtd != NULL)) {
  2629. struct fusbh200_qtd *dummy;
  2630. dma_addr_t dma;
  2631. __hc32 token;
  2632. /* to avoid racing the HC, use the dummy td instead of
  2633. * the first td of our list (becomes new dummy). both
  2634. * tds stay deactivated until we're done, when the
  2635. * HC is allowed to fetch the old dummy (4.10.2).
  2636. */
  2637. token = qtd->hw_token;
  2638. qtd->hw_token = HALT_BIT(fusbh200);
  2639. dummy = qh->dummy;
  2640. dma = dummy->qtd_dma;
  2641. *dummy = *qtd;
  2642. dummy->qtd_dma = dma;
  2643. list_del (&qtd->qtd_list);
  2644. list_add (&dummy->qtd_list, qtd_list);
  2645. list_splice_tail(qtd_list, &qh->qtd_list);
  2646. fusbh200_qtd_init(fusbh200, qtd, qtd->qtd_dma);
  2647. qh->dummy = qtd;
  2648. /* hc must see the new dummy at list end */
  2649. dma = qtd->qtd_dma;
  2650. qtd = list_entry (qh->qtd_list.prev,
  2651. struct fusbh200_qtd, qtd_list);
  2652. qtd->hw_next = QTD_NEXT(fusbh200, dma);
  2653. /* let the hc process these next qtds */
  2654. wmb ();
  2655. dummy->hw_token = token;
  2656. urb->hcpriv = qh;
  2657. }
  2658. }
  2659. return qh;
  2660. }
  2661. /*-------------------------------------------------------------------------*/
  2662. static int
  2663. submit_async (
  2664. struct fusbh200_hcd *fusbh200,
  2665. struct urb *urb,
  2666. struct list_head *qtd_list,
  2667. gfp_t mem_flags
  2668. ) {
  2669. int epnum;
  2670. unsigned long flags;
  2671. struct fusbh200_qh *qh = NULL;
  2672. int rc;
  2673. epnum = urb->ep->desc.bEndpointAddress;
  2674. #ifdef FUSBH200_URB_TRACE
  2675. {
  2676. struct fusbh200_qtd *qtd;
  2677. qtd = list_entry(qtd_list->next, struct fusbh200_qtd, qtd_list);
  2678. fusbh200_dbg(fusbh200,
  2679. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  2680. __func__, urb->dev->devpath, urb,
  2681. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  2682. urb->transfer_buffer_length,
  2683. qtd, urb->ep->hcpriv);
  2684. }
  2685. #endif
  2686. spin_lock_irqsave (&fusbh200->lock, flags);
  2687. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  2688. rc = -ESHUTDOWN;
  2689. goto done;
  2690. }
  2691. rc = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  2692. if (unlikely(rc))
  2693. goto done;
  2694. qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
  2695. if (unlikely(qh == NULL)) {
  2696. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  2697. rc = -ENOMEM;
  2698. goto done;
  2699. }
  2700. /* Control/bulk operations through TTs don't need scheduling,
  2701. * the HC and TT handle it when the TT has a buffer ready.
  2702. */
  2703. if (likely (qh->qh_state == QH_STATE_IDLE))
  2704. qh_link_async(fusbh200, qh);
  2705. done:
  2706. spin_unlock_irqrestore (&fusbh200->lock, flags);
  2707. if (unlikely (qh == NULL))
  2708. qtd_list_free (fusbh200, urb, qtd_list);
  2709. return rc;
  2710. }
  2711. /*-------------------------------------------------------------------------*/
  2712. static void single_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2713. {
  2714. struct fusbh200_qh *prev;
  2715. /* Add to the end of the list of QHs waiting for the next IAAD */
  2716. qh->qh_state = QH_STATE_UNLINK;
  2717. if (fusbh200->async_unlink)
  2718. fusbh200->async_unlink_last->unlink_next = qh;
  2719. else
  2720. fusbh200->async_unlink = qh;
  2721. fusbh200->async_unlink_last = qh;
  2722. /* Unlink it from the schedule */
  2723. prev = fusbh200->async;
  2724. while (prev->qh_next.qh != qh)
  2725. prev = prev->qh_next.qh;
  2726. prev->hw->hw_next = qh->hw->hw_next;
  2727. prev->qh_next = qh->qh_next;
  2728. if (fusbh200->qh_scan_next == qh)
  2729. fusbh200->qh_scan_next = qh->qh_next.qh;
  2730. }
  2731. static void start_iaa_cycle(struct fusbh200_hcd *fusbh200, bool nested)
  2732. {
  2733. /*
  2734. * Do nothing if an IAA cycle is already running or
  2735. * if one will be started shortly.
  2736. */
  2737. if (fusbh200->async_iaa || fusbh200->async_unlinking)
  2738. return;
  2739. /* Do all the waiting QHs at once */
  2740. fusbh200->async_iaa = fusbh200->async_unlink;
  2741. fusbh200->async_unlink = NULL;
  2742. /* If the controller isn't running, we don't have to wait for it */
  2743. if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING)) {
  2744. if (!nested) /* Avoid recursion */
  2745. end_unlink_async(fusbh200);
  2746. /* Otherwise start a new IAA cycle */
  2747. } else if (likely(fusbh200->rh_state == FUSBH200_RH_RUNNING)) {
  2748. /* Make sure the unlinks are all visible to the hardware */
  2749. wmb();
  2750. fusbh200_writel(fusbh200, fusbh200->command | CMD_IAAD,
  2751. &fusbh200->regs->command);
  2752. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  2753. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IAA_WATCHDOG, true);
  2754. }
  2755. }
  2756. /* the async qh for the qtds being unlinked are now gone from the HC */
  2757. static void end_unlink_async(struct fusbh200_hcd *fusbh200)
  2758. {
  2759. struct fusbh200_qh *qh;
  2760. /* Process the idle QHs */
  2761. restart:
  2762. fusbh200->async_unlinking = true;
  2763. while (fusbh200->async_iaa) {
  2764. qh = fusbh200->async_iaa;
  2765. fusbh200->async_iaa = qh->unlink_next;
  2766. qh->unlink_next = NULL;
  2767. qh->qh_state = QH_STATE_IDLE;
  2768. qh->qh_next.qh = NULL;
  2769. qh_completions(fusbh200, qh);
  2770. if (!list_empty(&qh->qtd_list) &&
  2771. fusbh200->rh_state == FUSBH200_RH_RUNNING)
  2772. qh_link_async(fusbh200, qh);
  2773. disable_async(fusbh200);
  2774. }
  2775. fusbh200->async_unlinking = false;
  2776. /* Start a new IAA cycle if any QHs are waiting for it */
  2777. if (fusbh200->async_unlink) {
  2778. start_iaa_cycle(fusbh200, true);
  2779. if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING))
  2780. goto restart;
  2781. }
  2782. }
  2783. static void unlink_empty_async(struct fusbh200_hcd *fusbh200)
  2784. {
  2785. struct fusbh200_qh *qh, *next;
  2786. bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
  2787. bool check_unlinks_later = false;
  2788. /* Unlink all the async QHs that have been empty for a timer cycle */
  2789. next = fusbh200->async->qh_next.qh;
  2790. while (next) {
  2791. qh = next;
  2792. next = qh->qh_next.qh;
  2793. if (list_empty(&qh->qtd_list) &&
  2794. qh->qh_state == QH_STATE_LINKED) {
  2795. if (!stopped && qh->unlink_cycle ==
  2796. fusbh200->async_unlink_cycle)
  2797. check_unlinks_later = true;
  2798. else
  2799. single_unlink_async(fusbh200, qh);
  2800. }
  2801. }
  2802. /* Start a new IAA cycle if any QHs are waiting for it */
  2803. if (fusbh200->async_unlink)
  2804. start_iaa_cycle(fusbh200, false);
  2805. /* QHs that haven't been empty for long enough will be handled later */
  2806. if (check_unlinks_later) {
  2807. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
  2808. ++fusbh200->async_unlink_cycle;
  2809. }
  2810. }
  2811. /* makes sure the async qh will become idle */
  2812. /* caller must own fusbh200->lock */
  2813. static void start_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2814. {
  2815. /*
  2816. * If the QH isn't linked then there's nothing we can do
  2817. * unless we were called during a giveback, in which case
  2818. * qh_completions() has to deal with it.
  2819. */
  2820. if (qh->qh_state != QH_STATE_LINKED) {
  2821. if (qh->qh_state == QH_STATE_COMPLETING)
  2822. qh->needs_rescan = 1;
  2823. return;
  2824. }
  2825. single_unlink_async(fusbh200, qh);
  2826. start_iaa_cycle(fusbh200, false);
  2827. }
  2828. /*-------------------------------------------------------------------------*/
  2829. static void scan_async (struct fusbh200_hcd *fusbh200)
  2830. {
  2831. struct fusbh200_qh *qh;
  2832. bool check_unlinks_later = false;
  2833. fusbh200->qh_scan_next = fusbh200->async->qh_next.qh;
  2834. while (fusbh200->qh_scan_next) {
  2835. qh = fusbh200->qh_scan_next;
  2836. fusbh200->qh_scan_next = qh->qh_next.qh;
  2837. rescan:
  2838. /* clean any finished work for this qh */
  2839. if (!list_empty(&qh->qtd_list)) {
  2840. int temp;
  2841. /*
  2842. * Unlinks could happen here; completion reporting
  2843. * drops the lock. That's why fusbh200->qh_scan_next
  2844. * always holds the next qh to scan; if the next qh
  2845. * gets unlinked then fusbh200->qh_scan_next is adjusted
  2846. * in single_unlink_async().
  2847. */
  2848. temp = qh_completions(fusbh200, qh);
  2849. if (qh->needs_rescan) {
  2850. start_unlink_async(fusbh200, qh);
  2851. } else if (list_empty(&qh->qtd_list)
  2852. && qh->qh_state == QH_STATE_LINKED) {
  2853. qh->unlink_cycle = fusbh200->async_unlink_cycle;
  2854. check_unlinks_later = true;
  2855. } else if (temp != 0)
  2856. goto rescan;
  2857. }
  2858. }
  2859. /*
  2860. * Unlink empty entries, reducing DMA usage as well
  2861. * as HCD schedule-scanning costs. Delay for any qh
  2862. * we just scanned, there's a not-unusual case that it
  2863. * doesn't stay idle for long.
  2864. */
  2865. if (check_unlinks_later && fusbh200->rh_state == FUSBH200_RH_RUNNING &&
  2866. !(fusbh200->enabled_hrtimer_events &
  2867. BIT(FUSBH200_HRTIMER_ASYNC_UNLINKS))) {
  2868. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
  2869. ++fusbh200->async_unlink_cycle;
  2870. }
  2871. }
  2872. /*-------------------------------------------------------------------------*/
  2873. /*
  2874. * EHCI scheduled transaction support: interrupt, iso, split iso
  2875. * These are called "periodic" transactions in the EHCI spec.
  2876. *
  2877. * Note that for interrupt transfers, the QH/QTD manipulation is shared
  2878. * with the "asynchronous" transaction support (control/bulk transfers).
  2879. * The only real difference is in how interrupt transfers are scheduled.
  2880. *
  2881. * For ISO, we make an "iso_stream" head to serve the same role as a QH.
  2882. * It keeps track of every ITD (or SITD) that's linked, and holds enough
  2883. * pre-calculated schedule data to make appending to the queue be quick.
  2884. */
  2885. static int fusbh200_get_frame (struct usb_hcd *hcd);
  2886. /*-------------------------------------------------------------------------*/
  2887. /*
  2888. * periodic_next_shadow - return "next" pointer on shadow list
  2889. * @periodic: host pointer to qh/itd
  2890. * @tag: hardware tag for type of this record
  2891. */
  2892. static union fusbh200_shadow *
  2893. periodic_next_shadow(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
  2894. __hc32 tag)
  2895. {
  2896. switch (hc32_to_cpu(fusbh200, tag)) {
  2897. case Q_TYPE_QH:
  2898. return &periodic->qh->qh_next;
  2899. case Q_TYPE_FSTN:
  2900. return &periodic->fstn->fstn_next;
  2901. default:
  2902. return &periodic->itd->itd_next;
  2903. }
  2904. }
  2905. static __hc32 *
  2906. shadow_next_periodic(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
  2907. __hc32 tag)
  2908. {
  2909. switch (hc32_to_cpu(fusbh200, tag)) {
  2910. /* our fusbh200_shadow.qh is actually software part */
  2911. case Q_TYPE_QH:
  2912. return &periodic->qh->hw->hw_next;
  2913. /* others are hw parts */
  2914. default:
  2915. return periodic->hw_next;
  2916. }
  2917. }
  2918. /* caller must hold fusbh200->lock */
  2919. static void periodic_unlink (struct fusbh200_hcd *fusbh200, unsigned frame, void *ptr)
  2920. {
  2921. union fusbh200_shadow *prev_p = &fusbh200->pshadow[frame];
  2922. __hc32 *hw_p = &fusbh200->periodic[frame];
  2923. union fusbh200_shadow here = *prev_p;
  2924. /* find predecessor of "ptr"; hw and shadow lists are in sync */
  2925. while (here.ptr && here.ptr != ptr) {
  2926. prev_p = periodic_next_shadow(fusbh200, prev_p,
  2927. Q_NEXT_TYPE(fusbh200, *hw_p));
  2928. hw_p = shadow_next_periodic(fusbh200, &here,
  2929. Q_NEXT_TYPE(fusbh200, *hw_p));
  2930. here = *prev_p;
  2931. }
  2932. /* an interrupt entry (at list end) could have been shared */
  2933. if (!here.ptr)
  2934. return;
  2935. /* update shadow and hardware lists ... the old "next" pointers
  2936. * from ptr may still be in use, the caller updates them.
  2937. */
  2938. *prev_p = *periodic_next_shadow(fusbh200, &here,
  2939. Q_NEXT_TYPE(fusbh200, *hw_p));
  2940. *hw_p = *shadow_next_periodic(fusbh200, &here,
  2941. Q_NEXT_TYPE(fusbh200, *hw_p));
  2942. }
  2943. /* how many of the uframe's 125 usecs are allocated? */
  2944. static unsigned short
  2945. periodic_usecs (struct fusbh200_hcd *fusbh200, unsigned frame, unsigned uframe)
  2946. {
  2947. __hc32 *hw_p = &fusbh200->periodic [frame];
  2948. union fusbh200_shadow *q = &fusbh200->pshadow [frame];
  2949. unsigned usecs = 0;
  2950. struct fusbh200_qh_hw *hw;
  2951. while (q->ptr) {
  2952. switch (hc32_to_cpu(fusbh200, Q_NEXT_TYPE(fusbh200, *hw_p))) {
  2953. case Q_TYPE_QH:
  2954. hw = q->qh->hw;
  2955. /* is it in the S-mask? */
  2956. if (hw->hw_info2 & cpu_to_hc32(fusbh200, 1 << uframe))
  2957. usecs += q->qh->usecs;
  2958. /* ... or C-mask? */
  2959. if (hw->hw_info2 & cpu_to_hc32(fusbh200,
  2960. 1 << (8 + uframe)))
  2961. usecs += q->qh->c_usecs;
  2962. hw_p = &hw->hw_next;
  2963. q = &q->qh->qh_next;
  2964. break;
  2965. // case Q_TYPE_FSTN:
  2966. default:
  2967. /* for "save place" FSTNs, count the relevant INTR
  2968. * bandwidth from the previous frame
  2969. */
  2970. if (q->fstn->hw_prev != FUSBH200_LIST_END(fusbh200)) {
  2971. fusbh200_dbg (fusbh200, "ignoring FSTN cost ...\n");
  2972. }
  2973. hw_p = &q->fstn->hw_next;
  2974. q = &q->fstn->fstn_next;
  2975. break;
  2976. case Q_TYPE_ITD:
  2977. if (q->itd->hw_transaction[uframe])
  2978. usecs += q->itd->stream->usecs;
  2979. hw_p = &q->itd->hw_next;
  2980. q = &q->itd->itd_next;
  2981. break;
  2982. }
  2983. }
  2984. if (usecs > fusbh200->uframe_periodic_max)
  2985. fusbh200_err (fusbh200, "uframe %d sched overrun: %d usecs\n",
  2986. frame * 8 + uframe, usecs);
  2987. return usecs;
  2988. }
  2989. /*-------------------------------------------------------------------------*/
  2990. static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
  2991. {
  2992. if (!dev1->tt || !dev2->tt)
  2993. return 0;
  2994. if (dev1->tt != dev2->tt)
  2995. return 0;
  2996. if (dev1->tt->multi)
  2997. return dev1->ttport == dev2->ttport;
  2998. else
  2999. return 1;
  3000. }
  3001. /* return true iff the device's transaction translator is available
  3002. * for a periodic transfer starting at the specified frame, using
  3003. * all the uframes in the mask.
  3004. */
  3005. static int tt_no_collision (
  3006. struct fusbh200_hcd *fusbh200,
  3007. unsigned period,
  3008. struct usb_device *dev,
  3009. unsigned frame,
  3010. u32 uf_mask
  3011. )
  3012. {
  3013. if (period == 0) /* error */
  3014. return 0;
  3015. /* note bandwidth wastage: split never follows csplit
  3016. * (different dev or endpoint) until the next uframe.
  3017. * calling convention doesn't make that distinction.
  3018. */
  3019. for (; frame < fusbh200->periodic_size; frame += period) {
  3020. union fusbh200_shadow here;
  3021. __hc32 type;
  3022. struct fusbh200_qh_hw *hw;
  3023. here = fusbh200->pshadow [frame];
  3024. type = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [frame]);
  3025. while (here.ptr) {
  3026. switch (hc32_to_cpu(fusbh200, type)) {
  3027. case Q_TYPE_ITD:
  3028. type = Q_NEXT_TYPE(fusbh200, here.itd->hw_next);
  3029. here = here.itd->itd_next;
  3030. continue;
  3031. case Q_TYPE_QH:
  3032. hw = here.qh->hw;
  3033. if (same_tt (dev, here.qh->dev)) {
  3034. u32 mask;
  3035. mask = hc32_to_cpu(fusbh200,
  3036. hw->hw_info2);
  3037. /* "knows" no gap is needed */
  3038. mask |= mask >> 8;
  3039. if (mask & uf_mask)
  3040. break;
  3041. }
  3042. type = Q_NEXT_TYPE(fusbh200, hw->hw_next);
  3043. here = here.qh->qh_next;
  3044. continue;
  3045. // case Q_TYPE_FSTN:
  3046. default:
  3047. fusbh200_dbg (fusbh200,
  3048. "periodic frame %d bogus type %d\n",
  3049. frame, type);
  3050. }
  3051. /* collision or error */
  3052. return 0;
  3053. }
  3054. }
  3055. /* no collision */
  3056. return 1;
  3057. }
  3058. /*-------------------------------------------------------------------------*/
  3059. static void enable_periodic(struct fusbh200_hcd *fusbh200)
  3060. {
  3061. if (fusbh200->periodic_count++)
  3062. return;
  3063. /* Stop waiting to turn off the periodic schedule */
  3064. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_PERIODIC);
  3065. /* Don't start the schedule until PSS is 0 */
  3066. fusbh200_poll_PSS(fusbh200);
  3067. turn_on_io_watchdog(fusbh200);
  3068. }
  3069. static void disable_periodic(struct fusbh200_hcd *fusbh200)
  3070. {
  3071. if (--fusbh200->periodic_count)
  3072. return;
  3073. /* Don't turn off the schedule until PSS is 1 */
  3074. fusbh200_poll_PSS(fusbh200);
  3075. }
  3076. /*-------------------------------------------------------------------------*/
  3077. /* periodic schedule slots have iso tds (normal or split) first, then a
  3078. * sparse tree for active interrupt transfers.
  3079. *
  3080. * this just links in a qh; caller guarantees uframe masks are set right.
  3081. * no FSTN support (yet; fusbh200 0.96+)
  3082. */
  3083. static void qh_link_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3084. {
  3085. unsigned i;
  3086. unsigned period = qh->period;
  3087. dev_dbg (&qh->dev->dev,
  3088. "link qh%d-%04x/%p start %d [%d/%d us]\n",
  3089. period, hc32_to_cpup(fusbh200, &qh->hw->hw_info2)
  3090. & (QH_CMASK | QH_SMASK),
  3091. qh, qh->start, qh->usecs, qh->c_usecs);
  3092. /* high bandwidth, or otherwise every microframe */
  3093. if (period == 0)
  3094. period = 1;
  3095. for (i = qh->start; i < fusbh200->periodic_size; i += period) {
  3096. union fusbh200_shadow *prev = &fusbh200->pshadow[i];
  3097. __hc32 *hw_p = &fusbh200->periodic[i];
  3098. union fusbh200_shadow here = *prev;
  3099. __hc32 type = 0;
  3100. /* skip the iso nodes at list head */
  3101. while (here.ptr) {
  3102. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  3103. if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
  3104. break;
  3105. prev = periodic_next_shadow(fusbh200, prev, type);
  3106. hw_p = shadow_next_periodic(fusbh200, &here, type);
  3107. here = *prev;
  3108. }
  3109. /* sorting each branch by period (slow-->fast)
  3110. * enables sharing interior tree nodes
  3111. */
  3112. while (here.ptr && qh != here.qh) {
  3113. if (qh->period > here.qh->period)
  3114. break;
  3115. prev = &here.qh->qh_next;
  3116. hw_p = &here.qh->hw->hw_next;
  3117. here = *prev;
  3118. }
  3119. /* link in this qh, unless some earlier pass did that */
  3120. if (qh != here.qh) {
  3121. qh->qh_next = here;
  3122. if (here.qh)
  3123. qh->hw->hw_next = *hw_p;
  3124. wmb ();
  3125. prev->qh = qh;
  3126. *hw_p = QH_NEXT (fusbh200, qh->qh_dma);
  3127. }
  3128. }
  3129. qh->qh_state = QH_STATE_LINKED;
  3130. qh->xacterrs = 0;
  3131. /* update per-qh bandwidth for usbfs */
  3132. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated += qh->period
  3133. ? ((qh->usecs + qh->c_usecs) / qh->period)
  3134. : (qh->usecs * 8);
  3135. list_add(&qh->intr_node, &fusbh200->intr_qh_list);
  3136. /* maybe enable periodic schedule processing */
  3137. ++fusbh200->intr_count;
  3138. enable_periodic(fusbh200);
  3139. }
  3140. static void qh_unlink_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3141. {
  3142. unsigned i;
  3143. unsigned period;
  3144. /*
  3145. * If qh is for a low/full-speed device, simply unlinking it
  3146. * could interfere with an ongoing split transaction. To unlink
  3147. * it safely would require setting the QH_INACTIVATE bit and
  3148. * waiting at least one frame, as described in EHCI 4.12.2.5.
  3149. *
  3150. * We won't bother with any of this. Instead, we assume that the
  3151. * only reason for unlinking an interrupt QH while the current URB
  3152. * is still active is to dequeue all the URBs (flush the whole
  3153. * endpoint queue).
  3154. *
  3155. * If rebalancing the periodic schedule is ever implemented, this
  3156. * approach will no longer be valid.
  3157. */
  3158. /* high bandwidth, or otherwise part of every microframe */
  3159. if ((period = qh->period) == 0)
  3160. period = 1;
  3161. for (i = qh->start; i < fusbh200->periodic_size; i += period)
  3162. periodic_unlink (fusbh200, i, qh);
  3163. /* update per-qh bandwidth for usbfs */
  3164. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated -= qh->period
  3165. ? ((qh->usecs + qh->c_usecs) / qh->period)
  3166. : (qh->usecs * 8);
  3167. dev_dbg (&qh->dev->dev,
  3168. "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
  3169. qh->period,
  3170. hc32_to_cpup(fusbh200, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
  3171. qh, qh->start, qh->usecs, qh->c_usecs);
  3172. /* qh->qh_next still "live" to HC */
  3173. qh->qh_state = QH_STATE_UNLINK;
  3174. qh->qh_next.ptr = NULL;
  3175. if (fusbh200->qh_scan_next == qh)
  3176. fusbh200->qh_scan_next = list_entry(qh->intr_node.next,
  3177. struct fusbh200_qh, intr_node);
  3178. list_del(&qh->intr_node);
  3179. }
  3180. static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3181. {
  3182. /* If the QH isn't linked then there's nothing we can do
  3183. * unless we were called during a giveback, in which case
  3184. * qh_completions() has to deal with it.
  3185. */
  3186. if (qh->qh_state != QH_STATE_LINKED) {
  3187. if (qh->qh_state == QH_STATE_COMPLETING)
  3188. qh->needs_rescan = 1;
  3189. return;
  3190. }
  3191. qh_unlink_periodic (fusbh200, qh);
  3192. /* Make sure the unlinks are visible before starting the timer */
  3193. wmb();
  3194. /*
  3195. * The EHCI spec doesn't say how long it takes the controller to
  3196. * stop accessing an unlinked interrupt QH. The timer delay is
  3197. * 9 uframes; presumably that will be long enough.
  3198. */
  3199. qh->unlink_cycle = fusbh200->intr_unlink_cycle;
  3200. /* New entries go at the end of the intr_unlink list */
  3201. if (fusbh200->intr_unlink)
  3202. fusbh200->intr_unlink_last->unlink_next = qh;
  3203. else
  3204. fusbh200->intr_unlink = qh;
  3205. fusbh200->intr_unlink_last = qh;
  3206. if (fusbh200->intr_unlinking)
  3207. ; /* Avoid recursive calls */
  3208. else if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  3209. fusbh200_handle_intr_unlinks(fusbh200);
  3210. else if (fusbh200->intr_unlink == qh) {
  3211. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
  3212. ++fusbh200->intr_unlink_cycle;
  3213. }
  3214. }
  3215. static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3216. {
  3217. struct fusbh200_qh_hw *hw = qh->hw;
  3218. int rc;
  3219. qh->qh_state = QH_STATE_IDLE;
  3220. hw->hw_next = FUSBH200_LIST_END(fusbh200);
  3221. qh_completions(fusbh200, qh);
  3222. /* reschedule QH iff another request is queued */
  3223. if (!list_empty(&qh->qtd_list) && fusbh200->rh_state == FUSBH200_RH_RUNNING) {
  3224. rc = qh_schedule(fusbh200, qh);
  3225. /* An error here likely indicates handshake failure
  3226. * or no space left in the schedule. Neither fault
  3227. * should happen often ...
  3228. *
  3229. * FIXME kill the now-dysfunctional queued urbs
  3230. */
  3231. if (rc != 0)
  3232. fusbh200_err(fusbh200, "can't reschedule qh %p, err %d\n",
  3233. qh, rc);
  3234. }
  3235. /* maybe turn off periodic schedule */
  3236. --fusbh200->intr_count;
  3237. disable_periodic(fusbh200);
  3238. }
  3239. /*-------------------------------------------------------------------------*/
  3240. static int check_period (
  3241. struct fusbh200_hcd *fusbh200,
  3242. unsigned frame,
  3243. unsigned uframe,
  3244. unsigned period,
  3245. unsigned usecs
  3246. ) {
  3247. int claimed;
  3248. /* complete split running into next frame?
  3249. * given FSTN support, we could sometimes check...
  3250. */
  3251. if (uframe >= 8)
  3252. return 0;
  3253. /* convert "usecs we need" to "max already claimed" */
  3254. usecs = fusbh200->uframe_periodic_max - usecs;
  3255. /* we "know" 2 and 4 uframe intervals were rejected; so
  3256. * for period 0, check _every_ microframe in the schedule.
  3257. */
  3258. if (unlikely (period == 0)) {
  3259. do {
  3260. for (uframe = 0; uframe < 7; uframe++) {
  3261. claimed = periodic_usecs (fusbh200, frame, uframe);
  3262. if (claimed > usecs)
  3263. return 0;
  3264. }
  3265. } while ((frame += 1) < fusbh200->periodic_size);
  3266. /* just check the specified uframe, at that period */
  3267. } else {
  3268. do {
  3269. claimed = periodic_usecs (fusbh200, frame, uframe);
  3270. if (claimed > usecs)
  3271. return 0;
  3272. } while ((frame += period) < fusbh200->periodic_size);
  3273. }
  3274. // success!
  3275. return 1;
  3276. }
  3277. static int check_intr_schedule (
  3278. struct fusbh200_hcd *fusbh200,
  3279. unsigned frame,
  3280. unsigned uframe,
  3281. const struct fusbh200_qh *qh,
  3282. __hc32 *c_maskp
  3283. )
  3284. {
  3285. int retval = -ENOSPC;
  3286. u8 mask = 0;
  3287. if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
  3288. goto done;
  3289. if (!check_period (fusbh200, frame, uframe, qh->period, qh->usecs))
  3290. goto done;
  3291. if (!qh->c_usecs) {
  3292. retval = 0;
  3293. *c_maskp = 0;
  3294. goto done;
  3295. }
  3296. /* Make sure this tt's buffer is also available for CSPLITs.
  3297. * We pessimize a bit; probably the typical full speed case
  3298. * doesn't need the second CSPLIT.
  3299. *
  3300. * NOTE: both SPLIT and CSPLIT could be checked in just
  3301. * one smart pass...
  3302. */
  3303. mask = 0x03 << (uframe + qh->gap_uf);
  3304. *c_maskp = cpu_to_hc32(fusbh200, mask << 8);
  3305. mask |= 1 << uframe;
  3306. if (tt_no_collision (fusbh200, qh->period, qh->dev, frame, mask)) {
  3307. if (!check_period (fusbh200, frame, uframe + qh->gap_uf + 1,
  3308. qh->period, qh->c_usecs))
  3309. goto done;
  3310. if (!check_period (fusbh200, frame, uframe + qh->gap_uf,
  3311. qh->period, qh->c_usecs))
  3312. goto done;
  3313. retval = 0;
  3314. }
  3315. done:
  3316. return retval;
  3317. }
  3318. /* "first fit" scheduling policy used the first time through,
  3319. * or when the previous schedule slot can't be re-used.
  3320. */
  3321. static int qh_schedule(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3322. {
  3323. int status;
  3324. unsigned uframe;
  3325. __hc32 c_mask;
  3326. unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
  3327. struct fusbh200_qh_hw *hw = qh->hw;
  3328. qh_refresh(fusbh200, qh);
  3329. hw->hw_next = FUSBH200_LIST_END(fusbh200);
  3330. frame = qh->start;
  3331. /* reuse the previous schedule slots, if we can */
  3332. if (frame < qh->period) {
  3333. uframe = ffs(hc32_to_cpup(fusbh200, &hw->hw_info2) & QH_SMASK);
  3334. status = check_intr_schedule (fusbh200, frame, --uframe,
  3335. qh, &c_mask);
  3336. } else {
  3337. uframe = 0;
  3338. c_mask = 0;
  3339. status = -ENOSPC;
  3340. }
  3341. /* else scan the schedule to find a group of slots such that all
  3342. * uframes have enough periodic bandwidth available.
  3343. */
  3344. if (status) {
  3345. /* "normal" case, uframing flexible except with splits */
  3346. if (qh->period) {
  3347. int i;
  3348. for (i = qh->period; status && i > 0; --i) {
  3349. frame = ++fusbh200->random_frame % qh->period;
  3350. for (uframe = 0; uframe < 8; uframe++) {
  3351. status = check_intr_schedule (fusbh200,
  3352. frame, uframe, qh,
  3353. &c_mask);
  3354. if (status == 0)
  3355. break;
  3356. }
  3357. }
  3358. /* qh->period == 0 means every uframe */
  3359. } else {
  3360. frame = 0;
  3361. status = check_intr_schedule (fusbh200, 0, 0, qh, &c_mask);
  3362. }
  3363. if (status)
  3364. goto done;
  3365. qh->start = frame;
  3366. /* reset S-frame and (maybe) C-frame masks */
  3367. hw->hw_info2 &= cpu_to_hc32(fusbh200, ~(QH_CMASK | QH_SMASK));
  3368. hw->hw_info2 |= qh->period
  3369. ? cpu_to_hc32(fusbh200, 1 << uframe)
  3370. : cpu_to_hc32(fusbh200, QH_SMASK);
  3371. hw->hw_info2 |= c_mask;
  3372. } else
  3373. fusbh200_dbg (fusbh200, "reused qh %p schedule\n", qh);
  3374. /* stuff into the periodic schedule */
  3375. qh_link_periodic(fusbh200, qh);
  3376. done:
  3377. return status;
  3378. }
  3379. static int intr_submit (
  3380. struct fusbh200_hcd *fusbh200,
  3381. struct urb *urb,
  3382. struct list_head *qtd_list,
  3383. gfp_t mem_flags
  3384. ) {
  3385. unsigned epnum;
  3386. unsigned long flags;
  3387. struct fusbh200_qh *qh;
  3388. int status;
  3389. struct list_head empty;
  3390. /* get endpoint and transfer/schedule data */
  3391. epnum = urb->ep->desc.bEndpointAddress;
  3392. spin_lock_irqsave (&fusbh200->lock, flags);
  3393. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  3394. status = -ESHUTDOWN;
  3395. goto done_not_linked;
  3396. }
  3397. status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  3398. if (unlikely(status))
  3399. goto done_not_linked;
  3400. /* get qh and force any scheduling errors */
  3401. INIT_LIST_HEAD (&empty);
  3402. qh = qh_append_tds(fusbh200, urb, &empty, epnum, &urb->ep->hcpriv);
  3403. if (qh == NULL) {
  3404. status = -ENOMEM;
  3405. goto done;
  3406. }
  3407. if (qh->qh_state == QH_STATE_IDLE) {
  3408. if ((status = qh_schedule (fusbh200, qh)) != 0)
  3409. goto done;
  3410. }
  3411. /* then queue the urb's tds to the qh */
  3412. qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
  3413. BUG_ON (qh == NULL);
  3414. /* ... update usbfs periodic stats */
  3415. fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs++;
  3416. done:
  3417. if (unlikely(status))
  3418. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  3419. done_not_linked:
  3420. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3421. if (status)
  3422. qtd_list_free (fusbh200, urb, qtd_list);
  3423. return status;
  3424. }
  3425. static void scan_intr(struct fusbh200_hcd *fusbh200)
  3426. {
  3427. struct fusbh200_qh *qh;
  3428. list_for_each_entry_safe(qh, fusbh200->qh_scan_next, &fusbh200->intr_qh_list,
  3429. intr_node) {
  3430. rescan:
  3431. /* clean any finished work for this qh */
  3432. if (!list_empty(&qh->qtd_list)) {
  3433. int temp;
  3434. /*
  3435. * Unlinks could happen here; completion reporting
  3436. * drops the lock. That's why fusbh200->qh_scan_next
  3437. * always holds the next qh to scan; if the next qh
  3438. * gets unlinked then fusbh200->qh_scan_next is adjusted
  3439. * in qh_unlink_periodic().
  3440. */
  3441. temp = qh_completions(fusbh200, qh);
  3442. if (unlikely(qh->needs_rescan ||
  3443. (list_empty(&qh->qtd_list) &&
  3444. qh->qh_state == QH_STATE_LINKED)))
  3445. start_unlink_intr(fusbh200, qh);
  3446. else if (temp != 0)
  3447. goto rescan;
  3448. }
  3449. }
  3450. }
  3451. /*-------------------------------------------------------------------------*/
  3452. /* fusbh200_iso_stream ops work with both ITD and SITD */
  3453. static struct fusbh200_iso_stream *
  3454. iso_stream_alloc (gfp_t mem_flags)
  3455. {
  3456. struct fusbh200_iso_stream *stream;
  3457. stream = kzalloc(sizeof *stream, mem_flags);
  3458. if (likely (stream != NULL)) {
  3459. INIT_LIST_HEAD(&stream->td_list);
  3460. INIT_LIST_HEAD(&stream->free_list);
  3461. stream->next_uframe = -1;
  3462. }
  3463. return stream;
  3464. }
  3465. static void
  3466. iso_stream_init (
  3467. struct fusbh200_hcd *fusbh200,
  3468. struct fusbh200_iso_stream *stream,
  3469. struct usb_device *dev,
  3470. int pipe,
  3471. unsigned interval
  3472. )
  3473. {
  3474. u32 buf1;
  3475. unsigned epnum, maxp;
  3476. int is_input;
  3477. long bandwidth;
  3478. unsigned multi;
  3479. /*
  3480. * this might be a "high bandwidth" highspeed endpoint,
  3481. * as encoded in the ep descriptor's wMaxPacket field
  3482. */
  3483. epnum = usb_pipeendpoint (pipe);
  3484. is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
  3485. maxp = usb_maxpacket(dev, pipe, !is_input);
  3486. if (is_input) {
  3487. buf1 = (1 << 11);
  3488. } else {
  3489. buf1 = 0;
  3490. }
  3491. maxp = max_packet(maxp);
  3492. multi = hb_mult(maxp);
  3493. buf1 |= maxp;
  3494. maxp *= multi;
  3495. stream->buf0 = cpu_to_hc32(fusbh200, (epnum << 8) | dev->devnum);
  3496. stream->buf1 = cpu_to_hc32(fusbh200, buf1);
  3497. stream->buf2 = cpu_to_hc32(fusbh200, multi);
  3498. /* usbfs wants to report the average usecs per frame tied up
  3499. * when transfers on this endpoint are scheduled ...
  3500. */
  3501. if (dev->speed == USB_SPEED_FULL) {
  3502. interval <<= 3;
  3503. stream->usecs = NS_TO_US(usb_calc_bus_time(dev->speed,
  3504. is_input, 1, maxp));
  3505. stream->usecs /= 8;
  3506. } else {
  3507. stream->highspeed = 1;
  3508. stream->usecs = HS_USECS_ISO (maxp);
  3509. }
  3510. bandwidth = stream->usecs * 8;
  3511. bandwidth /= interval;
  3512. stream->bandwidth = bandwidth;
  3513. stream->udev = dev;
  3514. stream->bEndpointAddress = is_input | epnum;
  3515. stream->interval = interval;
  3516. stream->maxp = maxp;
  3517. }
  3518. static struct fusbh200_iso_stream *
  3519. iso_stream_find (struct fusbh200_hcd *fusbh200, struct urb *urb)
  3520. {
  3521. unsigned epnum;
  3522. struct fusbh200_iso_stream *stream;
  3523. struct usb_host_endpoint *ep;
  3524. unsigned long flags;
  3525. epnum = usb_pipeendpoint (urb->pipe);
  3526. if (usb_pipein(urb->pipe))
  3527. ep = urb->dev->ep_in[epnum];
  3528. else
  3529. ep = urb->dev->ep_out[epnum];
  3530. spin_lock_irqsave (&fusbh200->lock, flags);
  3531. stream = ep->hcpriv;
  3532. if (unlikely (stream == NULL)) {
  3533. stream = iso_stream_alloc(GFP_ATOMIC);
  3534. if (likely (stream != NULL)) {
  3535. ep->hcpriv = stream;
  3536. stream->ep = ep;
  3537. iso_stream_init(fusbh200, stream, urb->dev, urb->pipe,
  3538. urb->interval);
  3539. }
  3540. /* if dev->ep [epnum] is a QH, hw is set */
  3541. } else if (unlikely (stream->hw != NULL)) {
  3542. fusbh200_dbg (fusbh200, "dev %s ep%d%s, not iso??\n",
  3543. urb->dev->devpath, epnum,
  3544. usb_pipein(urb->pipe) ? "in" : "out");
  3545. stream = NULL;
  3546. }
  3547. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3548. return stream;
  3549. }
  3550. /*-------------------------------------------------------------------------*/
  3551. /* fusbh200_iso_sched ops can be ITD-only or SITD-only */
  3552. static struct fusbh200_iso_sched *
  3553. iso_sched_alloc (unsigned packets, gfp_t mem_flags)
  3554. {
  3555. struct fusbh200_iso_sched *iso_sched;
  3556. int size = sizeof *iso_sched;
  3557. size += packets * sizeof (struct fusbh200_iso_packet);
  3558. iso_sched = kzalloc(size, mem_flags);
  3559. if (likely (iso_sched != NULL)) {
  3560. INIT_LIST_HEAD (&iso_sched->td_list);
  3561. }
  3562. return iso_sched;
  3563. }
  3564. static inline void
  3565. itd_sched_init(
  3566. struct fusbh200_hcd *fusbh200,
  3567. struct fusbh200_iso_sched *iso_sched,
  3568. struct fusbh200_iso_stream *stream,
  3569. struct urb *urb
  3570. )
  3571. {
  3572. unsigned i;
  3573. dma_addr_t dma = urb->transfer_dma;
  3574. /* how many uframes are needed for these transfers */
  3575. iso_sched->span = urb->number_of_packets * stream->interval;
  3576. /* figure out per-uframe itd fields that we'll need later
  3577. * when we fit new itds into the schedule.
  3578. */
  3579. for (i = 0; i < urb->number_of_packets; i++) {
  3580. struct fusbh200_iso_packet *uframe = &iso_sched->packet [i];
  3581. unsigned length;
  3582. dma_addr_t buf;
  3583. u32 trans;
  3584. length = urb->iso_frame_desc [i].length;
  3585. buf = dma + urb->iso_frame_desc [i].offset;
  3586. trans = FUSBH200_ISOC_ACTIVE;
  3587. trans |= buf & 0x0fff;
  3588. if (unlikely (((i + 1) == urb->number_of_packets))
  3589. && !(urb->transfer_flags & URB_NO_INTERRUPT))
  3590. trans |= FUSBH200_ITD_IOC;
  3591. trans |= length << 16;
  3592. uframe->transaction = cpu_to_hc32(fusbh200, trans);
  3593. /* might need to cross a buffer page within a uframe */
  3594. uframe->bufp = (buf & ~(u64)0x0fff);
  3595. buf += length;
  3596. if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
  3597. uframe->cross = 1;
  3598. }
  3599. }
  3600. static void
  3601. iso_sched_free (
  3602. struct fusbh200_iso_stream *stream,
  3603. struct fusbh200_iso_sched *iso_sched
  3604. )
  3605. {
  3606. if (!iso_sched)
  3607. return;
  3608. // caller must hold fusbh200->lock!
  3609. list_splice (&iso_sched->td_list, &stream->free_list);
  3610. kfree (iso_sched);
  3611. }
  3612. static int
  3613. itd_urb_transaction (
  3614. struct fusbh200_iso_stream *stream,
  3615. struct fusbh200_hcd *fusbh200,
  3616. struct urb *urb,
  3617. gfp_t mem_flags
  3618. )
  3619. {
  3620. struct fusbh200_itd *itd;
  3621. dma_addr_t itd_dma;
  3622. int i;
  3623. unsigned num_itds;
  3624. struct fusbh200_iso_sched *sched;
  3625. unsigned long flags;
  3626. sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
  3627. if (unlikely (sched == NULL))
  3628. return -ENOMEM;
  3629. itd_sched_init(fusbh200, sched, stream, urb);
  3630. if (urb->interval < 8)
  3631. num_itds = 1 + (sched->span + 7) / 8;
  3632. else
  3633. num_itds = urb->number_of_packets;
  3634. /* allocate/init ITDs */
  3635. spin_lock_irqsave (&fusbh200->lock, flags);
  3636. for (i = 0; i < num_itds; i++) {
  3637. /*
  3638. * Use iTDs from the free list, but not iTDs that may
  3639. * still be in use by the hardware.
  3640. */
  3641. if (likely(!list_empty(&stream->free_list))) {
  3642. itd = list_first_entry(&stream->free_list,
  3643. struct fusbh200_itd, itd_list);
  3644. if (itd->frame == fusbh200->now_frame)
  3645. goto alloc_itd;
  3646. list_del (&itd->itd_list);
  3647. itd_dma = itd->itd_dma;
  3648. } else {
  3649. alloc_itd:
  3650. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3651. itd = dma_pool_alloc (fusbh200->itd_pool, mem_flags,
  3652. &itd_dma);
  3653. spin_lock_irqsave (&fusbh200->lock, flags);
  3654. if (!itd) {
  3655. iso_sched_free(stream, sched);
  3656. spin_unlock_irqrestore(&fusbh200->lock, flags);
  3657. return -ENOMEM;
  3658. }
  3659. }
  3660. memset (itd, 0, sizeof *itd);
  3661. itd->itd_dma = itd_dma;
  3662. list_add (&itd->itd_list, &sched->td_list);
  3663. }
  3664. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3665. /* temporarily store schedule info in hcpriv */
  3666. urb->hcpriv = sched;
  3667. urb->error_count = 0;
  3668. return 0;
  3669. }
  3670. /*-------------------------------------------------------------------------*/
  3671. static inline int
  3672. itd_slot_ok (
  3673. struct fusbh200_hcd *fusbh200,
  3674. u32 mod,
  3675. u32 uframe,
  3676. u8 usecs,
  3677. u32 period
  3678. )
  3679. {
  3680. uframe %= period;
  3681. do {
  3682. /* can't commit more than uframe_periodic_max usec */
  3683. if (periodic_usecs (fusbh200, uframe >> 3, uframe & 0x7)
  3684. > (fusbh200->uframe_periodic_max - usecs))
  3685. return 0;
  3686. /* we know urb->interval is 2^N uframes */
  3687. uframe += period;
  3688. } while (uframe < mod);
  3689. return 1;
  3690. }
  3691. /*
  3692. * This scheduler plans almost as far into the future as it has actual
  3693. * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
  3694. * "as small as possible" to be cache-friendlier.) That limits the size
  3695. * transfers you can stream reliably; avoid more than 64 msec per urb.
  3696. * Also avoid queue depths of less than fusbh200's worst irq latency (affected
  3697. * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
  3698. * and other factors); or more than about 230 msec total (for portability,
  3699. * given FUSBH200_TUNE_FLS and the slop). Or, write a smarter scheduler!
  3700. */
  3701. #define SCHEDULE_SLOP 80 /* microframes */
  3702. static int
  3703. iso_stream_schedule (
  3704. struct fusbh200_hcd *fusbh200,
  3705. struct urb *urb,
  3706. struct fusbh200_iso_stream *stream
  3707. )
  3708. {
  3709. u32 now, next, start, period, span;
  3710. int status;
  3711. unsigned mod = fusbh200->periodic_size << 3;
  3712. struct fusbh200_iso_sched *sched = urb->hcpriv;
  3713. period = urb->interval;
  3714. span = sched->span;
  3715. if (span > mod - SCHEDULE_SLOP) {
  3716. fusbh200_dbg (fusbh200, "iso request %p too long\n", urb);
  3717. status = -EFBIG;
  3718. goto fail;
  3719. }
  3720. now = fusbh200_read_frame_index(fusbh200) & (mod - 1);
  3721. /* Typical case: reuse current schedule, stream is still active.
  3722. * Hopefully there are no gaps from the host falling behind
  3723. * (irq delays etc), but if there are we'll take the next
  3724. * slot in the schedule, implicitly assuming URB_ISO_ASAP.
  3725. */
  3726. if (likely (!list_empty (&stream->td_list))) {
  3727. u32 excess;
  3728. /* For high speed devices, allow scheduling within the
  3729. * isochronous scheduling threshold. For full speed devices
  3730. * and Intel PCI-based controllers, don't (work around for
  3731. * Intel ICH9 bug).
  3732. */
  3733. if (!stream->highspeed && fusbh200->fs_i_thresh)
  3734. next = now + fusbh200->i_thresh;
  3735. else
  3736. next = now;
  3737. /* Fell behind (by up to twice the slop amount)?
  3738. * We decide based on the time of the last currently-scheduled
  3739. * slot, not the time of the next available slot.
  3740. */
  3741. excess = (stream->next_uframe - period - next) & (mod - 1);
  3742. if (excess >= mod - 2 * SCHEDULE_SLOP)
  3743. start = next + excess - mod + period *
  3744. DIV_ROUND_UP(mod - excess, period);
  3745. else
  3746. start = next + excess + period;
  3747. if (start - now >= mod) {
  3748. fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
  3749. urb, start - now - period, period,
  3750. mod);
  3751. status = -EFBIG;
  3752. goto fail;
  3753. }
  3754. }
  3755. /* need to schedule; when's the next (u)frame we could start?
  3756. * this is bigger than fusbh200->i_thresh allows; scheduling itself
  3757. * isn't free, the slop should handle reasonably slow cpus. it
  3758. * can also help high bandwidth if the dma and irq loads don't
  3759. * jump until after the queue is primed.
  3760. */
  3761. else {
  3762. int done = 0;
  3763. start = SCHEDULE_SLOP + (now & ~0x07);
  3764. /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
  3765. /* find a uframe slot with enough bandwidth.
  3766. * Early uframes are more precious because full-speed
  3767. * iso IN transfers can't use late uframes,
  3768. * and therefore they should be allocated last.
  3769. */
  3770. next = start;
  3771. start += period;
  3772. do {
  3773. start--;
  3774. /* check schedule: enough space? */
  3775. if (itd_slot_ok(fusbh200, mod, start,
  3776. stream->usecs, period))
  3777. done = 1;
  3778. } while (start > next && !done);
  3779. /* no room in the schedule */
  3780. if (!done) {
  3781. fusbh200_dbg(fusbh200, "iso resched full %p (now %d max %d)\n",
  3782. urb, now, now + mod);
  3783. status = -ENOSPC;
  3784. goto fail;
  3785. }
  3786. }
  3787. /* Tried to schedule too far into the future? */
  3788. if (unlikely(start - now + span - period
  3789. >= mod - 2 * SCHEDULE_SLOP)) {
  3790. fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
  3791. urb, start - now, span - period,
  3792. mod - 2 * SCHEDULE_SLOP);
  3793. status = -EFBIG;
  3794. goto fail;
  3795. }
  3796. stream->next_uframe = start & (mod - 1);
  3797. /* report high speed start in uframes; full speed, in frames */
  3798. urb->start_frame = stream->next_uframe;
  3799. if (!stream->highspeed)
  3800. urb->start_frame >>= 3;
  3801. /* Make sure scan_isoc() sees these */
  3802. if (fusbh200->isoc_count == 0)
  3803. fusbh200->next_frame = now >> 3;
  3804. return 0;
  3805. fail:
  3806. iso_sched_free(stream, sched);
  3807. urb->hcpriv = NULL;
  3808. return status;
  3809. }
  3810. /*-------------------------------------------------------------------------*/
  3811. static inline void
  3812. itd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_iso_stream *stream,
  3813. struct fusbh200_itd *itd)
  3814. {
  3815. int i;
  3816. /* it's been recently zeroed */
  3817. itd->hw_next = FUSBH200_LIST_END(fusbh200);
  3818. itd->hw_bufp [0] = stream->buf0;
  3819. itd->hw_bufp [1] = stream->buf1;
  3820. itd->hw_bufp [2] = stream->buf2;
  3821. for (i = 0; i < 8; i++)
  3822. itd->index[i] = -1;
  3823. /* All other fields are filled when scheduling */
  3824. }
  3825. static inline void
  3826. itd_patch(
  3827. struct fusbh200_hcd *fusbh200,
  3828. struct fusbh200_itd *itd,
  3829. struct fusbh200_iso_sched *iso_sched,
  3830. unsigned index,
  3831. u16 uframe
  3832. )
  3833. {
  3834. struct fusbh200_iso_packet *uf = &iso_sched->packet [index];
  3835. unsigned pg = itd->pg;
  3836. // BUG_ON (pg == 6 && uf->cross);
  3837. uframe &= 0x07;
  3838. itd->index [uframe] = index;
  3839. itd->hw_transaction[uframe] = uf->transaction;
  3840. itd->hw_transaction[uframe] |= cpu_to_hc32(fusbh200, pg << 12);
  3841. itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, uf->bufp & ~(u32)0);
  3842. itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(uf->bufp >> 32));
  3843. /* iso_frame_desc[].offset must be strictly increasing */
  3844. if (unlikely (uf->cross)) {
  3845. u64 bufp = uf->bufp + 4096;
  3846. itd->pg = ++pg;
  3847. itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, bufp & ~(u32)0);
  3848. itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(bufp >> 32));
  3849. }
  3850. }
  3851. static inline void
  3852. itd_link (struct fusbh200_hcd *fusbh200, unsigned frame, struct fusbh200_itd *itd)
  3853. {
  3854. union fusbh200_shadow *prev = &fusbh200->pshadow[frame];
  3855. __hc32 *hw_p = &fusbh200->periodic[frame];
  3856. union fusbh200_shadow here = *prev;
  3857. __hc32 type = 0;
  3858. /* skip any iso nodes which might belong to previous microframes */
  3859. while (here.ptr) {
  3860. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  3861. if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
  3862. break;
  3863. prev = periodic_next_shadow(fusbh200, prev, type);
  3864. hw_p = shadow_next_periodic(fusbh200, &here, type);
  3865. here = *prev;
  3866. }
  3867. itd->itd_next = here;
  3868. itd->hw_next = *hw_p;
  3869. prev->itd = itd;
  3870. itd->frame = frame;
  3871. wmb ();
  3872. *hw_p = cpu_to_hc32(fusbh200, itd->itd_dma | Q_TYPE_ITD);
  3873. }
  3874. /* fit urb's itds into the selected schedule slot; activate as needed */
  3875. static void itd_link_urb(
  3876. struct fusbh200_hcd *fusbh200,
  3877. struct urb *urb,
  3878. unsigned mod,
  3879. struct fusbh200_iso_stream *stream
  3880. )
  3881. {
  3882. int packet;
  3883. unsigned next_uframe, uframe, frame;
  3884. struct fusbh200_iso_sched *iso_sched = urb->hcpriv;
  3885. struct fusbh200_itd *itd;
  3886. next_uframe = stream->next_uframe & (mod - 1);
  3887. if (unlikely (list_empty(&stream->td_list))) {
  3888. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
  3889. += stream->bandwidth;
  3890. fusbh200_dbg(fusbh200,
  3891. "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
  3892. urb->dev->devpath, stream->bEndpointAddress & 0x0f,
  3893. (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
  3894. urb->interval,
  3895. next_uframe >> 3, next_uframe & 0x7);
  3896. }
  3897. /* fill iTDs uframe by uframe */
  3898. for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
  3899. if (itd == NULL) {
  3900. /* ASSERT: we have all necessary itds */
  3901. // BUG_ON (list_empty (&iso_sched->td_list));
  3902. /* ASSERT: no itds for this endpoint in this uframe */
  3903. itd = list_entry (iso_sched->td_list.next,
  3904. struct fusbh200_itd, itd_list);
  3905. list_move_tail (&itd->itd_list, &stream->td_list);
  3906. itd->stream = stream;
  3907. itd->urb = urb;
  3908. itd_init (fusbh200, stream, itd);
  3909. }
  3910. uframe = next_uframe & 0x07;
  3911. frame = next_uframe >> 3;
  3912. itd_patch(fusbh200, itd, iso_sched, packet, uframe);
  3913. next_uframe += stream->interval;
  3914. next_uframe &= mod - 1;
  3915. packet++;
  3916. /* link completed itds into the schedule */
  3917. if (((next_uframe >> 3) != frame)
  3918. || packet == urb->number_of_packets) {
  3919. itd_link(fusbh200, frame & (fusbh200->periodic_size - 1), itd);
  3920. itd = NULL;
  3921. }
  3922. }
  3923. stream->next_uframe = next_uframe;
  3924. /* don't need that schedule data any more */
  3925. iso_sched_free (stream, iso_sched);
  3926. urb->hcpriv = NULL;
  3927. ++fusbh200->isoc_count;
  3928. enable_periodic(fusbh200);
  3929. }
  3930. #define ISO_ERRS (FUSBH200_ISOC_BUF_ERR | FUSBH200_ISOC_BABBLE | FUSBH200_ISOC_XACTERR)
  3931. /* Process and recycle a completed ITD. Return true iff its urb completed,
  3932. * and hence its completion callback probably added things to the hardware
  3933. * schedule.
  3934. *
  3935. * Note that we carefully avoid recycling this descriptor until after any
  3936. * completion callback runs, so that it won't be reused quickly. That is,
  3937. * assuming (a) no more than two urbs per frame on this endpoint, and also
  3938. * (b) only this endpoint's completions submit URBs. It seems some silicon
  3939. * corrupts things if you reuse completed descriptors very quickly...
  3940. */
  3941. static bool itd_complete(struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
  3942. {
  3943. struct urb *urb = itd->urb;
  3944. struct usb_iso_packet_descriptor *desc;
  3945. u32 t;
  3946. unsigned uframe;
  3947. int urb_index = -1;
  3948. struct fusbh200_iso_stream *stream = itd->stream;
  3949. struct usb_device *dev;
  3950. bool retval = false;
  3951. /* for each uframe with a packet */
  3952. for (uframe = 0; uframe < 8; uframe++) {
  3953. if (likely (itd->index[uframe] == -1))
  3954. continue;
  3955. urb_index = itd->index[uframe];
  3956. desc = &urb->iso_frame_desc [urb_index];
  3957. t = hc32_to_cpup(fusbh200, &itd->hw_transaction [uframe]);
  3958. itd->hw_transaction [uframe] = 0;
  3959. /* report transfer status */
  3960. if (unlikely (t & ISO_ERRS)) {
  3961. urb->error_count++;
  3962. if (t & FUSBH200_ISOC_BUF_ERR)
  3963. desc->status = usb_pipein (urb->pipe)
  3964. ? -ENOSR /* hc couldn't read */
  3965. : -ECOMM; /* hc couldn't write */
  3966. else if (t & FUSBH200_ISOC_BABBLE)
  3967. desc->status = -EOVERFLOW;
  3968. else /* (t & FUSBH200_ISOC_XACTERR) */
  3969. desc->status = -EPROTO;
  3970. /* HC need not update length with this error */
  3971. if (!(t & FUSBH200_ISOC_BABBLE)) {
  3972. desc->actual_length = fusbh200_itdlen(urb, desc, t);
  3973. urb->actual_length += desc->actual_length;
  3974. }
  3975. } else if (likely ((t & FUSBH200_ISOC_ACTIVE) == 0)) {
  3976. desc->status = 0;
  3977. desc->actual_length = fusbh200_itdlen(urb, desc, t);
  3978. urb->actual_length += desc->actual_length;
  3979. } else {
  3980. /* URB was too late */
  3981. desc->status = -EXDEV;
  3982. }
  3983. }
  3984. /* handle completion now? */
  3985. if (likely ((urb_index + 1) != urb->number_of_packets))
  3986. goto done;
  3987. /* ASSERT: it's really the last itd for this urb
  3988. list_for_each_entry (itd, &stream->td_list, itd_list)
  3989. BUG_ON (itd->urb == urb);
  3990. */
  3991. /* give urb back to the driver; completion often (re)submits */
  3992. dev = urb->dev;
  3993. fusbh200_urb_done(fusbh200, urb, 0);
  3994. retval = true;
  3995. urb = NULL;
  3996. --fusbh200->isoc_count;
  3997. disable_periodic(fusbh200);
  3998. if (unlikely(list_is_singular(&stream->td_list))) {
  3999. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
  4000. -= stream->bandwidth;
  4001. fusbh200_dbg(fusbh200,
  4002. "deschedule devp %s ep%d%s-iso\n",
  4003. dev->devpath, stream->bEndpointAddress & 0x0f,
  4004. (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
  4005. }
  4006. done:
  4007. itd->urb = NULL;
  4008. /* Add to the end of the free list for later reuse */
  4009. list_move_tail(&itd->itd_list, &stream->free_list);
  4010. /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
  4011. if (list_empty(&stream->td_list)) {
  4012. list_splice_tail_init(&stream->free_list,
  4013. &fusbh200->cached_itd_list);
  4014. start_free_itds(fusbh200);
  4015. }
  4016. return retval;
  4017. }
  4018. /*-------------------------------------------------------------------------*/
  4019. static int itd_submit (struct fusbh200_hcd *fusbh200, struct urb *urb,
  4020. gfp_t mem_flags)
  4021. {
  4022. int status = -EINVAL;
  4023. unsigned long flags;
  4024. struct fusbh200_iso_stream *stream;
  4025. /* Get iso_stream head */
  4026. stream = iso_stream_find (fusbh200, urb);
  4027. if (unlikely (stream == NULL)) {
  4028. fusbh200_dbg (fusbh200, "can't get iso stream\n");
  4029. return -ENOMEM;
  4030. }
  4031. if (unlikely (urb->interval != stream->interval &&
  4032. fusbh200_port_speed(fusbh200, 0) == USB_PORT_STAT_HIGH_SPEED)) {
  4033. fusbh200_dbg (fusbh200, "can't change iso interval %d --> %d\n",
  4034. stream->interval, urb->interval);
  4035. goto done;
  4036. }
  4037. #ifdef FUSBH200_URB_TRACE
  4038. fusbh200_dbg (fusbh200,
  4039. "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
  4040. __func__, urb->dev->devpath, urb,
  4041. usb_pipeendpoint (urb->pipe),
  4042. usb_pipein (urb->pipe) ? "in" : "out",
  4043. urb->transfer_buffer_length,
  4044. urb->number_of_packets, urb->interval,
  4045. stream);
  4046. #endif
  4047. /* allocate ITDs w/o locking anything */
  4048. status = itd_urb_transaction (stream, fusbh200, urb, mem_flags);
  4049. if (unlikely (status < 0)) {
  4050. fusbh200_dbg (fusbh200, "can't init itds\n");
  4051. goto done;
  4052. }
  4053. /* schedule ... need to lock */
  4054. spin_lock_irqsave (&fusbh200->lock, flags);
  4055. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  4056. status = -ESHUTDOWN;
  4057. goto done_not_linked;
  4058. }
  4059. status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  4060. if (unlikely(status))
  4061. goto done_not_linked;
  4062. status = iso_stream_schedule(fusbh200, urb, stream);
  4063. if (likely (status == 0))
  4064. itd_link_urb (fusbh200, urb, fusbh200->periodic_size << 3, stream);
  4065. else
  4066. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  4067. done_not_linked:
  4068. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4069. done:
  4070. return status;
  4071. }
  4072. /*-------------------------------------------------------------------------*/
  4073. static void scan_isoc(struct fusbh200_hcd *fusbh200)
  4074. {
  4075. unsigned uf, now_frame, frame;
  4076. unsigned fmask = fusbh200->periodic_size - 1;
  4077. bool modified, live;
  4078. /*
  4079. * When running, scan from last scan point up to "now"
  4080. * else clean up by scanning everything that's left.
  4081. * Touches as few pages as possible: cache-friendly.
  4082. */
  4083. if (fusbh200->rh_state >= FUSBH200_RH_RUNNING) {
  4084. uf = fusbh200_read_frame_index(fusbh200);
  4085. now_frame = (uf >> 3) & fmask;
  4086. live = true;
  4087. } else {
  4088. now_frame = (fusbh200->next_frame - 1) & fmask;
  4089. live = false;
  4090. }
  4091. fusbh200->now_frame = now_frame;
  4092. frame = fusbh200->next_frame;
  4093. for (;;) {
  4094. union fusbh200_shadow q, *q_p;
  4095. __hc32 type, *hw_p;
  4096. restart:
  4097. /* scan each element in frame's queue for completions */
  4098. q_p = &fusbh200->pshadow [frame];
  4099. hw_p = &fusbh200->periodic [frame];
  4100. q.ptr = q_p->ptr;
  4101. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  4102. modified = false;
  4103. while (q.ptr != NULL) {
  4104. switch (hc32_to_cpu(fusbh200, type)) {
  4105. case Q_TYPE_ITD:
  4106. /* If this ITD is still active, leave it for
  4107. * later processing ... check the next entry.
  4108. * No need to check for activity unless the
  4109. * frame is current.
  4110. */
  4111. if (frame == now_frame && live) {
  4112. rmb();
  4113. for (uf = 0; uf < 8; uf++) {
  4114. if (q.itd->hw_transaction[uf] &
  4115. ITD_ACTIVE(fusbh200))
  4116. break;
  4117. }
  4118. if (uf < 8) {
  4119. q_p = &q.itd->itd_next;
  4120. hw_p = &q.itd->hw_next;
  4121. type = Q_NEXT_TYPE(fusbh200,
  4122. q.itd->hw_next);
  4123. q = *q_p;
  4124. break;
  4125. }
  4126. }
  4127. /* Take finished ITDs out of the schedule
  4128. * and process them: recycle, maybe report
  4129. * URB completion. HC won't cache the
  4130. * pointer for much longer, if at all.
  4131. */
  4132. *q_p = q.itd->itd_next;
  4133. *hw_p = q.itd->hw_next;
  4134. type = Q_NEXT_TYPE(fusbh200, q.itd->hw_next);
  4135. wmb();
  4136. modified = itd_complete (fusbh200, q.itd);
  4137. q = *q_p;
  4138. break;
  4139. default:
  4140. fusbh200_dbg(fusbh200, "corrupt type %d frame %d shadow %p\n",
  4141. type, frame, q.ptr);
  4142. // BUG ();
  4143. /* FALL THROUGH */
  4144. case Q_TYPE_QH:
  4145. case Q_TYPE_FSTN:
  4146. /* End of the iTDs and siTDs */
  4147. q.ptr = NULL;
  4148. break;
  4149. }
  4150. /* assume completion callbacks modify the queue */
  4151. if (unlikely(modified && fusbh200->isoc_count > 0))
  4152. goto restart;
  4153. }
  4154. /* Stop when we have reached the current frame */
  4155. if (frame == now_frame)
  4156. break;
  4157. frame = (frame + 1) & fmask;
  4158. }
  4159. fusbh200->next_frame = now_frame;
  4160. }
  4161. /*-------------------------------------------------------------------------*/
  4162. /*
  4163. * Display / Set uframe_periodic_max
  4164. */
  4165. static ssize_t show_uframe_periodic_max(struct device *dev,
  4166. struct device_attribute *attr,
  4167. char *buf)
  4168. {
  4169. struct fusbh200_hcd *fusbh200;
  4170. int n;
  4171. fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
  4172. n = scnprintf(buf, PAGE_SIZE, "%d\n", fusbh200->uframe_periodic_max);
  4173. return n;
  4174. }
  4175. static ssize_t store_uframe_periodic_max(struct device *dev,
  4176. struct device_attribute *attr,
  4177. const char *buf, size_t count)
  4178. {
  4179. struct fusbh200_hcd *fusbh200;
  4180. unsigned uframe_periodic_max;
  4181. unsigned frame, uframe;
  4182. unsigned short allocated_max;
  4183. unsigned long flags;
  4184. ssize_t ret;
  4185. fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
  4186. if (kstrtouint(buf, 0, &uframe_periodic_max) < 0)
  4187. return -EINVAL;
  4188. if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) {
  4189. fusbh200_info(fusbh200, "rejecting invalid request for "
  4190. "uframe_periodic_max=%u\n", uframe_periodic_max);
  4191. return -EINVAL;
  4192. }
  4193. ret = -EINVAL;
  4194. /*
  4195. * lock, so that our checking does not race with possible periodic
  4196. * bandwidth allocation through submitting new urbs.
  4197. */
  4198. spin_lock_irqsave (&fusbh200->lock, flags);
  4199. /*
  4200. * for request to decrease max periodic bandwidth, we have to check
  4201. * every microframe in the schedule to see whether the decrease is
  4202. * possible.
  4203. */
  4204. if (uframe_periodic_max < fusbh200->uframe_periodic_max) {
  4205. allocated_max = 0;
  4206. for (frame = 0; frame < fusbh200->periodic_size; ++frame)
  4207. for (uframe = 0; uframe < 7; ++uframe)
  4208. allocated_max = max(allocated_max,
  4209. periodic_usecs (fusbh200, frame, uframe));
  4210. if (allocated_max > uframe_periodic_max) {
  4211. fusbh200_info(fusbh200,
  4212. "cannot decrease uframe_periodic_max because "
  4213. "periodic bandwidth is already allocated "
  4214. "(%u > %u)\n",
  4215. allocated_max, uframe_periodic_max);
  4216. goto out_unlock;
  4217. }
  4218. }
  4219. /* increasing is always ok */
  4220. fusbh200_info(fusbh200, "setting max periodic bandwidth to %u%% "
  4221. "(== %u usec/uframe)\n",
  4222. 100*uframe_periodic_max/125, uframe_periodic_max);
  4223. if (uframe_periodic_max != 100)
  4224. fusbh200_warn(fusbh200, "max periodic bandwidth set is non-standard\n");
  4225. fusbh200->uframe_periodic_max = uframe_periodic_max;
  4226. ret = count;
  4227. out_unlock:
  4228. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4229. return ret;
  4230. }
  4231. static DEVICE_ATTR(uframe_periodic_max, 0644, show_uframe_periodic_max, store_uframe_periodic_max);
  4232. static inline int create_sysfs_files(struct fusbh200_hcd *fusbh200)
  4233. {
  4234. struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
  4235. int i = 0;
  4236. if (i)
  4237. goto out;
  4238. i = device_create_file(controller, &dev_attr_uframe_periodic_max);
  4239. out:
  4240. return i;
  4241. }
  4242. static inline void remove_sysfs_files(struct fusbh200_hcd *fusbh200)
  4243. {
  4244. struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
  4245. device_remove_file(controller, &dev_attr_uframe_periodic_max);
  4246. }
  4247. /*-------------------------------------------------------------------------*/
  4248. /* On some systems, leaving remote wakeup enabled prevents system shutdown.
  4249. * The firmware seems to think that powering off is a wakeup event!
  4250. * This routine turns off remote wakeup and everything else, on all ports.
  4251. */
  4252. static void fusbh200_turn_off_all_ports(struct fusbh200_hcd *fusbh200)
  4253. {
  4254. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  4255. fusbh200_writel(fusbh200, PORT_RWC_BITS, status_reg);
  4256. }
  4257. /*
  4258. * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
  4259. * Must be called with interrupts enabled and the lock not held.
  4260. */
  4261. static void fusbh200_silence_controller(struct fusbh200_hcd *fusbh200)
  4262. {
  4263. fusbh200_halt(fusbh200);
  4264. spin_lock_irq(&fusbh200->lock);
  4265. fusbh200->rh_state = FUSBH200_RH_HALTED;
  4266. fusbh200_turn_off_all_ports(fusbh200);
  4267. spin_unlock_irq(&fusbh200->lock);
  4268. }
  4269. /* fusbh200_shutdown kick in for silicon on any bus (not just pci, etc).
  4270. * This forcibly disables dma and IRQs, helping kexec and other cases
  4271. * where the next system software may expect clean state.
  4272. */
  4273. static void fusbh200_shutdown(struct usb_hcd *hcd)
  4274. {
  4275. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4276. spin_lock_irq(&fusbh200->lock);
  4277. fusbh200->shutdown = true;
  4278. fusbh200->rh_state = FUSBH200_RH_STOPPING;
  4279. fusbh200->enabled_hrtimer_events = 0;
  4280. spin_unlock_irq(&fusbh200->lock);
  4281. fusbh200_silence_controller(fusbh200);
  4282. hrtimer_cancel(&fusbh200->hrtimer);
  4283. }
  4284. /*-------------------------------------------------------------------------*/
  4285. /*
  4286. * fusbh200_work is called from some interrupts, timers, and so on.
  4287. * it calls driver completion functions, after dropping fusbh200->lock.
  4288. */
  4289. static void fusbh200_work (struct fusbh200_hcd *fusbh200)
  4290. {
  4291. /* another CPU may drop fusbh200->lock during a schedule scan while
  4292. * it reports urb completions. this flag guards against bogus
  4293. * attempts at re-entrant schedule scanning.
  4294. */
  4295. if (fusbh200->scanning) {
  4296. fusbh200->need_rescan = true;
  4297. return;
  4298. }
  4299. fusbh200->scanning = true;
  4300. rescan:
  4301. fusbh200->need_rescan = false;
  4302. if (fusbh200->async_count)
  4303. scan_async(fusbh200);
  4304. if (fusbh200->intr_count > 0)
  4305. scan_intr(fusbh200);
  4306. if (fusbh200->isoc_count > 0)
  4307. scan_isoc(fusbh200);
  4308. if (fusbh200->need_rescan)
  4309. goto rescan;
  4310. fusbh200->scanning = false;
  4311. /* the IO watchdog guards against hardware or driver bugs that
  4312. * misplace IRQs, and should let us run completely without IRQs.
  4313. * such lossage has been observed on both VT6202 and VT8235.
  4314. */
  4315. turn_on_io_watchdog(fusbh200);
  4316. }
  4317. /*
  4318. * Called when the fusbh200_hcd module is removed.
  4319. */
  4320. static void fusbh200_stop (struct usb_hcd *hcd)
  4321. {
  4322. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4323. fusbh200_dbg (fusbh200, "stop\n");
  4324. /* no more interrupts ... */
  4325. spin_lock_irq(&fusbh200->lock);
  4326. fusbh200->enabled_hrtimer_events = 0;
  4327. spin_unlock_irq(&fusbh200->lock);
  4328. fusbh200_quiesce(fusbh200);
  4329. fusbh200_silence_controller(fusbh200);
  4330. fusbh200_reset (fusbh200);
  4331. hrtimer_cancel(&fusbh200->hrtimer);
  4332. remove_sysfs_files(fusbh200);
  4333. remove_debug_files (fusbh200);
  4334. /* root hub is shut down separately (first, when possible) */
  4335. spin_lock_irq (&fusbh200->lock);
  4336. end_free_itds(fusbh200);
  4337. spin_unlock_irq (&fusbh200->lock);
  4338. fusbh200_mem_cleanup (fusbh200);
  4339. fusbh200_dbg(fusbh200, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  4340. fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
  4341. fusbh200->stats.lost_iaa);
  4342. fusbh200_dbg (fusbh200, "complete %ld unlink %ld\n",
  4343. fusbh200->stats.complete, fusbh200->stats.unlink);
  4344. dbg_status (fusbh200, "fusbh200_stop completed",
  4345. fusbh200_readl(fusbh200, &fusbh200->regs->status));
  4346. }
  4347. /* one-time init, only for memory state */
  4348. static int hcd_fusbh200_init(struct usb_hcd *hcd)
  4349. {
  4350. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4351. u32 temp;
  4352. int retval;
  4353. u32 hcc_params;
  4354. struct fusbh200_qh_hw *hw;
  4355. spin_lock_init(&fusbh200->lock);
  4356. /*
  4357. * keep io watchdog by default, those good HCDs could turn off it later
  4358. */
  4359. fusbh200->need_io_watchdog = 1;
  4360. hrtimer_init(&fusbh200->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  4361. fusbh200->hrtimer.function = fusbh200_hrtimer_func;
  4362. fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
  4363. hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  4364. /*
  4365. * by default set standard 80% (== 100 usec/uframe) max periodic
  4366. * bandwidth as required by USB 2.0
  4367. */
  4368. fusbh200->uframe_periodic_max = 100;
  4369. /*
  4370. * hw default: 1K periodic list heads, one per frame.
  4371. * periodic_size can shrink by USBCMD update if hcc_params allows.
  4372. */
  4373. fusbh200->periodic_size = DEFAULT_I_TDPS;
  4374. INIT_LIST_HEAD(&fusbh200->intr_qh_list);
  4375. INIT_LIST_HEAD(&fusbh200->cached_itd_list);
  4376. if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
  4377. /* periodic schedule size can be smaller than default */
  4378. switch (FUSBH200_TUNE_FLS) {
  4379. case 0: fusbh200->periodic_size = 1024; break;
  4380. case 1: fusbh200->periodic_size = 512; break;
  4381. case 2: fusbh200->periodic_size = 256; break;
  4382. default: BUG();
  4383. }
  4384. }
  4385. if ((retval = fusbh200_mem_init(fusbh200, GFP_KERNEL)) < 0)
  4386. return retval;
  4387. /* controllers may cache some of the periodic schedule ... */
  4388. fusbh200->i_thresh = 2;
  4389. /*
  4390. * dedicate a qh for the async ring head, since we couldn't unlink
  4391. * a 'real' qh without stopping the async schedule [4.8]. use it
  4392. * as the 'reclamation list head' too.
  4393. * its dummy is used in hw_alt_next of many tds, to prevent the qh
  4394. * from automatically advancing to the next td after short reads.
  4395. */
  4396. fusbh200->async->qh_next.qh = NULL;
  4397. hw = fusbh200->async->hw;
  4398. hw->hw_next = QH_NEXT(fusbh200, fusbh200->async->qh_dma);
  4399. hw->hw_info1 = cpu_to_hc32(fusbh200, QH_HEAD);
  4400. hw->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
  4401. hw->hw_qtd_next = FUSBH200_LIST_END(fusbh200);
  4402. fusbh200->async->qh_state = QH_STATE_LINKED;
  4403. hw->hw_alt_next = QTD_NEXT(fusbh200, fusbh200->async->dummy->qtd_dma);
  4404. /* clear interrupt enables, set irq latency */
  4405. if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
  4406. log2_irq_thresh = 0;
  4407. temp = 1 << (16 + log2_irq_thresh);
  4408. if (HCC_CANPARK(hcc_params)) {
  4409. /* HW default park == 3, on hardware that supports it (like
  4410. * NVidia and ALI silicon), maximizes throughput on the async
  4411. * schedule by avoiding QH fetches between transfers.
  4412. *
  4413. * With fast usb storage devices and NForce2, "park" seems to
  4414. * make problems: throughput reduction (!), data errors...
  4415. */
  4416. if (park) {
  4417. park = min(park, (unsigned) 3);
  4418. temp |= CMD_PARK;
  4419. temp |= park << 8;
  4420. }
  4421. fusbh200_dbg(fusbh200, "park %d\n", park);
  4422. }
  4423. if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
  4424. /* periodic schedule size can be smaller than default */
  4425. temp &= ~(3 << 2);
  4426. temp |= (FUSBH200_TUNE_FLS << 2);
  4427. }
  4428. fusbh200->command = temp;
  4429. /* Accept arbitrarily long scatter-gather lists */
  4430. if (!(hcd->driver->flags & HCD_LOCAL_MEM))
  4431. hcd->self.sg_tablesize = ~0;
  4432. return 0;
  4433. }
  4434. /* start HC running; it's halted, hcd_fusbh200_init() has been run (once) */
  4435. static int fusbh200_run (struct usb_hcd *hcd)
  4436. {
  4437. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4438. u32 temp;
  4439. u32 hcc_params;
  4440. hcd->uses_new_polling = 1;
  4441. /* EHCI spec section 4.1 */
  4442. fusbh200_writel(fusbh200, fusbh200->periodic_dma, &fusbh200->regs->frame_list);
  4443. fusbh200_writel(fusbh200, (u32)fusbh200->async->qh_dma, &fusbh200->regs->async_next);
  4444. /*
  4445. * hcc_params controls whether fusbh200->regs->segment must (!!!)
  4446. * be used; it constrains QH/ITD/SITD and QTD locations.
  4447. * pci_pool consistent memory always uses segment zero.
  4448. * streaming mappings for I/O buffers, like pci_map_single(),
  4449. * can return segments above 4GB, if the device allows.
  4450. *
  4451. * NOTE: the dma mask is visible through dma_supported(), so
  4452. * drivers can pass this info along ... like NETIF_F_HIGHDMA,
  4453. * Scsi_Host.highmem_io, and so forth. It's readonly to all
  4454. * host side drivers though.
  4455. */
  4456. hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  4457. // Philips, Intel, and maybe others need CMD_RUN before the
  4458. // root hub will detect new devices (why?); NEC doesn't
  4459. fusbh200->command &= ~(CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  4460. fusbh200->command |= CMD_RUN;
  4461. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  4462. dbg_cmd (fusbh200, "init", fusbh200->command);
  4463. /*
  4464. * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
  4465. * are explicitly handed to companion controller(s), so no TT is
  4466. * involved with the root hub. (Except where one is integrated,
  4467. * and there's no companion controller unless maybe for USB OTG.)
  4468. *
  4469. * Turning on the CF flag will transfer ownership of all ports
  4470. * from the companions to the EHCI controller. If any of the
  4471. * companions are in the middle of a port reset at the time, it
  4472. * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
  4473. * guarantees that no resets are in progress. After we set CF,
  4474. * a short delay lets the hardware catch up; new resets shouldn't
  4475. * be started before the port switching actions could complete.
  4476. */
  4477. down_write(&ehci_cf_port_reset_rwsem);
  4478. fusbh200->rh_state = FUSBH200_RH_RUNNING;
  4479. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
  4480. msleep(5);
  4481. up_write(&ehci_cf_port_reset_rwsem);
  4482. fusbh200->last_periodic_enable = ktime_get_real();
  4483. temp = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  4484. fusbh200_info (fusbh200,
  4485. "USB %x.%x started, EHCI %x.%02x\n",
  4486. ((fusbh200->sbrn & 0xf0)>>4), (fusbh200->sbrn & 0x0f),
  4487. temp >> 8, temp & 0xff);
  4488. fusbh200_writel(fusbh200, INTR_MASK,
  4489. &fusbh200->regs->intr_enable); /* Turn On Interrupts */
  4490. /* GRR this is run-once init(), being done every time the HC starts.
  4491. * So long as they're part of class devices, we can't do it init()
  4492. * since the class device isn't created that early.
  4493. */
  4494. create_debug_files(fusbh200);
  4495. create_sysfs_files(fusbh200);
  4496. return 0;
  4497. }
  4498. static int fusbh200_setup(struct usb_hcd *hcd)
  4499. {
  4500. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4501. int retval;
  4502. fusbh200->regs = (void __iomem *)fusbh200->caps +
  4503. HC_LENGTH(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  4504. dbg_hcs_params(fusbh200, "reset");
  4505. dbg_hcc_params(fusbh200, "reset");
  4506. /* cache this readonly data; minimize chip reads */
  4507. fusbh200->hcs_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  4508. fusbh200->sbrn = HCD_USB2;
  4509. /* data structure init */
  4510. retval = hcd_fusbh200_init(hcd);
  4511. if (retval)
  4512. return retval;
  4513. retval = fusbh200_halt(fusbh200);
  4514. if (retval)
  4515. return retval;
  4516. fusbh200_reset(fusbh200);
  4517. return 0;
  4518. }
  4519. /*-------------------------------------------------------------------------*/
  4520. static irqreturn_t fusbh200_irq (struct usb_hcd *hcd)
  4521. {
  4522. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4523. u32 status, masked_status, pcd_status = 0, cmd;
  4524. int bh;
  4525. spin_lock (&fusbh200->lock);
  4526. status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
  4527. /* e.g. cardbus physical eject */
  4528. if (status == ~(u32) 0) {
  4529. fusbh200_dbg (fusbh200, "device removed\n");
  4530. goto dead;
  4531. }
  4532. /*
  4533. * We don't use STS_FLR, but some controllers don't like it to
  4534. * remain on, so mask it out along with the other status bits.
  4535. */
  4536. masked_status = status & (INTR_MASK | STS_FLR);
  4537. /* Shared IRQ? */
  4538. if (!masked_status || unlikely(fusbh200->rh_state == FUSBH200_RH_HALTED)) {
  4539. spin_unlock(&fusbh200->lock);
  4540. return IRQ_NONE;
  4541. }
  4542. /* clear (just) interrupts */
  4543. fusbh200_writel(fusbh200, masked_status, &fusbh200->regs->status);
  4544. cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  4545. bh = 0;
  4546. /* normal [4.15.1.2] or error [4.15.1.1] completion */
  4547. if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
  4548. if (likely ((status & STS_ERR) == 0))
  4549. COUNT (fusbh200->stats.normal);
  4550. else
  4551. COUNT (fusbh200->stats.error);
  4552. bh = 1;
  4553. }
  4554. /* complete the unlinking of some qh [4.15.2.3] */
  4555. if (status & STS_IAA) {
  4556. /* Turn off the IAA watchdog */
  4557. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_IAA_WATCHDOG);
  4558. /*
  4559. * Mild optimization: Allow another IAAD to reset the
  4560. * hrtimer, if one occurs before the next expiration.
  4561. * In theory we could always cancel the hrtimer, but
  4562. * tests show that about half the time it will be reset
  4563. * for some other event anyway.
  4564. */
  4565. if (fusbh200->next_hrtimer_event == FUSBH200_HRTIMER_IAA_WATCHDOG)
  4566. ++fusbh200->next_hrtimer_event;
  4567. /* guard against (alleged) silicon errata */
  4568. if (cmd & CMD_IAAD)
  4569. fusbh200_dbg(fusbh200, "IAA with IAAD still set?\n");
  4570. if (fusbh200->async_iaa) {
  4571. COUNT(fusbh200->stats.iaa);
  4572. end_unlink_async(fusbh200);
  4573. } else
  4574. fusbh200_dbg(fusbh200, "IAA with nothing unlinked?\n");
  4575. }
  4576. /* remote wakeup [4.3.1] */
  4577. if (status & STS_PCD) {
  4578. int pstatus;
  4579. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  4580. /* kick root hub later */
  4581. pcd_status = status;
  4582. /* resume root hub? */
  4583. if (fusbh200->rh_state == FUSBH200_RH_SUSPENDED)
  4584. usb_hcd_resume_root_hub(hcd);
  4585. pstatus = fusbh200_readl(fusbh200, status_reg);
  4586. if (test_bit(0, &fusbh200->suspended_ports) &&
  4587. ((pstatus & PORT_RESUME) ||
  4588. !(pstatus & PORT_SUSPEND)) &&
  4589. (pstatus & PORT_PE) &&
  4590. fusbh200->reset_done[0] == 0) {
  4591. /* start 20 msec resume signaling from this port,
  4592. * and make hub_wq collect PORT_STAT_C_SUSPEND to
  4593. * stop that signaling. Use 5 ms extra for safety,
  4594. * like usb_port_resume() does.
  4595. */
  4596. fusbh200->reset_done[0] = jiffies + msecs_to_jiffies(25);
  4597. set_bit(0, &fusbh200->resuming_ports);
  4598. fusbh200_dbg (fusbh200, "port 1 remote wakeup\n");
  4599. mod_timer(&hcd->rh_timer, fusbh200->reset_done[0]);
  4600. }
  4601. }
  4602. /* PCI errors [4.15.2.4] */
  4603. if (unlikely ((status & STS_FATAL) != 0)) {
  4604. fusbh200_err(fusbh200, "fatal error\n");
  4605. dbg_cmd(fusbh200, "fatal", cmd);
  4606. dbg_status(fusbh200, "fatal", status);
  4607. dead:
  4608. usb_hc_died(hcd);
  4609. /* Don't let the controller do anything more */
  4610. fusbh200->shutdown = true;
  4611. fusbh200->rh_state = FUSBH200_RH_STOPPING;
  4612. fusbh200->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
  4613. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  4614. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  4615. fusbh200_handle_controller_death(fusbh200);
  4616. /* Handle completions when the controller stops */
  4617. bh = 0;
  4618. }
  4619. if (bh)
  4620. fusbh200_work (fusbh200);
  4621. spin_unlock (&fusbh200->lock);
  4622. if (pcd_status)
  4623. usb_hcd_poll_rh_status(hcd);
  4624. return IRQ_HANDLED;
  4625. }
  4626. /*-------------------------------------------------------------------------*/
  4627. /*
  4628. * non-error returns are a promise to giveback() the urb later
  4629. * we drop ownership so next owner (or urb unlink) can get it
  4630. *
  4631. * urb + dev is in hcd.self.controller.urb_list
  4632. * we're queueing TDs onto software and hardware lists
  4633. *
  4634. * hcd-specific init for hcpriv hasn't been done yet
  4635. *
  4636. * NOTE: control, bulk, and interrupt share the same code to append TDs
  4637. * to a (possibly active) QH, and the same QH scanning code.
  4638. */
  4639. static int fusbh200_urb_enqueue (
  4640. struct usb_hcd *hcd,
  4641. struct urb *urb,
  4642. gfp_t mem_flags
  4643. ) {
  4644. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4645. struct list_head qtd_list;
  4646. INIT_LIST_HEAD (&qtd_list);
  4647. switch (usb_pipetype (urb->pipe)) {
  4648. case PIPE_CONTROL:
  4649. /* qh_completions() code doesn't handle all the fault cases
  4650. * in multi-TD control transfers. Even 1KB is rare anyway.
  4651. */
  4652. if (urb->transfer_buffer_length > (16 * 1024))
  4653. return -EMSGSIZE;
  4654. /* FALLTHROUGH */
  4655. /* case PIPE_BULK: */
  4656. default:
  4657. if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
  4658. return -ENOMEM;
  4659. return submit_async(fusbh200, urb, &qtd_list, mem_flags);
  4660. case PIPE_INTERRUPT:
  4661. if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
  4662. return -ENOMEM;
  4663. return intr_submit(fusbh200, urb, &qtd_list, mem_flags);
  4664. case PIPE_ISOCHRONOUS:
  4665. return itd_submit (fusbh200, urb, mem_flags);
  4666. }
  4667. }
  4668. /* remove from hardware lists
  4669. * completions normally happen asynchronously
  4670. */
  4671. static int fusbh200_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  4672. {
  4673. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4674. struct fusbh200_qh *qh;
  4675. unsigned long flags;
  4676. int rc;
  4677. spin_lock_irqsave (&fusbh200->lock, flags);
  4678. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  4679. if (rc)
  4680. goto done;
  4681. switch (usb_pipetype (urb->pipe)) {
  4682. // case PIPE_CONTROL:
  4683. // case PIPE_BULK:
  4684. default:
  4685. qh = (struct fusbh200_qh *) urb->hcpriv;
  4686. if (!qh)
  4687. break;
  4688. switch (qh->qh_state) {
  4689. case QH_STATE_LINKED:
  4690. case QH_STATE_COMPLETING:
  4691. start_unlink_async(fusbh200, qh);
  4692. break;
  4693. case QH_STATE_UNLINK:
  4694. case QH_STATE_UNLINK_WAIT:
  4695. /* already started */
  4696. break;
  4697. case QH_STATE_IDLE:
  4698. /* QH might be waiting for a Clear-TT-Buffer */
  4699. qh_completions(fusbh200, qh);
  4700. break;
  4701. }
  4702. break;
  4703. case PIPE_INTERRUPT:
  4704. qh = (struct fusbh200_qh *) urb->hcpriv;
  4705. if (!qh)
  4706. break;
  4707. switch (qh->qh_state) {
  4708. case QH_STATE_LINKED:
  4709. case QH_STATE_COMPLETING:
  4710. start_unlink_intr(fusbh200, qh);
  4711. break;
  4712. case QH_STATE_IDLE:
  4713. qh_completions (fusbh200, qh);
  4714. break;
  4715. default:
  4716. fusbh200_dbg (fusbh200, "bogus qh %p state %d\n",
  4717. qh, qh->qh_state);
  4718. goto done;
  4719. }
  4720. break;
  4721. case PIPE_ISOCHRONOUS:
  4722. // itd...
  4723. // wait till next completion, do it then.
  4724. // completion irqs can wait up to 1024 msec,
  4725. break;
  4726. }
  4727. done:
  4728. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4729. return rc;
  4730. }
  4731. /*-------------------------------------------------------------------------*/
  4732. // bulk qh holds the data toggle
  4733. static void
  4734. fusbh200_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  4735. {
  4736. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4737. unsigned long flags;
  4738. struct fusbh200_qh *qh, *tmp;
  4739. /* ASSERT: any requests/urbs are being unlinked */
  4740. /* ASSERT: nobody can be submitting urbs for this any more */
  4741. rescan:
  4742. spin_lock_irqsave (&fusbh200->lock, flags);
  4743. qh = ep->hcpriv;
  4744. if (!qh)
  4745. goto done;
  4746. /* endpoints can be iso streams. for now, we don't
  4747. * accelerate iso completions ... so spin a while.
  4748. */
  4749. if (qh->hw == NULL) {
  4750. struct fusbh200_iso_stream *stream = ep->hcpriv;
  4751. if (!list_empty(&stream->td_list))
  4752. goto idle_timeout;
  4753. /* BUG_ON(!list_empty(&stream->free_list)); */
  4754. kfree(stream);
  4755. goto done;
  4756. }
  4757. if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  4758. qh->qh_state = QH_STATE_IDLE;
  4759. switch (qh->qh_state) {
  4760. case QH_STATE_LINKED:
  4761. case QH_STATE_COMPLETING:
  4762. for (tmp = fusbh200->async->qh_next.qh;
  4763. tmp && tmp != qh;
  4764. tmp = tmp->qh_next.qh)
  4765. continue;
  4766. /* periodic qh self-unlinks on empty, and a COMPLETING qh
  4767. * may already be unlinked.
  4768. */
  4769. if (tmp)
  4770. start_unlink_async(fusbh200, qh);
  4771. /* FALL THROUGH */
  4772. case QH_STATE_UNLINK: /* wait for hw to finish? */
  4773. case QH_STATE_UNLINK_WAIT:
  4774. idle_timeout:
  4775. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4776. schedule_timeout_uninterruptible(1);
  4777. goto rescan;
  4778. case QH_STATE_IDLE: /* fully unlinked */
  4779. if (qh->clearing_tt)
  4780. goto idle_timeout;
  4781. if (list_empty (&qh->qtd_list)) {
  4782. qh_destroy(fusbh200, qh);
  4783. break;
  4784. }
  4785. /* else FALL THROUGH */
  4786. default:
  4787. /* caller was supposed to have unlinked any requests;
  4788. * that's not our job. just leak this memory.
  4789. */
  4790. fusbh200_err (fusbh200, "qh %p (#%02x) state %d%s\n",
  4791. qh, ep->desc.bEndpointAddress, qh->qh_state,
  4792. list_empty (&qh->qtd_list) ? "" : "(has tds)");
  4793. break;
  4794. }
  4795. done:
  4796. ep->hcpriv = NULL;
  4797. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4798. }
  4799. static void
  4800. fusbh200_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  4801. {
  4802. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4803. struct fusbh200_qh *qh;
  4804. int eptype = usb_endpoint_type(&ep->desc);
  4805. int epnum = usb_endpoint_num(&ep->desc);
  4806. int is_out = usb_endpoint_dir_out(&ep->desc);
  4807. unsigned long flags;
  4808. if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
  4809. return;
  4810. spin_lock_irqsave(&fusbh200->lock, flags);
  4811. qh = ep->hcpriv;
  4812. /* For Bulk and Interrupt endpoints we maintain the toggle state
  4813. * in the hardware; the toggle bits in udev aren't used at all.
  4814. * When an endpoint is reset by usb_clear_halt() we must reset
  4815. * the toggle bit in the QH.
  4816. */
  4817. if (qh) {
  4818. usb_settoggle(qh->dev, epnum, is_out, 0);
  4819. if (!list_empty(&qh->qtd_list)) {
  4820. WARN_ONCE(1, "clear_halt for a busy endpoint\n");
  4821. } else if (qh->qh_state == QH_STATE_LINKED ||
  4822. qh->qh_state == QH_STATE_COMPLETING) {
  4823. /* The toggle value in the QH can't be updated
  4824. * while the QH is active. Unlink it now;
  4825. * re-linking will call qh_refresh().
  4826. */
  4827. if (eptype == USB_ENDPOINT_XFER_BULK)
  4828. start_unlink_async(fusbh200, qh);
  4829. else
  4830. start_unlink_intr(fusbh200, qh);
  4831. }
  4832. }
  4833. spin_unlock_irqrestore(&fusbh200->lock, flags);
  4834. }
  4835. static int fusbh200_get_frame (struct usb_hcd *hcd)
  4836. {
  4837. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4838. return (fusbh200_read_frame_index(fusbh200) >> 3) % fusbh200->periodic_size;
  4839. }
  4840. /*-------------------------------------------------------------------------*/
  4841. /*
  4842. * The EHCI in ChipIdea HDRC cannot be a separate module or device,
  4843. * because its registers (and irq) are shared between host/gadget/otg
  4844. * functions and in order to facilitate role switching we cannot
  4845. * give the fusbh200 driver exclusive access to those.
  4846. */
  4847. MODULE_DESCRIPTION(DRIVER_DESC);
  4848. MODULE_AUTHOR (DRIVER_AUTHOR);
  4849. MODULE_LICENSE ("GPL");
  4850. static const struct hc_driver fusbh200_fusbh200_hc_driver = {
  4851. .description = hcd_name,
  4852. .product_desc = "Faraday USB2.0 Host Controller",
  4853. .hcd_priv_size = sizeof(struct fusbh200_hcd),
  4854. /*
  4855. * generic hardware linkage
  4856. */
  4857. .irq = fusbh200_irq,
  4858. .flags = HCD_MEMORY | HCD_USB2,
  4859. /*
  4860. * basic lifecycle operations
  4861. */
  4862. .reset = hcd_fusbh200_init,
  4863. .start = fusbh200_run,
  4864. .stop = fusbh200_stop,
  4865. .shutdown = fusbh200_shutdown,
  4866. /*
  4867. * managing i/o requests and associated device resources
  4868. */
  4869. .urb_enqueue = fusbh200_urb_enqueue,
  4870. .urb_dequeue = fusbh200_urb_dequeue,
  4871. .endpoint_disable = fusbh200_endpoint_disable,
  4872. .endpoint_reset = fusbh200_endpoint_reset,
  4873. /*
  4874. * scheduling support
  4875. */
  4876. .get_frame_number = fusbh200_get_frame,
  4877. /*
  4878. * root hub support
  4879. */
  4880. .hub_status_data = fusbh200_hub_status_data,
  4881. .hub_control = fusbh200_hub_control,
  4882. .bus_suspend = fusbh200_bus_suspend,
  4883. .bus_resume = fusbh200_bus_resume,
  4884. .relinquish_port = fusbh200_relinquish_port,
  4885. .port_handed_over = fusbh200_port_handed_over,
  4886. .clear_tt_buffer_complete = fusbh200_clear_tt_buffer_complete,
  4887. };
  4888. static void fusbh200_init(struct fusbh200_hcd *fusbh200)
  4889. {
  4890. u32 reg;
  4891. reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmcsr);
  4892. reg |= BMCSR_INT_POLARITY;
  4893. reg &= ~BMCSR_VBUS_OFF;
  4894. fusbh200_writel(fusbh200, reg, &fusbh200->regs->bmcsr);
  4895. reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmier);
  4896. fusbh200_writel(fusbh200, reg | BMIER_OVC_EN | BMIER_VBUS_ERR_EN,
  4897. &fusbh200->regs->bmier);
  4898. }
  4899. /**
  4900. * fusbh200_hcd_probe - initialize faraday FUSBH200 HCDs
  4901. *
  4902. * Allocates basic resources for this USB host controller, and
  4903. * then invokes the start() method for the HCD associated with it
  4904. * through the hotplug entry's driver_data.
  4905. */
  4906. static int fusbh200_hcd_probe(struct platform_device *pdev)
  4907. {
  4908. struct device *dev = &pdev->dev;
  4909. struct usb_hcd *hcd;
  4910. struct resource *res;
  4911. int irq;
  4912. int retval = -ENODEV;
  4913. struct fusbh200_hcd *fusbh200;
  4914. if (usb_disabled())
  4915. return -ENODEV;
  4916. pdev->dev.power.power_state = PMSG_ON;
  4917. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  4918. if (!res) {
  4919. dev_err(dev,
  4920. "Found HC with no IRQ. Check %s setup!\n",
  4921. dev_name(dev));
  4922. return -ENODEV;
  4923. }
  4924. irq = res->start;
  4925. hcd = usb_create_hcd(&fusbh200_fusbh200_hc_driver, dev,
  4926. dev_name(dev));
  4927. if (!hcd) {
  4928. dev_err(dev, "failed to create hcd with err %d\n", retval);
  4929. retval = -ENOMEM;
  4930. goto fail_create_hcd;
  4931. }
  4932. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  4933. if (!res) {
  4934. dev_err(dev,
  4935. "Found HC with no register addr. Check %s setup!\n",
  4936. dev_name(dev));
  4937. retval = -ENODEV;
  4938. goto fail_request_resource;
  4939. }
  4940. hcd->rsrc_start = res->start;
  4941. hcd->rsrc_len = resource_size(res);
  4942. hcd->has_tt = 1;
  4943. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
  4944. fusbh200_fusbh200_hc_driver.description)) {
  4945. dev_dbg(dev, "controller already in use\n");
  4946. retval = -EBUSY;
  4947. goto fail_request_resource;
  4948. }
  4949. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  4950. if (!res) {
  4951. dev_err(dev,
  4952. "Found HC with no register addr. Check %s setup!\n",
  4953. dev_name(dev));
  4954. retval = -ENODEV;
  4955. goto fail_request_resource;
  4956. }
  4957. hcd->regs = ioremap_nocache(res->start, resource_size(res));
  4958. if (hcd->regs == NULL) {
  4959. dev_dbg(dev, "error mapping memory\n");
  4960. retval = -EFAULT;
  4961. goto fail_ioremap;
  4962. }
  4963. fusbh200 = hcd_to_fusbh200(hcd);
  4964. fusbh200->caps = hcd->regs;
  4965. retval = fusbh200_setup(hcd);
  4966. if (retval)
  4967. goto fail_add_hcd;
  4968. fusbh200_init(fusbh200);
  4969. retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
  4970. if (retval) {
  4971. dev_err(dev, "failed to add hcd with err %d\n", retval);
  4972. goto fail_add_hcd;
  4973. }
  4974. device_wakeup_enable(hcd->self.controller);
  4975. return retval;
  4976. fail_add_hcd:
  4977. iounmap(hcd->regs);
  4978. fail_ioremap:
  4979. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  4980. fail_request_resource:
  4981. usb_put_hcd(hcd);
  4982. fail_create_hcd:
  4983. dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
  4984. return retval;
  4985. }
  4986. /**
  4987. * fusbh200_hcd_remove - shutdown processing for EHCI HCDs
  4988. * @dev: USB Host Controller being removed
  4989. *
  4990. * Reverses the effect of fotg2xx_usb_hcd_probe(), first invoking
  4991. * the HCD's stop() method. It is always called from a thread
  4992. * context, normally "rmmod", "apmd", or something similar.
  4993. */
  4994. static int fusbh200_hcd_remove(struct platform_device *pdev)
  4995. {
  4996. struct device *dev = &pdev->dev;
  4997. struct usb_hcd *hcd = dev_get_drvdata(dev);
  4998. if (!hcd)
  4999. return 0;
  5000. usb_remove_hcd(hcd);
  5001. iounmap(hcd->regs);
  5002. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  5003. usb_put_hcd(hcd);
  5004. return 0;
  5005. }
  5006. static struct platform_driver fusbh200_hcd_fusbh200_driver = {
  5007. .driver = {
  5008. .name = "fusbh200",
  5009. },
  5010. .probe = fusbh200_hcd_probe,
  5011. .remove = fusbh200_hcd_remove,
  5012. };
  5013. static int __init fusbh200_hcd_init(void)
  5014. {
  5015. int retval = 0;
  5016. if (usb_disabled())
  5017. return -ENODEV;
  5018. printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
  5019. set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5020. if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
  5021. test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
  5022. printk(KERN_WARNING "Warning! fusbh200_hcd should always be loaded"
  5023. " before uhci_hcd and ohci_hcd, not after\n");
  5024. pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd\n",
  5025. hcd_name,
  5026. sizeof(struct fusbh200_qh), sizeof(struct fusbh200_qtd),
  5027. sizeof(struct fusbh200_itd));
  5028. fusbh200_debug_root = debugfs_create_dir("fusbh200", usb_debug_root);
  5029. if (!fusbh200_debug_root) {
  5030. retval = -ENOENT;
  5031. goto err_debug;
  5032. }
  5033. retval = platform_driver_register(&fusbh200_hcd_fusbh200_driver);
  5034. if (retval < 0)
  5035. goto clean;
  5036. return retval;
  5037. platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
  5038. clean:
  5039. debugfs_remove(fusbh200_debug_root);
  5040. fusbh200_debug_root = NULL;
  5041. err_debug:
  5042. clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5043. return retval;
  5044. }
  5045. module_init(fusbh200_hcd_init);
  5046. static void __exit fusbh200_hcd_cleanup(void)
  5047. {
  5048. platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
  5049. debugfs_remove(fusbh200_debug_root);
  5050. clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5051. }
  5052. module_exit(fusbh200_hcd_cleanup);