net2280.c 95 KB

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  1. /*
  2. * Driver for the PLX NET2280 USB device controller.
  3. * Specs and errata are available from <http://www.plxtech.com>.
  4. *
  5. * PLX Technology Inc. (formerly NetChip Technology) supported the
  6. * development of this driver.
  7. *
  8. *
  9. * CODE STATUS HIGHLIGHTS
  10. *
  11. * This driver should work well with most "gadget" drivers, including
  12. * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
  13. * as well as Gadget Zero and Gadgetfs.
  14. *
  15. * DMA is enabled by default.
  16. *
  17. * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
  18. * be enabled.
  19. *
  20. * Note that almost all the errata workarounds here are only needed for
  21. * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
  22. */
  23. /*
  24. * Copyright (C) 2003 David Brownell
  25. * Copyright (C) 2003-2005 PLX Technology, Inc.
  26. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  27. *
  28. * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
  29. * with 2282 chip
  30. *
  31. * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
  32. * with usb 338x chip. Based on PLX driver
  33. *
  34. * This program is free software; you can redistribute it and/or modify
  35. * it under the terms of the GNU General Public License as published by
  36. * the Free Software Foundation; either version 2 of the License, or
  37. * (at your option) any later version.
  38. */
  39. #include <linux/module.h>
  40. #include <linux/pci.h>
  41. #include <linux/dma-mapping.h>
  42. #include <linux/kernel.h>
  43. #include <linux/delay.h>
  44. #include <linux/ioport.h>
  45. #include <linux/slab.h>
  46. #include <linux/errno.h>
  47. #include <linux/init.h>
  48. #include <linux/timer.h>
  49. #include <linux/list.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/moduleparam.h>
  52. #include <linux/device.h>
  53. #include <linux/usb/ch9.h>
  54. #include <linux/usb/gadget.h>
  55. #include <linux/prefetch.h>
  56. #include <linux/io.h>
  57. #include <asm/byteorder.h>
  58. #include <asm/irq.h>
  59. #include <asm/unaligned.h>
  60. #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
  61. #define DRIVER_VERSION "2005 Sept 27/v3.0"
  62. #define EP_DONTUSE 13 /* nonzero */
  63. #define USE_RDK_LEDS /* GPIO pins control three LEDs */
  64. static const char driver_name[] = "net2280";
  65. static const char driver_desc[] = DRIVER_DESC;
  66. static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
  67. static const char ep0name[] = "ep0";
  68. static const char *const ep_name[] = {
  69. ep0name,
  70. "ep-a", "ep-b", "ep-c", "ep-d",
  71. "ep-e", "ep-f", "ep-g", "ep-h",
  72. };
  73. /* Endpoint names for usb3380 advance mode */
  74. static const char *const ep_name_adv[] = {
  75. ep0name,
  76. "ep1in", "ep2out", "ep3in", "ep4out",
  77. "ep1out", "ep2in", "ep3out", "ep4in",
  78. };
  79. /* mode 0 == ep-{a,b,c,d} 1K fifo each
  80. * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
  81. * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
  82. */
  83. static ushort fifo_mode;
  84. /* "modprobe net2280 fifo_mode=1" etc */
  85. module_param(fifo_mode, ushort, 0644);
  86. /* enable_suspend -- When enabled, the driver will respond to
  87. * USB suspend requests by powering down the NET2280. Otherwise,
  88. * USB suspend requests will be ignored. This is acceptable for
  89. * self-powered devices
  90. */
  91. static bool enable_suspend;
  92. /* "modprobe net2280 enable_suspend=1" etc */
  93. module_param(enable_suspend, bool, 0444);
  94. #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
  95. static char *type_string(u8 bmAttributes)
  96. {
  97. switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
  98. case USB_ENDPOINT_XFER_BULK: return "bulk";
  99. case USB_ENDPOINT_XFER_ISOC: return "iso";
  100. case USB_ENDPOINT_XFER_INT: return "intr";
  101. }
  102. return "control";
  103. }
  104. #include "net2280.h"
  105. #define valid_bit cpu_to_le32(BIT(VALID_BIT))
  106. #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
  107. static void ep_clear_seqnum(struct net2280_ep *ep);
  108. static void stop_activity(struct net2280 *dev,
  109. struct usb_gadget_driver *driver);
  110. static void ep0_start(struct net2280 *dev);
  111. /*-------------------------------------------------------------------------*/
  112. static inline void enable_pciirqenb(struct net2280_ep *ep)
  113. {
  114. u32 tmp = readl(&ep->dev->regs->pciirqenb0);
  115. if (ep->dev->quirks & PLX_LEGACY)
  116. tmp |= BIT(ep->num);
  117. else
  118. tmp |= BIT(ep_bit[ep->num]);
  119. writel(tmp, &ep->dev->regs->pciirqenb0);
  120. return;
  121. }
  122. static int
  123. net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  124. {
  125. struct net2280 *dev;
  126. struct net2280_ep *ep;
  127. u32 max;
  128. u32 tmp = 0;
  129. u32 type;
  130. unsigned long flags;
  131. static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
  132. int ret = 0;
  133. ep = container_of(_ep, struct net2280_ep, ep);
  134. if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
  135. desc->bDescriptorType != USB_DT_ENDPOINT) {
  136. pr_err("%s: failed at line=%d\n", __func__, __LINE__);
  137. return -EINVAL;
  138. }
  139. dev = ep->dev;
  140. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  141. ret = -ESHUTDOWN;
  142. goto print_err;
  143. }
  144. /* erratum 0119 workaround ties up an endpoint number */
  145. if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
  146. ret = -EDOM;
  147. goto print_err;
  148. }
  149. if (dev->quirks & PLX_SUPERSPEED) {
  150. if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
  151. ret = -EDOM;
  152. goto print_err;
  153. }
  154. ep->is_in = !!usb_endpoint_dir_in(desc);
  155. if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
  156. ret = -EINVAL;
  157. goto print_err;
  158. }
  159. }
  160. /* sanity check ep-e/ep-f since their fifos are small */
  161. max = usb_endpoint_maxp(desc) & 0x1fff;
  162. if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
  163. ret = -ERANGE;
  164. goto print_err;
  165. }
  166. spin_lock_irqsave(&dev->lock, flags);
  167. _ep->maxpacket = max & 0x7ff;
  168. ep->desc = desc;
  169. /* ep_reset() has already been called */
  170. ep->stopped = 0;
  171. ep->wedged = 0;
  172. ep->out_overflow = 0;
  173. /* set speed-dependent max packet; may kick in high bandwidth */
  174. set_max_speed(ep, max);
  175. /* set type, direction, address; reset fifo counters */
  176. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  177. if ((dev->quirks & PLX_SUPERSPEED) && dev->enhanced_mode) {
  178. tmp = readl(&ep->cfg->ep_cfg);
  179. /* If USB ep number doesn't match hardware ep number */
  180. if ((tmp & 0xf) != usb_endpoint_num(desc)) {
  181. ret = -EINVAL;
  182. spin_unlock_irqrestore(&dev->lock, flags);
  183. goto print_err;
  184. }
  185. if (ep->is_in)
  186. tmp &= ~USB3380_EP_CFG_MASK_IN;
  187. else
  188. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  189. }
  190. type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  191. if (type == USB_ENDPOINT_XFER_INT) {
  192. /* erratum 0105 workaround prevents hs NYET */
  193. if (dev->chiprev == 0100 &&
  194. dev->gadget.speed == USB_SPEED_HIGH &&
  195. !(desc->bEndpointAddress & USB_DIR_IN))
  196. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  197. &ep->regs->ep_rsp);
  198. } else if (type == USB_ENDPOINT_XFER_BULK) {
  199. /* catch some particularly blatant driver bugs */
  200. if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
  201. (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
  202. (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
  203. spin_unlock_irqrestore(&dev->lock, flags);
  204. ret = -ERANGE;
  205. goto print_err;
  206. }
  207. }
  208. ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
  209. /* Enable this endpoint */
  210. if (dev->quirks & PLX_LEGACY) {
  211. tmp |= type << ENDPOINT_TYPE;
  212. tmp |= desc->bEndpointAddress;
  213. /* default full fifo lines */
  214. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  215. tmp |= BIT(ENDPOINT_ENABLE);
  216. ep->is_in = (tmp & USB_DIR_IN) != 0;
  217. } else {
  218. /* In Legacy mode, only OUT endpoints are used */
  219. if (dev->enhanced_mode && ep->is_in) {
  220. tmp |= type << IN_ENDPOINT_TYPE;
  221. tmp |= BIT(IN_ENDPOINT_ENABLE);
  222. } else {
  223. tmp |= type << OUT_ENDPOINT_TYPE;
  224. tmp |= BIT(OUT_ENDPOINT_ENABLE);
  225. tmp |= (ep->is_in << ENDPOINT_DIRECTION);
  226. }
  227. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  228. if (!dev->enhanced_mode)
  229. tmp |= usb_endpoint_num(desc);
  230. tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
  231. }
  232. /* Make sure all the registers are written before ep_rsp*/
  233. wmb();
  234. /* for OUT transfers, block the rx fifo until a read is posted */
  235. if (!ep->is_in)
  236. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  237. else if (!(dev->quirks & PLX_2280)) {
  238. /* Added for 2282, Don't use nak packets on an in endpoint,
  239. * this was ignored on 2280
  240. */
  241. writel(BIT(CLEAR_NAK_OUT_PACKETS) |
  242. BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
  243. }
  244. if (dev->quirks & PLX_SUPERSPEED)
  245. ep_clear_seqnum(ep);
  246. writel(tmp, &ep->cfg->ep_cfg);
  247. /* enable irqs */
  248. if (!ep->dma) { /* pio, per-packet */
  249. enable_pciirqenb(ep);
  250. tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
  251. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
  252. if (dev->quirks & PLX_2280)
  253. tmp |= readl(&ep->regs->ep_irqenb);
  254. writel(tmp, &ep->regs->ep_irqenb);
  255. } else { /* dma, per-request */
  256. tmp = BIT((8 + ep->num)); /* completion */
  257. tmp |= readl(&dev->regs->pciirqenb1);
  258. writel(tmp, &dev->regs->pciirqenb1);
  259. /* for short OUT transfers, dma completions can't
  260. * advance the queue; do it pio-style, by hand.
  261. * NOTE erratum 0112 workaround #2
  262. */
  263. if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
  264. tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
  265. writel(tmp, &ep->regs->ep_irqenb);
  266. enable_pciirqenb(ep);
  267. }
  268. }
  269. tmp = desc->bEndpointAddress;
  270. ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
  271. _ep->name, tmp & 0x0f, DIR_STRING(tmp),
  272. type_string(desc->bmAttributes),
  273. ep->dma ? "dma" : "pio", max);
  274. /* pci writes may still be posted */
  275. spin_unlock_irqrestore(&dev->lock, flags);
  276. return ret;
  277. print_err:
  278. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  279. return ret;
  280. }
  281. static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
  282. {
  283. u32 result;
  284. do {
  285. result = readl(ptr);
  286. if (result == ~(u32)0) /* "device unplugged" */
  287. return -ENODEV;
  288. result &= mask;
  289. if (result == done)
  290. return 0;
  291. udelay(1);
  292. usec--;
  293. } while (usec > 0);
  294. return -ETIMEDOUT;
  295. }
  296. static const struct usb_ep_ops net2280_ep_ops;
  297. static void ep_reset_228x(struct net2280_regs __iomem *regs,
  298. struct net2280_ep *ep)
  299. {
  300. u32 tmp;
  301. ep->desc = NULL;
  302. INIT_LIST_HEAD(&ep->queue);
  303. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  304. ep->ep.ops = &net2280_ep_ops;
  305. /* disable the dma, irqs, endpoint... */
  306. if (ep->dma) {
  307. writel(0, &ep->dma->dmactl);
  308. writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  309. BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
  310. BIT(DMA_ABORT),
  311. &ep->dma->dmastat);
  312. tmp = readl(&regs->pciirqenb0);
  313. tmp &= ~BIT(ep->num);
  314. writel(tmp, &regs->pciirqenb0);
  315. } else {
  316. tmp = readl(&regs->pciirqenb1);
  317. tmp &= ~BIT((8 + ep->num)); /* completion */
  318. writel(tmp, &regs->pciirqenb1);
  319. }
  320. writel(0, &ep->regs->ep_irqenb);
  321. /* init to our chosen defaults, notably so that we NAK OUT
  322. * packets until the driver queues a read (+note erratum 0112)
  323. */
  324. if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
  325. tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
  326. BIT(SET_NAK_OUT_PACKETS) |
  327. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  328. BIT(CLEAR_INTERRUPT_MODE);
  329. } else {
  330. /* added for 2282 */
  331. tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  332. BIT(CLEAR_NAK_OUT_PACKETS) |
  333. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  334. BIT(CLEAR_INTERRUPT_MODE);
  335. }
  336. if (ep->num != 0) {
  337. tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
  338. BIT(CLEAR_ENDPOINT_HALT);
  339. }
  340. writel(tmp, &ep->regs->ep_rsp);
  341. /* scrub most status bits, and flush any fifo state */
  342. if (ep->dev->quirks & PLX_2280)
  343. tmp = BIT(FIFO_OVERFLOW) |
  344. BIT(FIFO_UNDERFLOW);
  345. else
  346. tmp = 0;
  347. writel(tmp | BIT(TIMEOUT) |
  348. BIT(USB_STALL_SENT) |
  349. BIT(USB_IN_NAK_SENT) |
  350. BIT(USB_IN_ACK_RCVD) |
  351. BIT(USB_OUT_PING_NAK_SENT) |
  352. BIT(USB_OUT_ACK_SENT) |
  353. BIT(FIFO_FLUSH) |
  354. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  355. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  356. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  357. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  358. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  359. BIT(DATA_IN_TOKEN_INTERRUPT),
  360. &ep->regs->ep_stat);
  361. /* fifo size is handled separately */
  362. }
  363. static void ep_reset_338x(struct net2280_regs __iomem *regs,
  364. struct net2280_ep *ep)
  365. {
  366. u32 tmp, dmastat;
  367. ep->desc = NULL;
  368. INIT_LIST_HEAD(&ep->queue);
  369. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  370. ep->ep.ops = &net2280_ep_ops;
  371. /* disable the dma, irqs, endpoint... */
  372. if (ep->dma) {
  373. writel(0, &ep->dma->dmactl);
  374. writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
  375. BIT(DMA_PAUSE_DONE_INTERRUPT) |
  376. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  377. BIT(DMA_TRANSACTION_DONE_INTERRUPT),
  378. /* | BIT(DMA_ABORT), */
  379. &ep->dma->dmastat);
  380. dmastat = readl(&ep->dma->dmastat);
  381. if (dmastat == 0x5002) {
  382. ep_warn(ep->dev, "The dmastat return = %x!!\n",
  383. dmastat);
  384. writel(0x5a, &ep->dma->dmastat);
  385. }
  386. tmp = readl(&regs->pciirqenb0);
  387. tmp &= ~BIT(ep_bit[ep->num]);
  388. writel(tmp, &regs->pciirqenb0);
  389. } else {
  390. if (ep->num < 5) {
  391. tmp = readl(&regs->pciirqenb1);
  392. tmp &= ~BIT((8 + ep->num)); /* completion */
  393. writel(tmp, &regs->pciirqenb1);
  394. }
  395. }
  396. writel(0, &ep->regs->ep_irqenb);
  397. writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  398. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  399. BIT(FIFO_OVERFLOW) |
  400. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  401. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  402. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  403. BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
  404. tmp = readl(&ep->cfg->ep_cfg);
  405. if (ep->is_in)
  406. tmp &= ~USB3380_EP_CFG_MASK_IN;
  407. else
  408. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  409. writel(tmp, &ep->cfg->ep_cfg);
  410. }
  411. static void nuke(struct net2280_ep *);
  412. static int net2280_disable(struct usb_ep *_ep)
  413. {
  414. struct net2280_ep *ep;
  415. unsigned long flags;
  416. ep = container_of(_ep, struct net2280_ep, ep);
  417. if (!_ep || !ep->desc || _ep->name == ep0name) {
  418. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  419. return -EINVAL;
  420. }
  421. spin_lock_irqsave(&ep->dev->lock, flags);
  422. nuke(ep);
  423. if (ep->dev->quirks & PLX_SUPERSPEED)
  424. ep_reset_338x(ep->dev->regs, ep);
  425. else
  426. ep_reset_228x(ep->dev->regs, ep);
  427. ep_vdbg(ep->dev, "disabled %s %s\n",
  428. ep->dma ? "dma" : "pio", _ep->name);
  429. /* synch memory views with the device */
  430. (void)readl(&ep->cfg->ep_cfg);
  431. if (!ep->dma && ep->num >= 1 && ep->num <= 4)
  432. ep->dma = &ep->dev->dma[ep->num - 1];
  433. spin_unlock_irqrestore(&ep->dev->lock, flags);
  434. return 0;
  435. }
  436. /*-------------------------------------------------------------------------*/
  437. static struct usb_request
  438. *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  439. {
  440. struct net2280_ep *ep;
  441. struct net2280_request *req;
  442. if (!_ep) {
  443. pr_err("%s: Invalid ep\n", __func__);
  444. return NULL;
  445. }
  446. ep = container_of(_ep, struct net2280_ep, ep);
  447. req = kzalloc(sizeof(*req), gfp_flags);
  448. if (!req)
  449. return NULL;
  450. INIT_LIST_HEAD(&req->queue);
  451. /* this dma descriptor may be swapped with the previous dummy */
  452. if (ep->dma) {
  453. struct net2280_dma *td;
  454. td = pci_pool_alloc(ep->dev->requests, gfp_flags,
  455. &req->td_dma);
  456. if (!td) {
  457. kfree(req);
  458. return NULL;
  459. }
  460. td->dmacount = 0; /* not VALID */
  461. td->dmadesc = td->dmaaddr;
  462. req->td = td;
  463. }
  464. return &req->req;
  465. }
  466. static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
  467. {
  468. struct net2280_ep *ep;
  469. struct net2280_request *req;
  470. ep = container_of(_ep, struct net2280_ep, ep);
  471. if (!_ep || !_req) {
  472. dev_err(&ep->dev->pdev->dev, "%s: Inavlid ep=%p or req=%p\n",
  473. __func__, _ep, _req);
  474. return;
  475. }
  476. req = container_of(_req, struct net2280_request, req);
  477. WARN_ON(!list_empty(&req->queue));
  478. if (req->td)
  479. pci_pool_free(ep->dev->requests, req->td, req->td_dma);
  480. kfree(req);
  481. }
  482. /*-------------------------------------------------------------------------*/
  483. /* load a packet into the fifo we use for usb IN transfers.
  484. * works for all endpoints.
  485. *
  486. * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
  487. * at a time, but this code is simpler because it knows it only writes
  488. * one packet. ep-a..ep-d should use dma instead.
  489. */
  490. static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
  491. {
  492. struct net2280_ep_regs __iomem *regs = ep->regs;
  493. u8 *buf;
  494. u32 tmp;
  495. unsigned count, total;
  496. /* INVARIANT: fifo is currently empty. (testable) */
  497. if (req) {
  498. buf = req->buf + req->actual;
  499. prefetch(buf);
  500. total = req->length - req->actual;
  501. } else {
  502. total = 0;
  503. buf = NULL;
  504. }
  505. /* write just one packet at a time */
  506. count = ep->ep.maxpacket;
  507. if (count > total) /* min() cannot be used on a bitfield */
  508. count = total;
  509. ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
  510. ep->ep.name, count,
  511. (count != ep->ep.maxpacket) ? " (short)" : "",
  512. req);
  513. while (count >= 4) {
  514. /* NOTE be careful if you try to align these. fifo lines
  515. * should normally be full (4 bytes) and successive partial
  516. * lines are ok only in certain cases.
  517. */
  518. tmp = get_unaligned((u32 *)buf);
  519. cpu_to_le32s(&tmp);
  520. writel(tmp, &regs->ep_data);
  521. buf += 4;
  522. count -= 4;
  523. }
  524. /* last fifo entry is "short" unless we wrote a full packet.
  525. * also explicitly validate last word in (periodic) transfers
  526. * when maxpacket is not a multiple of 4 bytes.
  527. */
  528. if (count || total < ep->ep.maxpacket) {
  529. tmp = count ? get_unaligned((u32 *)buf) : count;
  530. cpu_to_le32s(&tmp);
  531. set_fifo_bytecount(ep, count & 0x03);
  532. writel(tmp, &regs->ep_data);
  533. }
  534. /* pci writes may still be posted */
  535. }
  536. /* work around erratum 0106: PCI and USB race over the OUT fifo.
  537. * caller guarantees chiprev 0100, out endpoint is NAKing, and
  538. * there's no real data in the fifo.
  539. *
  540. * NOTE: also used in cases where that erratum doesn't apply:
  541. * where the host wrote "too much" data to us.
  542. */
  543. static void out_flush(struct net2280_ep *ep)
  544. {
  545. u32 __iomem *statp;
  546. u32 tmp;
  547. statp = &ep->regs->ep_stat;
  548. tmp = readl(statp);
  549. if (tmp & BIT(NAK_OUT_PACKETS)) {
  550. ep_dbg(ep->dev, "%s %s %08x !NAK\n",
  551. ep->ep.name, __func__, tmp);
  552. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  553. }
  554. writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  555. BIT(DATA_PACKET_RECEIVED_INTERRUPT),
  556. statp);
  557. writel(BIT(FIFO_FLUSH), statp);
  558. /* Make sure that stap is written */
  559. mb();
  560. tmp = readl(statp);
  561. if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
  562. /* high speed did bulk NYET; fifo isn't filling */
  563. ep->dev->gadget.speed == USB_SPEED_FULL) {
  564. unsigned usec;
  565. usec = 50; /* 64 byte bulk/interrupt */
  566. handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
  567. BIT(USB_OUT_PING_NAK_SENT), usec);
  568. /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
  569. }
  570. }
  571. /* unload packet(s) from the fifo we use for usb OUT transfers.
  572. * returns true iff the request completed, because of short packet
  573. * or the request buffer having filled with full packets.
  574. *
  575. * for ep-a..ep-d this will read multiple packets out when they
  576. * have been accepted.
  577. */
  578. static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
  579. {
  580. struct net2280_ep_regs __iomem *regs = ep->regs;
  581. u8 *buf = req->req.buf + req->req.actual;
  582. unsigned count, tmp, is_short;
  583. unsigned cleanup = 0, prevent = 0;
  584. /* erratum 0106 ... packets coming in during fifo reads might
  585. * be incompletely rejected. not all cases have workarounds.
  586. */
  587. if (ep->dev->chiprev == 0x0100 &&
  588. ep->dev->gadget.speed == USB_SPEED_FULL) {
  589. udelay(1);
  590. tmp = readl(&ep->regs->ep_stat);
  591. if ((tmp & BIT(NAK_OUT_PACKETS)))
  592. cleanup = 1;
  593. else if ((tmp & BIT(FIFO_FULL))) {
  594. start_out_naking(ep);
  595. prevent = 1;
  596. }
  597. /* else: hope we don't see the problem */
  598. }
  599. /* never overflow the rx buffer. the fifo reads packets until
  600. * it sees a short one; we might not be ready for them all.
  601. */
  602. prefetchw(buf);
  603. count = readl(&regs->ep_avail);
  604. if (unlikely(count == 0)) {
  605. udelay(1);
  606. tmp = readl(&ep->regs->ep_stat);
  607. count = readl(&regs->ep_avail);
  608. /* handled that data already? */
  609. if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
  610. return 0;
  611. }
  612. tmp = req->req.length - req->req.actual;
  613. if (count > tmp) {
  614. /* as with DMA, data overflow gets flushed */
  615. if ((tmp % ep->ep.maxpacket) != 0) {
  616. ep_err(ep->dev,
  617. "%s out fifo %d bytes, expected %d\n",
  618. ep->ep.name, count, tmp);
  619. req->req.status = -EOVERFLOW;
  620. cleanup = 1;
  621. /* NAK_OUT_PACKETS will be set, so flushing is safe;
  622. * the next read will start with the next packet
  623. */
  624. } /* else it's a ZLP, no worries */
  625. count = tmp;
  626. }
  627. req->req.actual += count;
  628. is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
  629. ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
  630. ep->ep.name, count, is_short ? " (short)" : "",
  631. cleanup ? " flush" : "", prevent ? " nak" : "",
  632. req, req->req.actual, req->req.length);
  633. while (count >= 4) {
  634. tmp = readl(&regs->ep_data);
  635. cpu_to_le32s(&tmp);
  636. put_unaligned(tmp, (u32 *)buf);
  637. buf += 4;
  638. count -= 4;
  639. }
  640. if (count) {
  641. tmp = readl(&regs->ep_data);
  642. /* LE conversion is implicit here: */
  643. do {
  644. *buf++ = (u8) tmp;
  645. tmp >>= 8;
  646. } while (--count);
  647. }
  648. if (cleanup)
  649. out_flush(ep);
  650. if (prevent) {
  651. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  652. (void) readl(&ep->regs->ep_rsp);
  653. }
  654. return is_short || ((req->req.actual == req->req.length) &&
  655. !req->req.zero);
  656. }
  657. /* fill out dma descriptor to match a given request */
  658. static void fill_dma_desc(struct net2280_ep *ep,
  659. struct net2280_request *req, int valid)
  660. {
  661. struct net2280_dma *td = req->td;
  662. u32 dmacount = req->req.length;
  663. /* don't let DMA continue after a short OUT packet,
  664. * so overruns can't affect the next transfer.
  665. * in case of overruns on max-size packets, we can't
  666. * stop the fifo from filling but we can flush it.
  667. */
  668. if (ep->is_in)
  669. dmacount |= BIT(DMA_DIRECTION);
  670. if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
  671. !(ep->dev->quirks & PLX_2280))
  672. dmacount |= BIT(END_OF_CHAIN);
  673. req->valid = valid;
  674. if (valid)
  675. dmacount |= BIT(VALID_BIT);
  676. dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
  677. /* td->dmadesc = previously set by caller */
  678. td->dmaaddr = cpu_to_le32 (req->req.dma);
  679. /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
  680. wmb();
  681. td->dmacount = cpu_to_le32(dmacount);
  682. }
  683. static const u32 dmactl_default =
  684. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  685. BIT(DMA_CLEAR_COUNT_ENABLE) |
  686. /* erratum 0116 workaround part 1 (use POLLING) */
  687. (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
  688. BIT(DMA_VALID_BIT_POLLING_ENABLE) |
  689. BIT(DMA_VALID_BIT_ENABLE) |
  690. BIT(DMA_SCATTER_GATHER_ENABLE) |
  691. /* erratum 0116 workaround part 2 (no AUTOSTART) */
  692. BIT(DMA_ENABLE);
  693. static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
  694. {
  695. handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
  696. }
  697. static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
  698. {
  699. writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
  700. spin_stop_dma(dma);
  701. }
  702. static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
  703. {
  704. struct net2280_dma_regs __iomem *dma = ep->dma;
  705. unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
  706. if (!(ep->dev->quirks & PLX_2280))
  707. tmp |= BIT(END_OF_CHAIN);
  708. writel(tmp, &dma->dmacount);
  709. writel(readl(&dma->dmastat), &dma->dmastat);
  710. writel(td_dma, &dma->dmadesc);
  711. if (ep->dev->quirks & PLX_SUPERSPEED)
  712. dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
  713. writel(dmactl, &dma->dmactl);
  714. /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
  715. (void) readl(&ep->dev->pci->pcimstctl);
  716. writel(BIT(DMA_START), &dma->dmastat);
  717. if (!ep->is_in)
  718. stop_out_naking(ep);
  719. }
  720. static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
  721. {
  722. u32 tmp;
  723. struct net2280_dma_regs __iomem *dma = ep->dma;
  724. /* FIXME can't use DMA for ZLPs */
  725. /* on this path we "know" there's no dma active (yet) */
  726. WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
  727. writel(0, &ep->dma->dmactl);
  728. /* previous OUT packet might have been short */
  729. if (!ep->is_in && (readl(&ep->regs->ep_stat) &
  730. BIT(NAK_OUT_PACKETS))) {
  731. writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
  732. &ep->regs->ep_stat);
  733. tmp = readl(&ep->regs->ep_avail);
  734. if (tmp) {
  735. writel(readl(&dma->dmastat), &dma->dmastat);
  736. /* transfer all/some fifo data */
  737. writel(req->req.dma, &dma->dmaaddr);
  738. tmp = min(tmp, req->req.length);
  739. /* dma irq, faking scatterlist status */
  740. req->td->dmacount = cpu_to_le32(req->req.length - tmp);
  741. writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
  742. &dma->dmacount);
  743. req->td->dmadesc = 0;
  744. req->valid = 1;
  745. writel(BIT(DMA_ENABLE), &dma->dmactl);
  746. writel(BIT(DMA_START), &dma->dmastat);
  747. return;
  748. }
  749. }
  750. tmp = dmactl_default;
  751. /* force packet boundaries between dma requests, but prevent the
  752. * controller from automagically writing a last "short" packet
  753. * (zero length) unless the driver explicitly said to do that.
  754. */
  755. if (ep->is_in) {
  756. if (likely((req->req.length % ep->ep.maxpacket) ||
  757. req->req.zero)){
  758. tmp |= BIT(DMA_FIFO_VALIDATE);
  759. ep->in_fifo_validate = 1;
  760. } else
  761. ep->in_fifo_validate = 0;
  762. }
  763. /* init req->td, pointing to the current dummy */
  764. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  765. fill_dma_desc(ep, req, 1);
  766. req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
  767. start_queue(ep, tmp, req->td_dma);
  768. }
  769. static inline void
  770. queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
  771. {
  772. struct net2280_dma *end;
  773. dma_addr_t tmp;
  774. /* swap new dummy for old, link; fill and maybe activate */
  775. end = ep->dummy;
  776. ep->dummy = req->td;
  777. req->td = end;
  778. tmp = ep->td_dma;
  779. ep->td_dma = req->td_dma;
  780. req->td_dma = tmp;
  781. end->dmadesc = cpu_to_le32 (ep->td_dma);
  782. fill_dma_desc(ep, req, valid);
  783. }
  784. static void
  785. done(struct net2280_ep *ep, struct net2280_request *req, int status)
  786. {
  787. struct net2280 *dev;
  788. unsigned stopped = ep->stopped;
  789. list_del_init(&req->queue);
  790. if (req->req.status == -EINPROGRESS)
  791. req->req.status = status;
  792. else
  793. status = req->req.status;
  794. dev = ep->dev;
  795. if (ep->dma)
  796. usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
  797. if (status && status != -ESHUTDOWN)
  798. ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
  799. ep->ep.name, &req->req, status,
  800. req->req.actual, req->req.length);
  801. /* don't modify queue heads during completion callback */
  802. ep->stopped = 1;
  803. spin_unlock(&dev->lock);
  804. usb_gadget_giveback_request(&ep->ep, &req->req);
  805. spin_lock(&dev->lock);
  806. ep->stopped = stopped;
  807. }
  808. /*-------------------------------------------------------------------------*/
  809. static int
  810. net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  811. {
  812. struct net2280_request *req;
  813. struct net2280_ep *ep;
  814. struct net2280 *dev;
  815. unsigned long flags;
  816. int ret = 0;
  817. /* we always require a cpu-view buffer, so that we can
  818. * always use pio (as fallback or whatever).
  819. */
  820. ep = container_of(_ep, struct net2280_ep, ep);
  821. if (!_ep || (!ep->desc && ep->num != 0)) {
  822. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  823. return -EINVAL;
  824. }
  825. req = container_of(_req, struct net2280_request, req);
  826. if (!_req || !_req->complete || !_req->buf ||
  827. !list_empty(&req->queue)) {
  828. ret = -EINVAL;
  829. goto print_err;
  830. }
  831. if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
  832. ret = -EDOM;
  833. goto print_err;
  834. }
  835. dev = ep->dev;
  836. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  837. ret = -ESHUTDOWN;
  838. goto print_err;
  839. }
  840. /* FIXME implement PIO fallback for ZLPs with DMA */
  841. if (ep->dma && _req->length == 0) {
  842. ret = -EOPNOTSUPP;
  843. goto print_err;
  844. }
  845. /* set up dma mapping in case the caller didn't */
  846. if (ep->dma) {
  847. ret = usb_gadget_map_request(&dev->gadget, _req,
  848. ep->is_in);
  849. if (ret)
  850. goto print_err;
  851. }
  852. ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
  853. _ep->name, _req, _req->length, _req->buf);
  854. spin_lock_irqsave(&dev->lock, flags);
  855. _req->status = -EINPROGRESS;
  856. _req->actual = 0;
  857. /* kickstart this i/o queue? */
  858. if (list_empty(&ep->queue) && !ep->stopped &&
  859. !((dev->quirks & PLX_SUPERSPEED) && ep->dma &&
  860. (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
  861. /* use DMA if the endpoint supports it, else pio */
  862. if (ep->dma)
  863. start_dma(ep, req);
  864. else {
  865. /* maybe there's no control data, just status ack */
  866. if (ep->num == 0 && _req->length == 0) {
  867. allow_status(ep);
  868. done(ep, req, 0);
  869. ep_vdbg(dev, "%s status ack\n", ep->ep.name);
  870. goto done;
  871. }
  872. /* PIO ... stuff the fifo, or unblock it. */
  873. if (ep->is_in)
  874. write_fifo(ep, _req);
  875. else if (list_empty(&ep->queue)) {
  876. u32 s;
  877. /* OUT FIFO might have packet(s) buffered */
  878. s = readl(&ep->regs->ep_stat);
  879. if ((s & BIT(FIFO_EMPTY)) == 0) {
  880. /* note: _req->short_not_ok is
  881. * ignored here since PIO _always_
  882. * stops queue advance here, and
  883. * _req->status doesn't change for
  884. * short reads (only _req->actual)
  885. */
  886. if (read_fifo(ep, req) &&
  887. ep->num == 0) {
  888. done(ep, req, 0);
  889. allow_status(ep);
  890. /* don't queue it */
  891. req = NULL;
  892. } else if (read_fifo(ep, req) &&
  893. ep->num != 0) {
  894. done(ep, req, 0);
  895. req = NULL;
  896. } else
  897. s = readl(&ep->regs->ep_stat);
  898. }
  899. /* don't NAK, let the fifo fill */
  900. if (req && (s & BIT(NAK_OUT_PACKETS)))
  901. writel(BIT(CLEAR_NAK_OUT_PACKETS),
  902. &ep->regs->ep_rsp);
  903. }
  904. }
  905. } else if (ep->dma) {
  906. int valid = 1;
  907. if (ep->is_in) {
  908. int expect;
  909. /* preventing magic zlps is per-engine state, not
  910. * per-transfer; irq logic must recover hiccups.
  911. */
  912. expect = likely(req->req.zero ||
  913. (req->req.length % ep->ep.maxpacket));
  914. if (expect != ep->in_fifo_validate)
  915. valid = 0;
  916. }
  917. queue_dma(ep, req, valid);
  918. } /* else the irq handler advances the queue. */
  919. ep->responded = 1;
  920. if (req)
  921. list_add_tail(&req->queue, &ep->queue);
  922. done:
  923. spin_unlock_irqrestore(&dev->lock, flags);
  924. /* pci writes may still be posted */
  925. return ret;
  926. print_err:
  927. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  928. return ret;
  929. }
  930. static inline void
  931. dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
  932. int status)
  933. {
  934. req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
  935. done(ep, req, status);
  936. }
  937. static void scan_dma_completions(struct net2280_ep *ep)
  938. {
  939. /* only look at descriptors that were "naturally" retired,
  940. * so fifo and list head state won't matter
  941. */
  942. while (!list_empty(&ep->queue)) {
  943. struct net2280_request *req;
  944. u32 tmp;
  945. req = list_entry(ep->queue.next,
  946. struct net2280_request, queue);
  947. if (!req->valid)
  948. break;
  949. rmb();
  950. tmp = le32_to_cpup(&req->td->dmacount);
  951. if ((tmp & BIT(VALID_BIT)) != 0)
  952. break;
  953. /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
  954. * cases where DMA must be aborted; this code handles
  955. * all non-abort DMA completions.
  956. */
  957. if (unlikely(req->td->dmadesc == 0)) {
  958. /* paranoia */
  959. tmp = readl(&ep->dma->dmacount);
  960. if (tmp & DMA_BYTE_COUNT_MASK)
  961. break;
  962. /* single transfer mode */
  963. dma_done(ep, req, tmp, 0);
  964. break;
  965. } else if (!ep->is_in &&
  966. (req->req.length % ep->ep.maxpacket) &&
  967. !(ep->dev->quirks & PLX_SUPERSPEED)) {
  968. tmp = readl(&ep->regs->ep_stat);
  969. /* AVOID TROUBLE HERE by not issuing short reads from
  970. * your gadget driver. That helps avoids errata 0121,
  971. * 0122, and 0124; not all cases trigger the warning.
  972. */
  973. if ((tmp & BIT(NAK_OUT_PACKETS)) == 0) {
  974. ep_warn(ep->dev, "%s lost packet sync!\n",
  975. ep->ep.name);
  976. req->req.status = -EOVERFLOW;
  977. } else {
  978. tmp = readl(&ep->regs->ep_avail);
  979. if (tmp) {
  980. /* fifo gets flushed later */
  981. ep->out_overflow = 1;
  982. ep_dbg(ep->dev,
  983. "%s dma, discard %d len %d\n",
  984. ep->ep.name, tmp,
  985. req->req.length);
  986. req->req.status = -EOVERFLOW;
  987. }
  988. }
  989. }
  990. dma_done(ep, req, tmp, 0);
  991. }
  992. }
  993. static void restart_dma(struct net2280_ep *ep)
  994. {
  995. struct net2280_request *req;
  996. if (ep->stopped)
  997. return;
  998. req = list_entry(ep->queue.next, struct net2280_request, queue);
  999. start_dma(ep, req);
  1000. }
  1001. static void abort_dma(struct net2280_ep *ep)
  1002. {
  1003. /* abort the current transfer */
  1004. if (likely(!list_empty(&ep->queue))) {
  1005. /* FIXME work around errata 0121, 0122, 0124 */
  1006. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1007. spin_stop_dma(ep->dma);
  1008. } else
  1009. stop_dma(ep->dma);
  1010. scan_dma_completions(ep);
  1011. }
  1012. /* dequeue ALL requests */
  1013. static void nuke(struct net2280_ep *ep)
  1014. {
  1015. struct net2280_request *req;
  1016. /* called with spinlock held */
  1017. ep->stopped = 1;
  1018. if (ep->dma)
  1019. abort_dma(ep);
  1020. while (!list_empty(&ep->queue)) {
  1021. req = list_entry(ep->queue.next,
  1022. struct net2280_request,
  1023. queue);
  1024. done(ep, req, -ESHUTDOWN);
  1025. }
  1026. }
  1027. /* dequeue JUST ONE request */
  1028. static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1029. {
  1030. struct net2280_ep *ep;
  1031. struct net2280_request *req;
  1032. unsigned long flags;
  1033. u32 dmactl;
  1034. int stopped;
  1035. ep = container_of(_ep, struct net2280_ep, ep);
  1036. if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
  1037. pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
  1038. __func__, _ep, _req);
  1039. return -EINVAL;
  1040. }
  1041. spin_lock_irqsave(&ep->dev->lock, flags);
  1042. stopped = ep->stopped;
  1043. /* quiesce dma while we patch the queue */
  1044. dmactl = 0;
  1045. ep->stopped = 1;
  1046. if (ep->dma) {
  1047. dmactl = readl(&ep->dma->dmactl);
  1048. /* WARNING erratum 0127 may kick in ... */
  1049. stop_dma(ep->dma);
  1050. scan_dma_completions(ep);
  1051. }
  1052. /* make sure it's still queued on this endpoint */
  1053. list_for_each_entry(req, &ep->queue, queue) {
  1054. if (&req->req == _req)
  1055. break;
  1056. }
  1057. if (&req->req != _req) {
  1058. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1059. dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n",
  1060. __func__);
  1061. return -EINVAL;
  1062. }
  1063. /* queue head may be partially complete. */
  1064. if (ep->queue.next == &req->queue) {
  1065. if (ep->dma) {
  1066. ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
  1067. _req->status = -ECONNRESET;
  1068. abort_dma(ep);
  1069. if (likely(ep->queue.next == &req->queue)) {
  1070. /* NOTE: misreports single-transfer mode*/
  1071. req->td->dmacount = 0; /* invalidate */
  1072. dma_done(ep, req,
  1073. readl(&ep->dma->dmacount),
  1074. -ECONNRESET);
  1075. }
  1076. } else {
  1077. ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
  1078. done(ep, req, -ECONNRESET);
  1079. }
  1080. req = NULL;
  1081. }
  1082. if (req)
  1083. done(ep, req, -ECONNRESET);
  1084. ep->stopped = stopped;
  1085. if (ep->dma) {
  1086. /* turn off dma on inactive queues */
  1087. if (list_empty(&ep->queue))
  1088. stop_dma(ep->dma);
  1089. else if (!ep->stopped) {
  1090. /* resume current request, or start new one */
  1091. if (req)
  1092. writel(dmactl, &ep->dma->dmactl);
  1093. else
  1094. start_dma(ep, list_entry(ep->queue.next,
  1095. struct net2280_request, queue));
  1096. }
  1097. }
  1098. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1099. return 0;
  1100. }
  1101. /*-------------------------------------------------------------------------*/
  1102. static int net2280_fifo_status(struct usb_ep *_ep);
  1103. static int
  1104. net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
  1105. {
  1106. struct net2280_ep *ep;
  1107. unsigned long flags;
  1108. int retval = 0;
  1109. ep = container_of(_ep, struct net2280_ep, ep);
  1110. if (!_ep || (!ep->desc && ep->num != 0)) {
  1111. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1112. return -EINVAL;
  1113. }
  1114. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1115. retval = -ESHUTDOWN;
  1116. goto print_err;
  1117. }
  1118. if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
  1119. == USB_ENDPOINT_XFER_ISOC) {
  1120. retval = -EINVAL;
  1121. goto print_err;
  1122. }
  1123. spin_lock_irqsave(&ep->dev->lock, flags);
  1124. if (!list_empty(&ep->queue)) {
  1125. retval = -EAGAIN;
  1126. goto print_unlock;
  1127. } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
  1128. retval = -EAGAIN;
  1129. goto print_unlock;
  1130. } else {
  1131. ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
  1132. value ? "set" : "clear",
  1133. wedged ? "wedge" : "halt");
  1134. /* set/clear, then synch memory views with the device */
  1135. if (value) {
  1136. if (ep->num == 0)
  1137. ep->dev->protocol_stall = 1;
  1138. else
  1139. set_halt(ep);
  1140. if (wedged)
  1141. ep->wedged = 1;
  1142. } else {
  1143. clear_halt(ep);
  1144. if (ep->dev->quirks & PLX_SUPERSPEED &&
  1145. !list_empty(&ep->queue) && ep->td_dma)
  1146. restart_dma(ep);
  1147. ep->wedged = 0;
  1148. }
  1149. (void) readl(&ep->regs->ep_rsp);
  1150. }
  1151. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1152. return retval;
  1153. print_unlock:
  1154. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1155. print_err:
  1156. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
  1157. return retval;
  1158. }
  1159. static int net2280_set_halt(struct usb_ep *_ep, int value)
  1160. {
  1161. return net2280_set_halt_and_wedge(_ep, value, 0);
  1162. }
  1163. static int net2280_set_wedge(struct usb_ep *_ep)
  1164. {
  1165. if (!_ep || _ep->name == ep0name) {
  1166. pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
  1167. return -EINVAL;
  1168. }
  1169. return net2280_set_halt_and_wedge(_ep, 1, 1);
  1170. }
  1171. static int net2280_fifo_status(struct usb_ep *_ep)
  1172. {
  1173. struct net2280_ep *ep;
  1174. u32 avail;
  1175. ep = container_of(_ep, struct net2280_ep, ep);
  1176. if (!_ep || (!ep->desc && ep->num != 0)) {
  1177. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1178. return -ENODEV;
  1179. }
  1180. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1181. dev_err(&ep->dev->pdev->dev,
  1182. "%s: Invalid driver=%p or speed=%d\n",
  1183. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1184. return -ESHUTDOWN;
  1185. }
  1186. avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
  1187. if (avail > ep->fifo_size) {
  1188. dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
  1189. return -EOVERFLOW;
  1190. }
  1191. if (ep->is_in)
  1192. avail = ep->fifo_size - avail;
  1193. return avail;
  1194. }
  1195. static void net2280_fifo_flush(struct usb_ep *_ep)
  1196. {
  1197. struct net2280_ep *ep;
  1198. ep = container_of(_ep, struct net2280_ep, ep);
  1199. if (!_ep || (!ep->desc && ep->num != 0)) {
  1200. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1201. return;
  1202. }
  1203. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1204. dev_err(&ep->dev->pdev->dev,
  1205. "%s: Invalid driver=%p or speed=%d\n",
  1206. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1207. return;
  1208. }
  1209. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  1210. (void) readl(&ep->regs->ep_rsp);
  1211. }
  1212. static const struct usb_ep_ops net2280_ep_ops = {
  1213. .enable = net2280_enable,
  1214. .disable = net2280_disable,
  1215. .alloc_request = net2280_alloc_request,
  1216. .free_request = net2280_free_request,
  1217. .queue = net2280_queue,
  1218. .dequeue = net2280_dequeue,
  1219. .set_halt = net2280_set_halt,
  1220. .set_wedge = net2280_set_wedge,
  1221. .fifo_status = net2280_fifo_status,
  1222. .fifo_flush = net2280_fifo_flush,
  1223. };
  1224. /*-------------------------------------------------------------------------*/
  1225. static int net2280_get_frame(struct usb_gadget *_gadget)
  1226. {
  1227. struct net2280 *dev;
  1228. unsigned long flags;
  1229. u16 retval;
  1230. if (!_gadget)
  1231. return -ENODEV;
  1232. dev = container_of(_gadget, struct net2280, gadget);
  1233. spin_lock_irqsave(&dev->lock, flags);
  1234. retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
  1235. spin_unlock_irqrestore(&dev->lock, flags);
  1236. return retval;
  1237. }
  1238. static int net2280_wakeup(struct usb_gadget *_gadget)
  1239. {
  1240. struct net2280 *dev;
  1241. u32 tmp;
  1242. unsigned long flags;
  1243. if (!_gadget)
  1244. return 0;
  1245. dev = container_of(_gadget, struct net2280, gadget);
  1246. spin_lock_irqsave(&dev->lock, flags);
  1247. tmp = readl(&dev->usb->usbctl);
  1248. if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
  1249. writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
  1250. spin_unlock_irqrestore(&dev->lock, flags);
  1251. /* pci writes may still be posted */
  1252. return 0;
  1253. }
  1254. static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
  1255. {
  1256. struct net2280 *dev;
  1257. u32 tmp;
  1258. unsigned long flags;
  1259. if (!_gadget)
  1260. return 0;
  1261. dev = container_of(_gadget, struct net2280, gadget);
  1262. spin_lock_irqsave(&dev->lock, flags);
  1263. tmp = readl(&dev->usb->usbctl);
  1264. if (value) {
  1265. tmp |= BIT(SELF_POWERED_STATUS);
  1266. _gadget->is_selfpowered = 1;
  1267. } else {
  1268. tmp &= ~BIT(SELF_POWERED_STATUS);
  1269. _gadget->is_selfpowered = 0;
  1270. }
  1271. writel(tmp, &dev->usb->usbctl);
  1272. spin_unlock_irqrestore(&dev->lock, flags);
  1273. return 0;
  1274. }
  1275. static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
  1276. {
  1277. struct net2280 *dev;
  1278. u32 tmp;
  1279. unsigned long flags;
  1280. if (!_gadget)
  1281. return -ENODEV;
  1282. dev = container_of(_gadget, struct net2280, gadget);
  1283. spin_lock_irqsave(&dev->lock, flags);
  1284. tmp = readl(&dev->usb->usbctl);
  1285. dev->softconnect = (is_on != 0);
  1286. if (is_on) {
  1287. ep0_start(dev);
  1288. writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1289. } else {
  1290. writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1291. stop_activity(dev, dev->driver);
  1292. }
  1293. spin_unlock_irqrestore(&dev->lock, flags);
  1294. return 0;
  1295. }
  1296. static int net2280_start(struct usb_gadget *_gadget,
  1297. struct usb_gadget_driver *driver);
  1298. static int net2280_stop(struct usb_gadget *_gadget);
  1299. static const struct usb_gadget_ops net2280_ops = {
  1300. .get_frame = net2280_get_frame,
  1301. .wakeup = net2280_wakeup,
  1302. .set_selfpowered = net2280_set_selfpowered,
  1303. .pullup = net2280_pullup,
  1304. .udc_start = net2280_start,
  1305. .udc_stop = net2280_stop,
  1306. };
  1307. /*-------------------------------------------------------------------------*/
  1308. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  1309. /* FIXME move these into procfs, and use seq_file.
  1310. * Sysfs _still_ doesn't behave for arbitrarily sized files,
  1311. * and also doesn't help products using this with 2.4 kernels.
  1312. */
  1313. /* "function" sysfs attribute */
  1314. static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
  1315. char *buf)
  1316. {
  1317. struct net2280 *dev = dev_get_drvdata(_dev);
  1318. if (!dev->driver || !dev->driver->function ||
  1319. strlen(dev->driver->function) > PAGE_SIZE)
  1320. return 0;
  1321. return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
  1322. }
  1323. static DEVICE_ATTR_RO(function);
  1324. static ssize_t registers_show(struct device *_dev,
  1325. struct device_attribute *attr, char *buf)
  1326. {
  1327. struct net2280 *dev;
  1328. char *next;
  1329. unsigned size, t;
  1330. unsigned long flags;
  1331. int i;
  1332. u32 t1, t2;
  1333. const char *s;
  1334. dev = dev_get_drvdata(_dev);
  1335. next = buf;
  1336. size = PAGE_SIZE;
  1337. spin_lock_irqsave(&dev->lock, flags);
  1338. if (dev->driver)
  1339. s = dev->driver->driver.name;
  1340. else
  1341. s = "(none)";
  1342. /* Main Control Registers */
  1343. t = scnprintf(next, size, "%s version " DRIVER_VERSION
  1344. ", chiprev %04x\n\n"
  1345. "devinit %03x fifoctl %08x gadget '%s'\n"
  1346. "pci irqenb0 %02x irqenb1 %08x "
  1347. "irqstat0 %04x irqstat1 %08x\n",
  1348. driver_name, dev->chiprev,
  1349. readl(&dev->regs->devinit),
  1350. readl(&dev->regs->fifoctl),
  1351. s,
  1352. readl(&dev->regs->pciirqenb0),
  1353. readl(&dev->regs->pciirqenb1),
  1354. readl(&dev->regs->irqstat0),
  1355. readl(&dev->regs->irqstat1));
  1356. size -= t;
  1357. next += t;
  1358. /* USB Control Registers */
  1359. t1 = readl(&dev->usb->usbctl);
  1360. t2 = readl(&dev->usb->usbstat);
  1361. if (t1 & BIT(VBUS_PIN)) {
  1362. if (t2 & BIT(HIGH_SPEED))
  1363. s = "high speed";
  1364. else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1365. s = "powered";
  1366. else
  1367. s = "full speed";
  1368. /* full speed bit (6) not working?? */
  1369. } else
  1370. s = "not attached";
  1371. t = scnprintf(next, size,
  1372. "stdrsp %08x usbctl %08x usbstat %08x "
  1373. "addr 0x%02x (%s)\n",
  1374. readl(&dev->usb->stdrsp), t1, t2,
  1375. readl(&dev->usb->ouraddr), s);
  1376. size -= t;
  1377. next += t;
  1378. /* PCI Master Control Registers */
  1379. /* DMA Control Registers */
  1380. /* Configurable EP Control Registers */
  1381. for (i = 0; i < dev->n_ep; i++) {
  1382. struct net2280_ep *ep;
  1383. ep = &dev->ep[i];
  1384. if (i && !ep->desc)
  1385. continue;
  1386. t1 = readl(&ep->cfg->ep_cfg);
  1387. t2 = readl(&ep->regs->ep_rsp) & 0xff;
  1388. t = scnprintf(next, size,
  1389. "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
  1390. "irqenb %02x\n",
  1391. ep->ep.name, t1, t2,
  1392. (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
  1393. ? "NAK " : "",
  1394. (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
  1395. ? "hide " : "",
  1396. (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
  1397. ? "CRC " : "",
  1398. (t2 & BIT(CLEAR_INTERRUPT_MODE))
  1399. ? "interrupt " : "",
  1400. (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
  1401. ? "status " : "",
  1402. (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
  1403. ? "NAKmode " : "",
  1404. (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
  1405. ? "DATA1 " : "DATA0 ",
  1406. (t2 & BIT(CLEAR_ENDPOINT_HALT))
  1407. ? "HALT " : "",
  1408. readl(&ep->regs->ep_irqenb));
  1409. size -= t;
  1410. next += t;
  1411. t = scnprintf(next, size,
  1412. "\tstat %08x avail %04x "
  1413. "(ep%d%s-%s)%s\n",
  1414. readl(&ep->regs->ep_stat),
  1415. readl(&ep->regs->ep_avail),
  1416. t1 & 0x0f, DIR_STRING(t1),
  1417. type_string(t1 >> 8),
  1418. ep->stopped ? "*" : "");
  1419. size -= t;
  1420. next += t;
  1421. if (!ep->dma)
  1422. continue;
  1423. t = scnprintf(next, size,
  1424. " dma\tctl %08x stat %08x count %08x\n"
  1425. "\taddr %08x desc %08x\n",
  1426. readl(&ep->dma->dmactl),
  1427. readl(&ep->dma->dmastat),
  1428. readl(&ep->dma->dmacount),
  1429. readl(&ep->dma->dmaaddr),
  1430. readl(&ep->dma->dmadesc));
  1431. size -= t;
  1432. next += t;
  1433. }
  1434. /* Indexed Registers (none yet) */
  1435. /* Statistics */
  1436. t = scnprintf(next, size, "\nirqs: ");
  1437. size -= t;
  1438. next += t;
  1439. for (i = 0; i < dev->n_ep; i++) {
  1440. struct net2280_ep *ep;
  1441. ep = &dev->ep[i];
  1442. if (i && !ep->irqs)
  1443. continue;
  1444. t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
  1445. size -= t;
  1446. next += t;
  1447. }
  1448. t = scnprintf(next, size, "\n");
  1449. size -= t;
  1450. next += t;
  1451. spin_unlock_irqrestore(&dev->lock, flags);
  1452. return PAGE_SIZE - size;
  1453. }
  1454. static DEVICE_ATTR_RO(registers);
  1455. static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
  1456. char *buf)
  1457. {
  1458. struct net2280 *dev;
  1459. char *next;
  1460. unsigned size;
  1461. unsigned long flags;
  1462. int i;
  1463. dev = dev_get_drvdata(_dev);
  1464. next = buf;
  1465. size = PAGE_SIZE;
  1466. spin_lock_irqsave(&dev->lock, flags);
  1467. for (i = 0; i < dev->n_ep; i++) {
  1468. struct net2280_ep *ep = &dev->ep[i];
  1469. struct net2280_request *req;
  1470. int t;
  1471. if (i != 0) {
  1472. const struct usb_endpoint_descriptor *d;
  1473. d = ep->desc;
  1474. if (!d)
  1475. continue;
  1476. t = d->bEndpointAddress;
  1477. t = scnprintf(next, size,
  1478. "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
  1479. ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
  1480. (t & USB_DIR_IN) ? "in" : "out",
  1481. type_string(d->bmAttributes),
  1482. usb_endpoint_maxp(d) & 0x1fff,
  1483. ep->dma ? "dma" : "pio", ep->fifo_size
  1484. );
  1485. } else /* ep0 should only have one transfer queued */
  1486. t = scnprintf(next, size, "ep0 max 64 pio %s\n",
  1487. ep->is_in ? "in" : "out");
  1488. if (t <= 0 || t > size)
  1489. goto done;
  1490. size -= t;
  1491. next += t;
  1492. if (list_empty(&ep->queue)) {
  1493. t = scnprintf(next, size, "\t(nothing queued)\n");
  1494. if (t <= 0 || t > size)
  1495. goto done;
  1496. size -= t;
  1497. next += t;
  1498. continue;
  1499. }
  1500. list_for_each_entry(req, &ep->queue, queue) {
  1501. if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
  1502. t = scnprintf(next, size,
  1503. "\treq %p len %d/%d "
  1504. "buf %p (dmacount %08x)\n",
  1505. &req->req, req->req.actual,
  1506. req->req.length, req->req.buf,
  1507. readl(&ep->dma->dmacount));
  1508. else
  1509. t = scnprintf(next, size,
  1510. "\treq %p len %d/%d buf %p\n",
  1511. &req->req, req->req.actual,
  1512. req->req.length, req->req.buf);
  1513. if (t <= 0 || t > size)
  1514. goto done;
  1515. size -= t;
  1516. next += t;
  1517. if (ep->dma) {
  1518. struct net2280_dma *td;
  1519. td = req->td;
  1520. t = scnprintf(next, size, "\t td %08x "
  1521. " count %08x buf %08x desc %08x\n",
  1522. (u32) req->td_dma,
  1523. le32_to_cpu(td->dmacount),
  1524. le32_to_cpu(td->dmaaddr),
  1525. le32_to_cpu(td->dmadesc));
  1526. if (t <= 0 || t > size)
  1527. goto done;
  1528. size -= t;
  1529. next += t;
  1530. }
  1531. }
  1532. }
  1533. done:
  1534. spin_unlock_irqrestore(&dev->lock, flags);
  1535. return PAGE_SIZE - size;
  1536. }
  1537. static DEVICE_ATTR_RO(queues);
  1538. #else
  1539. #define device_create_file(a, b) (0)
  1540. #define device_remove_file(a, b) do { } while (0)
  1541. #endif
  1542. /*-------------------------------------------------------------------------*/
  1543. /* another driver-specific mode might be a request type doing dma
  1544. * to/from another device fifo instead of to/from memory.
  1545. */
  1546. static void set_fifo_mode(struct net2280 *dev, int mode)
  1547. {
  1548. /* keeping high bits preserves BAR2 */
  1549. writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
  1550. /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
  1551. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1552. list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
  1553. list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
  1554. switch (mode) {
  1555. case 0:
  1556. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1557. list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
  1558. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
  1559. break;
  1560. case 1:
  1561. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
  1562. break;
  1563. case 2:
  1564. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1565. dev->ep[1].fifo_size = 2048;
  1566. dev->ep[2].fifo_size = 1024;
  1567. break;
  1568. }
  1569. /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
  1570. list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
  1571. list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
  1572. }
  1573. static void defect7374_disable_data_eps(struct net2280 *dev)
  1574. {
  1575. /*
  1576. * For Defect 7374, disable data EPs (and more):
  1577. * - This phase undoes the earlier phase of the Defect 7374 workaround,
  1578. * returing ep regs back to normal.
  1579. */
  1580. struct net2280_ep *ep;
  1581. int i;
  1582. unsigned char ep_sel;
  1583. u32 tmp_reg;
  1584. for (i = 1; i < 5; i++) {
  1585. ep = &dev->ep[i];
  1586. writel(0, &ep->cfg->ep_cfg);
  1587. }
  1588. /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
  1589. for (i = 0; i < 6; i++)
  1590. writel(0, &dev->dep[i].dep_cfg);
  1591. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1592. /* Select an endpoint for subsequent operations: */
  1593. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1594. writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
  1595. if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
  1596. ep_sel == 18 || ep_sel == 20)
  1597. continue;
  1598. /* Change settings on some selected endpoints */
  1599. tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
  1600. tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
  1601. writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
  1602. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1603. tmp_reg |= BIT(EP_INITIALIZED);
  1604. writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
  1605. }
  1606. }
  1607. static void defect7374_enable_data_eps_zero(struct net2280 *dev)
  1608. {
  1609. u32 tmp = 0, tmp_reg;
  1610. u32 scratch;
  1611. int i;
  1612. unsigned char ep_sel;
  1613. scratch = get_idx_reg(dev->regs, SCRATCH);
  1614. WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
  1615. == DEFECT7374_FSM_SS_CONTROL_READ);
  1616. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  1617. ep_warn(dev, "Operate Defect 7374 workaround soft this time");
  1618. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1619. /*GPEPs:*/
  1620. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
  1621. (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
  1622. ((dev->enhanced_mode) ?
  1623. BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
  1624. BIT(ENDPOINT_ENABLE)));
  1625. for (i = 1; i < 5; i++)
  1626. writel(tmp, &dev->ep[i].cfg->ep_cfg);
  1627. /* CSRIN, PCIIN, STATIN, RCIN*/
  1628. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
  1629. writel(tmp, &dev->dep[1].dep_cfg);
  1630. writel(tmp, &dev->dep[3].dep_cfg);
  1631. writel(tmp, &dev->dep[4].dep_cfg);
  1632. writel(tmp, &dev->dep[5].dep_cfg);
  1633. /*Implemented for development and debug.
  1634. * Can be refined/tuned later.*/
  1635. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1636. /* Select an endpoint for subsequent operations: */
  1637. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1638. writel(((tmp_reg & ~0x1f) | ep_sel),
  1639. &dev->plregs->pl_ep_ctrl);
  1640. if (ep_sel == 1) {
  1641. tmp =
  1642. (readl(&dev->plregs->pl_ep_ctrl) |
  1643. BIT(CLEAR_ACK_ERROR_CODE) | 0);
  1644. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1645. continue;
  1646. }
  1647. if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
  1648. ep_sel == 18 || ep_sel == 20)
  1649. continue;
  1650. tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
  1651. BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
  1652. writel(tmp, &dev->plregs->pl_ep_cfg_4);
  1653. tmp = readl(&dev->plregs->pl_ep_ctrl) &
  1654. ~BIT(EP_INITIALIZED);
  1655. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1656. }
  1657. /* Set FSM to focus on the first Control Read:
  1658. * - Tip: Connection speed is known upon the first
  1659. * setup request.*/
  1660. scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
  1661. set_idx_reg(dev->regs, SCRATCH, scratch);
  1662. }
  1663. /* keeping it simple:
  1664. * - one bus driver, initted first;
  1665. * - one function driver, initted second
  1666. *
  1667. * most of the work to support multiple net2280 controllers would
  1668. * be to associate this gadget driver (yes?) with all of them, or
  1669. * perhaps to bind specific drivers to specific devices.
  1670. */
  1671. static void usb_reset_228x(struct net2280 *dev)
  1672. {
  1673. u32 tmp;
  1674. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1675. (void) readl(&dev->usb->usbctl);
  1676. net2280_led_init(dev);
  1677. /* disable automatic responses, and irqs */
  1678. writel(0, &dev->usb->stdrsp);
  1679. writel(0, &dev->regs->pciirqenb0);
  1680. writel(0, &dev->regs->pciirqenb1);
  1681. /* clear old dma and irq state */
  1682. for (tmp = 0; tmp < 4; tmp++) {
  1683. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1684. if (ep->dma)
  1685. abort_dma(ep);
  1686. }
  1687. writel(~0, &dev->regs->irqstat0),
  1688. writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
  1689. /* reset, and enable pci */
  1690. tmp = readl(&dev->regs->devinit) |
  1691. BIT(PCI_ENABLE) |
  1692. BIT(FIFO_SOFT_RESET) |
  1693. BIT(USB_SOFT_RESET) |
  1694. BIT(M8051_RESET);
  1695. writel(tmp, &dev->regs->devinit);
  1696. /* standard fifo and endpoint allocations */
  1697. set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
  1698. }
  1699. static void usb_reset_338x(struct net2280 *dev)
  1700. {
  1701. u32 tmp;
  1702. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1703. (void)readl(&dev->usb->usbctl);
  1704. net2280_led_init(dev);
  1705. if (dev->bug7734_patched) {
  1706. /* disable automatic responses, and irqs */
  1707. writel(0, &dev->usb->stdrsp);
  1708. writel(0, &dev->regs->pciirqenb0);
  1709. writel(0, &dev->regs->pciirqenb1);
  1710. }
  1711. /* clear old dma and irq state */
  1712. for (tmp = 0; tmp < 4; tmp++) {
  1713. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1714. struct net2280_dma_regs __iomem *dma;
  1715. if (ep->dma) {
  1716. abort_dma(ep);
  1717. } else {
  1718. dma = &dev->dma[tmp];
  1719. writel(BIT(DMA_ABORT), &dma->dmastat);
  1720. writel(0, &dma->dmactl);
  1721. }
  1722. }
  1723. writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
  1724. if (dev->bug7734_patched) {
  1725. /* reset, and enable pci */
  1726. tmp = readl(&dev->regs->devinit) |
  1727. BIT(PCI_ENABLE) |
  1728. BIT(FIFO_SOFT_RESET) |
  1729. BIT(USB_SOFT_RESET) |
  1730. BIT(M8051_RESET);
  1731. writel(tmp, &dev->regs->devinit);
  1732. }
  1733. /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
  1734. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1735. for (tmp = 1; tmp < dev->n_ep; tmp++)
  1736. list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
  1737. }
  1738. static void usb_reset(struct net2280 *dev)
  1739. {
  1740. if (dev->quirks & PLX_LEGACY)
  1741. return usb_reset_228x(dev);
  1742. return usb_reset_338x(dev);
  1743. }
  1744. static void usb_reinit_228x(struct net2280 *dev)
  1745. {
  1746. u32 tmp;
  1747. /* basic endpoint init */
  1748. for (tmp = 0; tmp < 7; tmp++) {
  1749. struct net2280_ep *ep = &dev->ep[tmp];
  1750. ep->ep.name = ep_name[tmp];
  1751. ep->dev = dev;
  1752. ep->num = tmp;
  1753. if (tmp > 0 && tmp <= 4) {
  1754. ep->fifo_size = 1024;
  1755. ep->dma = &dev->dma[tmp - 1];
  1756. } else
  1757. ep->fifo_size = 64;
  1758. ep->regs = &dev->epregs[tmp];
  1759. ep->cfg = &dev->epregs[tmp];
  1760. ep_reset_228x(dev->regs, ep);
  1761. }
  1762. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
  1763. usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
  1764. usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
  1765. dev->gadget.ep0 = &dev->ep[0].ep;
  1766. dev->ep[0].stopped = 0;
  1767. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1768. /* we want to prevent lowlevel/insecure access from the USB host,
  1769. * but erratum 0119 means this enable bit is ignored
  1770. */
  1771. for (tmp = 0; tmp < 5; tmp++)
  1772. writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
  1773. }
  1774. static void usb_reinit_338x(struct net2280 *dev)
  1775. {
  1776. int i;
  1777. u32 tmp, val;
  1778. static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
  1779. static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
  1780. 0x00, 0xC0, 0x00, 0xC0 };
  1781. /* basic endpoint init */
  1782. for (i = 0; i < dev->n_ep; i++) {
  1783. struct net2280_ep *ep = &dev->ep[i];
  1784. ep->ep.name = dev->enhanced_mode ? ep_name_adv[i] : ep_name[i];
  1785. ep->dev = dev;
  1786. ep->num = i;
  1787. if (i > 0 && i <= 4)
  1788. ep->dma = &dev->dma[i - 1];
  1789. if (dev->enhanced_mode) {
  1790. ep->cfg = &dev->epregs[ne[i]];
  1791. /*
  1792. * Set USB endpoint number, hardware allows same number
  1793. * in both directions.
  1794. */
  1795. if (i > 0 && i < 5)
  1796. writel(ne[i], &ep->cfg->ep_cfg);
  1797. ep->regs = (struct net2280_ep_regs __iomem *)
  1798. (((void __iomem *)&dev->epregs[ne[i]]) +
  1799. ep_reg_addr[i]);
  1800. } else {
  1801. ep->cfg = &dev->epregs[i];
  1802. ep->regs = &dev->epregs[i];
  1803. }
  1804. ep->fifo_size = (i != 0) ? 2048 : 512;
  1805. ep_reset_338x(dev->regs, ep);
  1806. }
  1807. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
  1808. dev->gadget.ep0 = &dev->ep[0].ep;
  1809. dev->ep[0].stopped = 0;
  1810. /* Link layer set up */
  1811. if (dev->bug7734_patched) {
  1812. tmp = readl(&dev->usb_ext->usbctl2) &
  1813. ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
  1814. writel(tmp, &dev->usb_ext->usbctl2);
  1815. }
  1816. /* Hardware Defect and Workaround */
  1817. val = readl(&dev->ll_lfps_regs->ll_lfps_5);
  1818. val &= ~(0xf << TIMER_LFPS_6US);
  1819. val |= 0x5 << TIMER_LFPS_6US;
  1820. writel(val, &dev->ll_lfps_regs->ll_lfps_5);
  1821. val = readl(&dev->ll_lfps_regs->ll_lfps_6);
  1822. val &= ~(0xffff << TIMER_LFPS_80US);
  1823. val |= 0x0100 << TIMER_LFPS_80US;
  1824. writel(val, &dev->ll_lfps_regs->ll_lfps_6);
  1825. /*
  1826. * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
  1827. * Hot Reset Exit Handshake may Fail in Specific Case using
  1828. * Default Register Settings. Workaround for Enumeration test.
  1829. */
  1830. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
  1831. val &= ~(0x1f << HOT_TX_NORESET_TS2);
  1832. val |= 0x10 << HOT_TX_NORESET_TS2;
  1833. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
  1834. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
  1835. val &= ~(0x1f << HOT_RX_RESET_TS2);
  1836. val |= 0x3 << HOT_RX_RESET_TS2;
  1837. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
  1838. /*
  1839. * Set Recovery Idle to Recover bit:
  1840. * - On SS connections, setting Recovery Idle to Recover Fmw improves
  1841. * link robustness with various hosts and hubs.
  1842. * - It is safe to set for all connection speeds; all chip revisions.
  1843. * - R-M-W to leave other bits undisturbed.
  1844. * - Reference PLX TT-7372
  1845. */
  1846. val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1847. val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
  1848. writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1849. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1850. /* disable dedicated endpoints */
  1851. writel(0x0D, &dev->dep[0].dep_cfg);
  1852. writel(0x0D, &dev->dep[1].dep_cfg);
  1853. writel(0x0E, &dev->dep[2].dep_cfg);
  1854. writel(0x0E, &dev->dep[3].dep_cfg);
  1855. writel(0x0F, &dev->dep[4].dep_cfg);
  1856. writel(0x0C, &dev->dep[5].dep_cfg);
  1857. }
  1858. static void usb_reinit(struct net2280 *dev)
  1859. {
  1860. if (dev->quirks & PLX_LEGACY)
  1861. return usb_reinit_228x(dev);
  1862. return usb_reinit_338x(dev);
  1863. }
  1864. static void ep0_start_228x(struct net2280 *dev)
  1865. {
  1866. writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  1867. BIT(CLEAR_NAK_OUT_PACKETS) |
  1868. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  1869. &dev->epregs[0].ep_rsp);
  1870. /*
  1871. * hardware optionally handles a bunch of standard requests
  1872. * that the API hides from drivers anyway. have it do so.
  1873. * endpoint status/features are handled in software, to
  1874. * help pass tests for some dubious behavior.
  1875. */
  1876. writel(BIT(SET_TEST_MODE) |
  1877. BIT(SET_ADDRESS) |
  1878. BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
  1879. BIT(GET_DEVICE_STATUS) |
  1880. BIT(GET_INTERFACE_STATUS),
  1881. &dev->usb->stdrsp);
  1882. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1883. BIT(SELF_POWERED_USB_DEVICE) |
  1884. BIT(REMOTE_WAKEUP_SUPPORT) |
  1885. (dev->softconnect << USB_DETECT_ENABLE) |
  1886. BIT(SELF_POWERED_STATUS),
  1887. &dev->usb->usbctl);
  1888. /* enable irqs so we can see ep0 and general operation */
  1889. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1890. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1891. &dev->regs->pciirqenb0);
  1892. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1893. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1894. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1895. BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
  1896. BIT(VBUS_INTERRUPT_ENABLE) |
  1897. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  1898. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
  1899. &dev->regs->pciirqenb1);
  1900. /* don't leave any writes posted */
  1901. (void) readl(&dev->usb->usbctl);
  1902. }
  1903. static void ep0_start_338x(struct net2280 *dev)
  1904. {
  1905. if (dev->bug7734_patched)
  1906. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  1907. BIT(SET_EP_HIDE_STATUS_PHASE),
  1908. &dev->epregs[0].ep_rsp);
  1909. /*
  1910. * hardware optionally handles a bunch of standard requests
  1911. * that the API hides from drivers anyway. have it do so.
  1912. * endpoint status/features are handled in software, to
  1913. * help pass tests for some dubious behavior.
  1914. */
  1915. writel(BIT(SET_ISOCHRONOUS_DELAY) |
  1916. BIT(SET_SEL) |
  1917. BIT(SET_TEST_MODE) |
  1918. BIT(SET_ADDRESS) |
  1919. BIT(GET_INTERFACE_STATUS) |
  1920. BIT(GET_DEVICE_STATUS),
  1921. &dev->usb->stdrsp);
  1922. dev->wakeup_enable = 1;
  1923. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1924. (dev->softconnect << USB_DETECT_ENABLE) |
  1925. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  1926. &dev->usb->usbctl);
  1927. /* enable irqs so we can see ep0 and general operation */
  1928. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1929. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1930. &dev->regs->pciirqenb0);
  1931. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1932. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  1933. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
  1934. BIT(VBUS_INTERRUPT_ENABLE),
  1935. &dev->regs->pciirqenb1);
  1936. /* don't leave any writes posted */
  1937. (void)readl(&dev->usb->usbctl);
  1938. }
  1939. static void ep0_start(struct net2280 *dev)
  1940. {
  1941. if (dev->quirks & PLX_LEGACY)
  1942. return ep0_start_228x(dev);
  1943. return ep0_start_338x(dev);
  1944. }
  1945. /* when a driver is successfully registered, it will receive
  1946. * control requests including set_configuration(), which enables
  1947. * non-control requests. then usb traffic follows until a
  1948. * disconnect is reported. then a host may connect again, or
  1949. * the driver might get unbound.
  1950. */
  1951. static int net2280_start(struct usb_gadget *_gadget,
  1952. struct usb_gadget_driver *driver)
  1953. {
  1954. struct net2280 *dev;
  1955. int retval;
  1956. unsigned i;
  1957. /* insist on high speed support from the driver, since
  1958. * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
  1959. * "must not be used in normal operation"
  1960. */
  1961. if (!driver || driver->max_speed < USB_SPEED_HIGH ||
  1962. !driver->setup)
  1963. return -EINVAL;
  1964. dev = container_of(_gadget, struct net2280, gadget);
  1965. for (i = 0; i < dev->n_ep; i++)
  1966. dev->ep[i].irqs = 0;
  1967. /* hook up the driver ... */
  1968. driver->driver.bus = NULL;
  1969. dev->driver = driver;
  1970. retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
  1971. if (retval)
  1972. goto err_unbind;
  1973. retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
  1974. if (retval)
  1975. goto err_func;
  1976. /* enable host detection and ep0; and we're ready
  1977. * for set_configuration as well as eventual disconnect.
  1978. */
  1979. net2280_led_active(dev, 1);
  1980. if ((dev->quirks & PLX_SUPERSPEED) && !dev->bug7734_patched)
  1981. defect7374_enable_data_eps_zero(dev);
  1982. ep0_start(dev);
  1983. /* pci writes may still be posted */
  1984. return 0;
  1985. err_func:
  1986. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  1987. err_unbind:
  1988. dev->driver = NULL;
  1989. return retval;
  1990. }
  1991. static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
  1992. {
  1993. int i;
  1994. /* don't disconnect if it's not connected */
  1995. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1996. driver = NULL;
  1997. /* stop hardware; prevent new request submissions;
  1998. * and kill any outstanding requests.
  1999. */
  2000. usb_reset(dev);
  2001. for (i = 0; i < dev->n_ep; i++)
  2002. nuke(&dev->ep[i]);
  2003. /* report disconnect; the driver is already quiesced */
  2004. if (driver) {
  2005. spin_unlock(&dev->lock);
  2006. driver->disconnect(&dev->gadget);
  2007. spin_lock(&dev->lock);
  2008. }
  2009. usb_reinit(dev);
  2010. }
  2011. static int net2280_stop(struct usb_gadget *_gadget)
  2012. {
  2013. struct net2280 *dev;
  2014. unsigned long flags;
  2015. dev = container_of(_gadget, struct net2280, gadget);
  2016. spin_lock_irqsave(&dev->lock, flags);
  2017. stop_activity(dev, NULL);
  2018. spin_unlock_irqrestore(&dev->lock, flags);
  2019. net2280_led_active(dev, 0);
  2020. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2021. device_remove_file(&dev->pdev->dev, &dev_attr_queues);
  2022. dev->driver = NULL;
  2023. return 0;
  2024. }
  2025. /*-------------------------------------------------------------------------*/
  2026. /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
  2027. * also works for dma-capable endpoints, in pio mode or just
  2028. * to manually advance the queue after short OUT transfers.
  2029. */
  2030. static void handle_ep_small(struct net2280_ep *ep)
  2031. {
  2032. struct net2280_request *req;
  2033. u32 t;
  2034. /* 0 error, 1 mid-data, 2 done */
  2035. int mode = 1;
  2036. if (!list_empty(&ep->queue))
  2037. req = list_entry(ep->queue.next,
  2038. struct net2280_request, queue);
  2039. else
  2040. req = NULL;
  2041. /* ack all, and handle what we care about */
  2042. t = readl(&ep->regs->ep_stat);
  2043. ep->irqs++;
  2044. ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
  2045. ep->ep.name, t, req ? &req->req : NULL);
  2046. if (!ep->is_in || (ep->dev->quirks & PLX_2280))
  2047. writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
  2048. else
  2049. /* Added for 2282 */
  2050. writel(t, &ep->regs->ep_stat);
  2051. /* for ep0, monitor token irqs to catch data stage length errors
  2052. * and to synchronize on status.
  2053. *
  2054. * also, to defer reporting of protocol stalls ... here's where
  2055. * data or status first appears, handling stalls here should never
  2056. * cause trouble on the host side..
  2057. *
  2058. * control requests could be slightly faster without token synch for
  2059. * status, but status can jam up that way.
  2060. */
  2061. if (unlikely(ep->num == 0)) {
  2062. if (ep->is_in) {
  2063. /* status; stop NAKing */
  2064. if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
  2065. if (ep->dev->protocol_stall) {
  2066. ep->stopped = 1;
  2067. set_halt(ep);
  2068. }
  2069. if (!req)
  2070. allow_status(ep);
  2071. mode = 2;
  2072. /* reply to extra IN data tokens with a zlp */
  2073. } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2074. if (ep->dev->protocol_stall) {
  2075. ep->stopped = 1;
  2076. set_halt(ep);
  2077. mode = 2;
  2078. } else if (ep->responded &&
  2079. !req && !ep->stopped)
  2080. write_fifo(ep, NULL);
  2081. }
  2082. } else {
  2083. /* status; stop NAKing */
  2084. if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2085. if (ep->dev->protocol_stall) {
  2086. ep->stopped = 1;
  2087. set_halt(ep);
  2088. }
  2089. mode = 2;
  2090. /* an extra OUT token is an error */
  2091. } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
  2092. req &&
  2093. req->req.actual == req->req.length) ||
  2094. (ep->responded && !req)) {
  2095. ep->dev->protocol_stall = 1;
  2096. set_halt(ep);
  2097. ep->stopped = 1;
  2098. if (req)
  2099. done(ep, req, -EOVERFLOW);
  2100. req = NULL;
  2101. }
  2102. }
  2103. }
  2104. if (unlikely(!req))
  2105. return;
  2106. /* manual DMA queue advance after short OUT */
  2107. if (likely(ep->dma)) {
  2108. if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
  2109. u32 count;
  2110. int stopped = ep->stopped;
  2111. /* TRANSFERRED works around OUT_DONE erratum 0112.
  2112. * we expect (N <= maxpacket) bytes; host wrote M.
  2113. * iff (M < N) we won't ever see a DMA interrupt.
  2114. */
  2115. ep->stopped = 1;
  2116. for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
  2117. /* any preceding dma transfers must finish.
  2118. * dma handles (M >= N), may empty the queue
  2119. */
  2120. scan_dma_completions(ep);
  2121. if (unlikely(list_empty(&ep->queue) ||
  2122. ep->out_overflow)) {
  2123. req = NULL;
  2124. break;
  2125. }
  2126. req = list_entry(ep->queue.next,
  2127. struct net2280_request, queue);
  2128. /* here either (M < N), a "real" short rx;
  2129. * or (M == N) and the queue didn't empty
  2130. */
  2131. if (likely(t & BIT(FIFO_EMPTY))) {
  2132. count = readl(&ep->dma->dmacount);
  2133. count &= DMA_BYTE_COUNT_MASK;
  2134. if (readl(&ep->dma->dmadesc)
  2135. != req->td_dma)
  2136. req = NULL;
  2137. break;
  2138. }
  2139. udelay(1);
  2140. }
  2141. /* stop DMA, leave ep NAKing */
  2142. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  2143. spin_stop_dma(ep->dma);
  2144. if (likely(req)) {
  2145. req->td->dmacount = 0;
  2146. t = readl(&ep->regs->ep_avail);
  2147. dma_done(ep, req, count,
  2148. (ep->out_overflow || t)
  2149. ? -EOVERFLOW : 0);
  2150. }
  2151. /* also flush to prevent erratum 0106 trouble */
  2152. if (unlikely(ep->out_overflow ||
  2153. (ep->dev->chiprev == 0x0100 &&
  2154. ep->dev->gadget.speed
  2155. == USB_SPEED_FULL))) {
  2156. out_flush(ep);
  2157. ep->out_overflow = 0;
  2158. }
  2159. /* (re)start dma if needed, stop NAKing */
  2160. ep->stopped = stopped;
  2161. if (!list_empty(&ep->queue))
  2162. restart_dma(ep);
  2163. } else
  2164. ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
  2165. ep->ep.name, t);
  2166. return;
  2167. /* data packet(s) received (in the fifo, OUT) */
  2168. } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
  2169. if (read_fifo(ep, req) && ep->num != 0)
  2170. mode = 2;
  2171. /* data packet(s) transmitted (IN) */
  2172. } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
  2173. unsigned len;
  2174. len = req->req.length - req->req.actual;
  2175. if (len > ep->ep.maxpacket)
  2176. len = ep->ep.maxpacket;
  2177. req->req.actual += len;
  2178. /* if we wrote it all, we're usually done */
  2179. /* send zlps until the status stage */
  2180. if ((req->req.actual == req->req.length) &&
  2181. (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
  2182. mode = 2;
  2183. /* there was nothing to do ... */
  2184. } else if (mode == 1)
  2185. return;
  2186. /* done */
  2187. if (mode == 2) {
  2188. /* stream endpoints often resubmit/unlink in completion */
  2189. done(ep, req, 0);
  2190. /* maybe advance queue to next request */
  2191. if (ep->num == 0) {
  2192. /* NOTE: net2280 could let gadget driver start the
  2193. * status stage later. since not all controllers let
  2194. * them control that, the api doesn't (yet) allow it.
  2195. */
  2196. if (!ep->stopped)
  2197. allow_status(ep);
  2198. req = NULL;
  2199. } else {
  2200. if (!list_empty(&ep->queue) && !ep->stopped)
  2201. req = list_entry(ep->queue.next,
  2202. struct net2280_request, queue);
  2203. else
  2204. req = NULL;
  2205. if (req && !ep->is_in)
  2206. stop_out_naking(ep);
  2207. }
  2208. }
  2209. /* is there a buffer for the next packet?
  2210. * for best streaming performance, make sure there is one.
  2211. */
  2212. if (req && !ep->stopped) {
  2213. /* load IN fifo with next packet (may be zlp) */
  2214. if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
  2215. write_fifo(ep, &req->req);
  2216. }
  2217. }
  2218. static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
  2219. {
  2220. struct net2280_ep *ep;
  2221. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  2222. return &dev->ep[0];
  2223. list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
  2224. u8 bEndpointAddress;
  2225. if (!ep->desc)
  2226. continue;
  2227. bEndpointAddress = ep->desc->bEndpointAddress;
  2228. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  2229. continue;
  2230. if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
  2231. return ep;
  2232. }
  2233. return NULL;
  2234. }
  2235. static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
  2236. {
  2237. u32 scratch, fsmvalue;
  2238. u32 ack_wait_timeout, state;
  2239. /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
  2240. scratch = get_idx_reg(dev->regs, SCRATCH);
  2241. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  2242. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  2243. if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
  2244. (r.bRequestType & USB_DIR_IN)))
  2245. return;
  2246. /* This is the first Control Read for this connection: */
  2247. if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
  2248. /*
  2249. * Connection is NOT SS:
  2250. * - Connection must be FS or HS.
  2251. * - This FSM state should allow workaround software to
  2252. * run after the next USB connection.
  2253. */
  2254. scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
  2255. dev->bug7734_patched = 1;
  2256. goto restore_data_eps;
  2257. }
  2258. /* Connection is SS: */
  2259. for (ack_wait_timeout = 0;
  2260. ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
  2261. ack_wait_timeout++) {
  2262. state = readl(&dev->plregs->pl_ep_status_1)
  2263. & (0xff << STATE);
  2264. if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
  2265. (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
  2266. scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
  2267. dev->bug7734_patched = 1;
  2268. break;
  2269. }
  2270. /*
  2271. * We have not yet received host's Data Phase ACK
  2272. * - Wait and try again.
  2273. */
  2274. udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
  2275. continue;
  2276. }
  2277. if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
  2278. ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
  2279. "to detect SS host's data phase ACK.");
  2280. ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
  2281. "got 0x%2.2x.\n", state >> STATE);
  2282. } else {
  2283. ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
  2284. "%duSec for Control Read Data Phase ACK\n",
  2285. DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
  2286. }
  2287. restore_data_eps:
  2288. /*
  2289. * Restore data EPs to their pre-workaround settings (disabled,
  2290. * initialized, and other details).
  2291. */
  2292. defect7374_disable_data_eps(dev);
  2293. set_idx_reg(dev->regs, SCRATCH, scratch);
  2294. return;
  2295. }
  2296. static void ep_clear_seqnum(struct net2280_ep *ep)
  2297. {
  2298. struct net2280 *dev = ep->dev;
  2299. u32 val;
  2300. static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
  2301. val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
  2302. val |= ep_pl[ep->num];
  2303. writel(val, &dev->plregs->pl_ep_ctrl);
  2304. val |= BIT(SEQUENCE_NUMBER_RESET);
  2305. writel(val, &dev->plregs->pl_ep_ctrl);
  2306. return;
  2307. }
  2308. static void handle_stat0_irqs_superspeed(struct net2280 *dev,
  2309. struct net2280_ep *ep, struct usb_ctrlrequest r)
  2310. {
  2311. int tmp = 0;
  2312. #define w_value le16_to_cpu(r.wValue)
  2313. #define w_index le16_to_cpu(r.wIndex)
  2314. #define w_length le16_to_cpu(r.wLength)
  2315. switch (r.bRequest) {
  2316. struct net2280_ep *e;
  2317. u16 status;
  2318. case USB_REQ_SET_CONFIGURATION:
  2319. dev->addressed_state = !w_value;
  2320. goto usb3_delegate;
  2321. case USB_REQ_GET_STATUS:
  2322. switch (r.bRequestType) {
  2323. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2324. status = dev->wakeup_enable ? 0x02 : 0x00;
  2325. if (dev->gadget.is_selfpowered)
  2326. status |= BIT(0);
  2327. status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
  2328. dev->ltm_enable << 4);
  2329. writel(0, &dev->epregs[0].ep_irqenb);
  2330. set_fifo_bytecount(ep, sizeof(status));
  2331. writel((__force u32) status, &dev->epregs[0].ep_data);
  2332. allow_status_338x(ep);
  2333. break;
  2334. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2335. e = get_ep_by_addr(dev, w_index);
  2336. if (!e)
  2337. goto do_stall3;
  2338. status = readl(&e->regs->ep_rsp) &
  2339. BIT(CLEAR_ENDPOINT_HALT);
  2340. writel(0, &dev->epregs[0].ep_irqenb);
  2341. set_fifo_bytecount(ep, sizeof(status));
  2342. writel((__force u32) status, &dev->epregs[0].ep_data);
  2343. allow_status_338x(ep);
  2344. break;
  2345. default:
  2346. goto usb3_delegate;
  2347. }
  2348. break;
  2349. case USB_REQ_CLEAR_FEATURE:
  2350. switch (r.bRequestType) {
  2351. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2352. if (!dev->addressed_state) {
  2353. switch (w_value) {
  2354. case USB_DEVICE_U1_ENABLE:
  2355. dev->u1_enable = 0;
  2356. writel(readl(&dev->usb_ext->usbctl2) &
  2357. ~BIT(U1_ENABLE),
  2358. &dev->usb_ext->usbctl2);
  2359. allow_status_338x(ep);
  2360. goto next_endpoints3;
  2361. case USB_DEVICE_U2_ENABLE:
  2362. dev->u2_enable = 0;
  2363. writel(readl(&dev->usb_ext->usbctl2) &
  2364. ~BIT(U2_ENABLE),
  2365. &dev->usb_ext->usbctl2);
  2366. allow_status_338x(ep);
  2367. goto next_endpoints3;
  2368. case USB_DEVICE_LTM_ENABLE:
  2369. dev->ltm_enable = 0;
  2370. writel(readl(&dev->usb_ext->usbctl2) &
  2371. ~BIT(LTM_ENABLE),
  2372. &dev->usb_ext->usbctl2);
  2373. allow_status_338x(ep);
  2374. goto next_endpoints3;
  2375. default:
  2376. break;
  2377. }
  2378. }
  2379. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2380. dev->wakeup_enable = 0;
  2381. writel(readl(&dev->usb->usbctl) &
  2382. ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2383. &dev->usb->usbctl);
  2384. allow_status_338x(ep);
  2385. break;
  2386. }
  2387. goto usb3_delegate;
  2388. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2389. e = get_ep_by_addr(dev, w_index);
  2390. if (!e)
  2391. goto do_stall3;
  2392. if (w_value != USB_ENDPOINT_HALT)
  2393. goto do_stall3;
  2394. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2395. /*
  2396. * Workaround for SS SeqNum not cleared via
  2397. * Endpoint Halt (Clear) bit. select endpoint
  2398. */
  2399. ep_clear_seqnum(e);
  2400. clear_halt(e);
  2401. if (!list_empty(&e->queue) && e->td_dma)
  2402. restart_dma(e);
  2403. allow_status(ep);
  2404. ep->stopped = 1;
  2405. break;
  2406. default:
  2407. goto usb3_delegate;
  2408. }
  2409. break;
  2410. case USB_REQ_SET_FEATURE:
  2411. switch (r.bRequestType) {
  2412. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2413. if (!dev->addressed_state) {
  2414. switch (w_value) {
  2415. case USB_DEVICE_U1_ENABLE:
  2416. dev->u1_enable = 1;
  2417. writel(readl(&dev->usb_ext->usbctl2) |
  2418. BIT(U1_ENABLE),
  2419. &dev->usb_ext->usbctl2);
  2420. allow_status_338x(ep);
  2421. goto next_endpoints3;
  2422. case USB_DEVICE_U2_ENABLE:
  2423. dev->u2_enable = 1;
  2424. writel(readl(&dev->usb_ext->usbctl2) |
  2425. BIT(U2_ENABLE),
  2426. &dev->usb_ext->usbctl2);
  2427. allow_status_338x(ep);
  2428. goto next_endpoints3;
  2429. case USB_DEVICE_LTM_ENABLE:
  2430. dev->ltm_enable = 1;
  2431. writel(readl(&dev->usb_ext->usbctl2) |
  2432. BIT(LTM_ENABLE),
  2433. &dev->usb_ext->usbctl2);
  2434. allow_status_338x(ep);
  2435. goto next_endpoints3;
  2436. default:
  2437. break;
  2438. }
  2439. }
  2440. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2441. dev->wakeup_enable = 1;
  2442. writel(readl(&dev->usb->usbctl) |
  2443. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2444. &dev->usb->usbctl);
  2445. allow_status_338x(ep);
  2446. break;
  2447. }
  2448. goto usb3_delegate;
  2449. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2450. e = get_ep_by_addr(dev, w_index);
  2451. if (!e || (w_value != USB_ENDPOINT_HALT))
  2452. goto do_stall3;
  2453. ep->stopped = 1;
  2454. if (ep->num == 0)
  2455. ep->dev->protocol_stall = 1;
  2456. else {
  2457. if (ep->dma)
  2458. abort_dma(ep);
  2459. set_halt(ep);
  2460. }
  2461. allow_status_338x(ep);
  2462. break;
  2463. default:
  2464. goto usb3_delegate;
  2465. }
  2466. break;
  2467. default:
  2468. usb3_delegate:
  2469. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
  2470. r.bRequestType, r.bRequest,
  2471. w_value, w_index, w_length,
  2472. readl(&ep->cfg->ep_cfg));
  2473. ep->responded = 0;
  2474. spin_unlock(&dev->lock);
  2475. tmp = dev->driver->setup(&dev->gadget, &r);
  2476. spin_lock(&dev->lock);
  2477. }
  2478. do_stall3:
  2479. if (tmp < 0) {
  2480. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2481. r.bRequestType, r.bRequest, tmp);
  2482. dev->protocol_stall = 1;
  2483. /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
  2484. set_halt(ep);
  2485. }
  2486. next_endpoints3:
  2487. #undef w_value
  2488. #undef w_index
  2489. #undef w_length
  2490. return;
  2491. }
  2492. static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
  2493. {
  2494. u32 index;
  2495. u32 bit;
  2496. for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
  2497. bit = BIT(ep_bit[index]);
  2498. if (!stat0)
  2499. break;
  2500. if (!(stat0 & bit))
  2501. continue;
  2502. stat0 &= ~bit;
  2503. handle_ep_small(&dev->ep[index]);
  2504. }
  2505. }
  2506. static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
  2507. {
  2508. struct net2280_ep *ep;
  2509. u32 num, scratch;
  2510. /* most of these don't need individual acks */
  2511. stat &= ~BIT(INTA_ASSERTED);
  2512. if (!stat)
  2513. return;
  2514. /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
  2515. /* starting a control request? */
  2516. if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
  2517. union {
  2518. u32 raw[2];
  2519. struct usb_ctrlrequest r;
  2520. } u;
  2521. int tmp;
  2522. struct net2280_request *req;
  2523. if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
  2524. u32 val = readl(&dev->usb->usbstat);
  2525. if (val & BIT(SUPER_SPEED)) {
  2526. dev->gadget.speed = USB_SPEED_SUPER;
  2527. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2528. EP0_SS_MAX_PACKET_SIZE);
  2529. } else if (val & BIT(HIGH_SPEED)) {
  2530. dev->gadget.speed = USB_SPEED_HIGH;
  2531. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2532. EP0_HS_MAX_PACKET_SIZE);
  2533. } else {
  2534. dev->gadget.speed = USB_SPEED_FULL;
  2535. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2536. EP0_HS_MAX_PACKET_SIZE);
  2537. }
  2538. net2280_led_speed(dev, dev->gadget.speed);
  2539. ep_dbg(dev, "%s\n",
  2540. usb_speed_string(dev->gadget.speed));
  2541. }
  2542. ep = &dev->ep[0];
  2543. ep->irqs++;
  2544. /* make sure any leftover request state is cleared */
  2545. stat &= ~BIT(ENDPOINT_0_INTERRUPT);
  2546. while (!list_empty(&ep->queue)) {
  2547. req = list_entry(ep->queue.next,
  2548. struct net2280_request, queue);
  2549. done(ep, req, (req->req.actual == req->req.length)
  2550. ? 0 : -EPROTO);
  2551. }
  2552. ep->stopped = 0;
  2553. dev->protocol_stall = 0;
  2554. if (!(dev->quirks & PLX_SUPERSPEED)) {
  2555. if (ep->dev->quirks & PLX_2280)
  2556. tmp = BIT(FIFO_OVERFLOW) |
  2557. BIT(FIFO_UNDERFLOW);
  2558. else
  2559. tmp = 0;
  2560. writel(tmp | BIT(TIMEOUT) |
  2561. BIT(USB_STALL_SENT) |
  2562. BIT(USB_IN_NAK_SENT) |
  2563. BIT(USB_IN_ACK_RCVD) |
  2564. BIT(USB_OUT_PING_NAK_SENT) |
  2565. BIT(USB_OUT_ACK_SENT) |
  2566. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  2567. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  2568. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2569. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2570. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2571. BIT(DATA_IN_TOKEN_INTERRUPT),
  2572. &ep->regs->ep_stat);
  2573. }
  2574. u.raw[0] = readl(&dev->usb->setup0123);
  2575. u.raw[1] = readl(&dev->usb->setup4567);
  2576. cpu_to_le32s(&u.raw[0]);
  2577. cpu_to_le32s(&u.raw[1]);
  2578. if ((dev->quirks & PLX_SUPERSPEED) && !dev->bug7734_patched)
  2579. defect7374_workaround(dev, u.r);
  2580. tmp = 0;
  2581. #define w_value le16_to_cpu(u.r.wValue)
  2582. #define w_index le16_to_cpu(u.r.wIndex)
  2583. #define w_length le16_to_cpu(u.r.wLength)
  2584. /* ack the irq */
  2585. writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
  2586. stat ^= BIT(SETUP_PACKET_INTERRUPT);
  2587. /* watch control traffic at the token level, and force
  2588. * synchronization before letting the status stage happen.
  2589. * FIXME ignore tokens we'll NAK, until driver responds.
  2590. * that'll mean a lot less irqs for some drivers.
  2591. */
  2592. ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
  2593. if (ep->is_in) {
  2594. scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2595. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2596. BIT(DATA_IN_TOKEN_INTERRUPT);
  2597. stop_out_naking(ep);
  2598. } else
  2599. scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2600. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2601. BIT(DATA_IN_TOKEN_INTERRUPT);
  2602. writel(scratch, &dev->epregs[0].ep_irqenb);
  2603. /* we made the hardware handle most lowlevel requests;
  2604. * everything else goes uplevel to the gadget code.
  2605. */
  2606. ep->responded = 1;
  2607. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2608. handle_stat0_irqs_superspeed(dev, ep, u.r);
  2609. goto next_endpoints;
  2610. }
  2611. switch (u.r.bRequest) {
  2612. case USB_REQ_GET_STATUS: {
  2613. struct net2280_ep *e;
  2614. __le32 status;
  2615. /* hw handles device and interface status */
  2616. if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
  2617. goto delegate;
  2618. e = get_ep_by_addr(dev, w_index);
  2619. if (!e || w_length > 2)
  2620. goto do_stall;
  2621. if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
  2622. status = cpu_to_le32(1);
  2623. else
  2624. status = cpu_to_le32(0);
  2625. /* don't bother with a request object! */
  2626. writel(0, &dev->epregs[0].ep_irqenb);
  2627. set_fifo_bytecount(ep, w_length);
  2628. writel((__force u32)status, &dev->epregs[0].ep_data);
  2629. allow_status(ep);
  2630. ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
  2631. goto next_endpoints;
  2632. }
  2633. break;
  2634. case USB_REQ_CLEAR_FEATURE: {
  2635. struct net2280_ep *e;
  2636. /* hw handles device features */
  2637. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2638. goto delegate;
  2639. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2640. goto do_stall;
  2641. e = get_ep_by_addr(dev, w_index);
  2642. if (!e)
  2643. goto do_stall;
  2644. if (e->wedged) {
  2645. ep_vdbg(dev, "%s wedged, halt not cleared\n",
  2646. ep->ep.name);
  2647. } else {
  2648. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2649. clear_halt(e);
  2650. if ((ep->dev->quirks & PLX_SUPERSPEED) &&
  2651. !list_empty(&e->queue) && e->td_dma)
  2652. restart_dma(e);
  2653. }
  2654. allow_status(ep);
  2655. goto next_endpoints;
  2656. }
  2657. break;
  2658. case USB_REQ_SET_FEATURE: {
  2659. struct net2280_ep *e;
  2660. /* hw handles device features */
  2661. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2662. goto delegate;
  2663. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2664. goto do_stall;
  2665. e = get_ep_by_addr(dev, w_index);
  2666. if (!e)
  2667. goto do_stall;
  2668. if (e->ep.name == ep0name)
  2669. goto do_stall;
  2670. set_halt(e);
  2671. if ((dev->quirks & PLX_SUPERSPEED) && e->dma)
  2672. abort_dma(e);
  2673. allow_status(ep);
  2674. ep_vdbg(dev, "%s set halt\n", ep->ep.name);
  2675. goto next_endpoints;
  2676. }
  2677. break;
  2678. default:
  2679. delegate:
  2680. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
  2681. "ep_cfg %08x\n",
  2682. u.r.bRequestType, u.r.bRequest,
  2683. w_value, w_index, w_length,
  2684. readl(&ep->cfg->ep_cfg));
  2685. ep->responded = 0;
  2686. spin_unlock(&dev->lock);
  2687. tmp = dev->driver->setup(&dev->gadget, &u.r);
  2688. spin_lock(&dev->lock);
  2689. }
  2690. /* stall ep0 on error */
  2691. if (tmp < 0) {
  2692. do_stall:
  2693. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2694. u.r.bRequestType, u.r.bRequest, tmp);
  2695. dev->protocol_stall = 1;
  2696. }
  2697. /* some in/out token irq should follow; maybe stall then.
  2698. * driver must queue a request (even zlp) or halt ep0
  2699. * before the host times out.
  2700. */
  2701. }
  2702. #undef w_value
  2703. #undef w_index
  2704. #undef w_length
  2705. next_endpoints:
  2706. if ((dev->quirks & PLX_SUPERSPEED) && dev->enhanced_mode) {
  2707. u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
  2708. USB3380_IRQSTAT0_EP_INTR_MASK_IN |
  2709. USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
  2710. if (stat & mask) {
  2711. usb338x_handle_ep_intr(dev, stat & mask);
  2712. stat &= ~mask;
  2713. }
  2714. } else {
  2715. /* endpoint data irq ? */
  2716. scratch = stat & 0x7f;
  2717. stat &= ~0x7f;
  2718. for (num = 0; scratch; num++) {
  2719. u32 t;
  2720. /* do this endpoint's FIFO and queue need tending? */
  2721. t = BIT(num);
  2722. if ((scratch & t) == 0)
  2723. continue;
  2724. scratch ^= t;
  2725. ep = &dev->ep[num];
  2726. handle_ep_small(ep);
  2727. }
  2728. }
  2729. if (stat)
  2730. ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
  2731. }
  2732. #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
  2733. BIT(DMA_C_INTERRUPT) | \
  2734. BIT(DMA_B_INTERRUPT) | \
  2735. BIT(DMA_A_INTERRUPT))
  2736. #define PCI_ERROR_INTERRUPTS ( \
  2737. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
  2738. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
  2739. BIT(PCI_RETRY_ABORT_INTERRUPT))
  2740. static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
  2741. __releases(dev->lock)
  2742. __acquires(dev->lock)
  2743. {
  2744. struct net2280_ep *ep;
  2745. u32 tmp, num, mask, scratch;
  2746. /* after disconnect there's nothing else to do! */
  2747. tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
  2748. mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
  2749. /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
  2750. * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
  2751. * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
  2752. * only indicates a change in the reset state).
  2753. */
  2754. if (stat & tmp) {
  2755. bool reset = false;
  2756. bool disconnect = false;
  2757. /*
  2758. * Ignore disconnects and resets if the speed hasn't been set.
  2759. * VBUS can bounce and there's always an initial reset.
  2760. */
  2761. writel(tmp, &dev->regs->irqstat1);
  2762. if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
  2763. if ((stat & BIT(VBUS_INTERRUPT)) &&
  2764. (readl(&dev->usb->usbctl) &
  2765. BIT(VBUS_PIN)) == 0) {
  2766. disconnect = true;
  2767. ep_dbg(dev, "disconnect %s\n",
  2768. dev->driver->driver.name);
  2769. } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
  2770. (readl(&dev->usb->usbstat) & mask)
  2771. == 0) {
  2772. reset = true;
  2773. ep_dbg(dev, "reset %s\n",
  2774. dev->driver->driver.name);
  2775. }
  2776. if (disconnect || reset) {
  2777. stop_activity(dev, dev->driver);
  2778. ep0_start(dev);
  2779. spin_unlock(&dev->lock);
  2780. if (reset)
  2781. usb_gadget_udc_reset
  2782. (&dev->gadget, dev->driver);
  2783. else
  2784. (dev->driver->disconnect)
  2785. (&dev->gadget);
  2786. spin_lock(&dev->lock);
  2787. return;
  2788. }
  2789. }
  2790. stat &= ~tmp;
  2791. /* vBUS can bounce ... one of many reasons to ignore the
  2792. * notion of hotplug events on bus connect/disconnect!
  2793. */
  2794. if (!stat)
  2795. return;
  2796. }
  2797. /* NOTE: chip stays in PCI D0 state for now, but it could
  2798. * enter D1 to save more power
  2799. */
  2800. tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
  2801. if (stat & tmp) {
  2802. writel(tmp, &dev->regs->irqstat1);
  2803. if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
  2804. if (dev->driver->suspend)
  2805. dev->driver->suspend(&dev->gadget);
  2806. if (!enable_suspend)
  2807. stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
  2808. } else {
  2809. if (dev->driver->resume)
  2810. dev->driver->resume(&dev->gadget);
  2811. /* at high speed, note erratum 0133 */
  2812. }
  2813. stat &= ~tmp;
  2814. }
  2815. /* clear any other status/irqs */
  2816. if (stat)
  2817. writel(stat, &dev->regs->irqstat1);
  2818. /* some status we can just ignore */
  2819. if (dev->quirks & PLX_2280)
  2820. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2821. BIT(SUSPEND_REQUEST_INTERRUPT) |
  2822. BIT(RESUME_INTERRUPT) |
  2823. BIT(SOF_INTERRUPT));
  2824. else
  2825. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2826. BIT(RESUME_INTERRUPT) |
  2827. BIT(SOF_DOWN_INTERRUPT) |
  2828. BIT(SOF_INTERRUPT));
  2829. if (!stat)
  2830. return;
  2831. /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
  2832. /* DMA status, for ep-{a,b,c,d} */
  2833. scratch = stat & DMA_INTERRUPTS;
  2834. stat &= ~DMA_INTERRUPTS;
  2835. scratch >>= 9;
  2836. for (num = 0; scratch; num++) {
  2837. struct net2280_dma_regs __iomem *dma;
  2838. tmp = BIT(num);
  2839. if ((tmp & scratch) == 0)
  2840. continue;
  2841. scratch ^= tmp;
  2842. ep = &dev->ep[num + 1];
  2843. dma = ep->dma;
  2844. if (!dma)
  2845. continue;
  2846. /* clear ep's dma status */
  2847. tmp = readl(&dma->dmastat);
  2848. writel(tmp, &dma->dmastat);
  2849. /* dma sync*/
  2850. if (dev->quirks & PLX_SUPERSPEED) {
  2851. u32 r_dmacount = readl(&dma->dmacount);
  2852. if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
  2853. (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
  2854. continue;
  2855. }
  2856. if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
  2857. ep_dbg(ep->dev, "%s no xact done? %08x\n",
  2858. ep->ep.name, tmp);
  2859. continue;
  2860. }
  2861. stop_dma(ep->dma);
  2862. /* OUT transfers terminate when the data from the
  2863. * host is in our memory. Process whatever's done.
  2864. * On this path, we know transfer's last packet wasn't
  2865. * less than req->length. NAK_OUT_PACKETS may be set,
  2866. * or the FIFO may already be holding new packets.
  2867. *
  2868. * IN transfers can linger in the FIFO for a very
  2869. * long time ... we ignore that for now, accounting
  2870. * precisely (like PIO does) needs per-packet irqs
  2871. */
  2872. scan_dma_completions(ep);
  2873. /* disable dma on inactive queues; else maybe restart */
  2874. if (!list_empty(&ep->queue)) {
  2875. tmp = readl(&dma->dmactl);
  2876. restart_dma(ep);
  2877. }
  2878. ep->irqs++;
  2879. }
  2880. /* NOTE: there are other PCI errors we might usefully notice.
  2881. * if they appear very often, here's where to try recovering.
  2882. */
  2883. if (stat & PCI_ERROR_INTERRUPTS) {
  2884. ep_err(dev, "pci dma error; stat %08x\n", stat);
  2885. stat &= ~PCI_ERROR_INTERRUPTS;
  2886. /* these are fatal errors, but "maybe" they won't
  2887. * happen again ...
  2888. */
  2889. stop_activity(dev, dev->driver);
  2890. ep0_start(dev);
  2891. stat = 0;
  2892. }
  2893. if (stat)
  2894. ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
  2895. }
  2896. static irqreturn_t net2280_irq(int irq, void *_dev)
  2897. {
  2898. struct net2280 *dev = _dev;
  2899. /* shared interrupt, not ours */
  2900. if ((dev->quirks & PLX_LEGACY) &&
  2901. (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
  2902. return IRQ_NONE;
  2903. spin_lock(&dev->lock);
  2904. /* handle disconnect, dma, and more */
  2905. handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
  2906. /* control requests and PIO */
  2907. handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
  2908. if (dev->quirks & PLX_SUPERSPEED) {
  2909. /* re-enable interrupt to trigger any possible new interrupt */
  2910. u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
  2911. writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
  2912. writel(pciirqenb1, &dev->regs->pciirqenb1);
  2913. }
  2914. spin_unlock(&dev->lock);
  2915. return IRQ_HANDLED;
  2916. }
  2917. /*-------------------------------------------------------------------------*/
  2918. static void gadget_release(struct device *_dev)
  2919. {
  2920. struct net2280 *dev = dev_get_drvdata(_dev);
  2921. kfree(dev);
  2922. }
  2923. /* tear down the binding between this driver and the pci device */
  2924. static void net2280_remove(struct pci_dev *pdev)
  2925. {
  2926. struct net2280 *dev = pci_get_drvdata(pdev);
  2927. usb_del_gadget_udc(&dev->gadget);
  2928. BUG_ON(dev->driver);
  2929. /* then clean up the resources we allocated during probe() */
  2930. net2280_led_shutdown(dev);
  2931. if (dev->requests) {
  2932. int i;
  2933. for (i = 1; i < 5; i++) {
  2934. if (!dev->ep[i].dummy)
  2935. continue;
  2936. pci_pool_free(dev->requests, dev->ep[i].dummy,
  2937. dev->ep[i].td_dma);
  2938. }
  2939. pci_pool_destroy(dev->requests);
  2940. }
  2941. if (dev->got_irq)
  2942. free_irq(pdev->irq, dev);
  2943. if (dev->quirks & PLX_SUPERSPEED)
  2944. pci_disable_msi(pdev);
  2945. if (dev->regs)
  2946. iounmap(dev->regs);
  2947. if (dev->region)
  2948. release_mem_region(pci_resource_start(pdev, 0),
  2949. pci_resource_len(pdev, 0));
  2950. if (dev->enabled)
  2951. pci_disable_device(pdev);
  2952. device_remove_file(&pdev->dev, &dev_attr_registers);
  2953. ep_info(dev, "unbind\n");
  2954. }
  2955. /* wrap this driver around the specified device, but
  2956. * don't respond over USB until a gadget driver binds to us.
  2957. */
  2958. static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2959. {
  2960. struct net2280 *dev;
  2961. unsigned long resource, len;
  2962. void __iomem *base = NULL;
  2963. int retval, i;
  2964. /* alloc, and start init */
  2965. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  2966. if (dev == NULL) {
  2967. retval = -ENOMEM;
  2968. goto done;
  2969. }
  2970. pci_set_drvdata(pdev, dev);
  2971. spin_lock_init(&dev->lock);
  2972. dev->quirks = id->driver_data;
  2973. dev->pdev = pdev;
  2974. dev->gadget.ops = &net2280_ops;
  2975. dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
  2976. USB_SPEED_SUPER : USB_SPEED_HIGH;
  2977. /* the "gadget" abstracts/virtualizes the controller */
  2978. dev->gadget.name = driver_name;
  2979. /* now all the pci goodies ... */
  2980. if (pci_enable_device(pdev) < 0) {
  2981. retval = -ENODEV;
  2982. goto done;
  2983. }
  2984. dev->enabled = 1;
  2985. /* BAR 0 holds all the registers
  2986. * BAR 1 is 8051 memory; unused here (note erratum 0103)
  2987. * BAR 2 is fifo memory; unused here
  2988. */
  2989. resource = pci_resource_start(pdev, 0);
  2990. len = pci_resource_len(pdev, 0);
  2991. if (!request_mem_region(resource, len, driver_name)) {
  2992. ep_dbg(dev, "controller already in use\n");
  2993. retval = -EBUSY;
  2994. goto done;
  2995. }
  2996. dev->region = 1;
  2997. /* FIXME provide firmware download interface to put
  2998. * 8051 code into the chip, e.g. to turn on PCI PM.
  2999. */
  3000. base = ioremap_nocache(resource, len);
  3001. if (base == NULL) {
  3002. ep_dbg(dev, "can't map memory\n");
  3003. retval = -EFAULT;
  3004. goto done;
  3005. }
  3006. dev->regs = (struct net2280_regs __iomem *) base;
  3007. dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
  3008. dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
  3009. dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
  3010. dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
  3011. dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
  3012. if (dev->quirks & PLX_SUPERSPEED) {
  3013. u32 fsmvalue;
  3014. u32 usbstat;
  3015. dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
  3016. (base + 0x00b4);
  3017. dev->llregs = (struct usb338x_ll_regs __iomem *)
  3018. (base + 0x0700);
  3019. dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
  3020. (base + 0x0748);
  3021. dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
  3022. (base + 0x077c);
  3023. dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
  3024. (base + 0x079c);
  3025. dev->plregs = (struct usb338x_pl_regs __iomem *)
  3026. (base + 0x0800);
  3027. usbstat = readl(&dev->usb->usbstat);
  3028. dev->enhanced_mode = !!(usbstat & BIT(11));
  3029. dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
  3030. /* put into initial config, link up all endpoints */
  3031. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  3032. (0xf << DEFECT7374_FSM_FIELD);
  3033. /* See if firmware needs to set up for workaround: */
  3034. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
  3035. dev->bug7734_patched = 1;
  3036. writel(0, &dev->usb->usbctl);
  3037. } else
  3038. dev->bug7734_patched = 0;
  3039. } else {
  3040. dev->enhanced_mode = 0;
  3041. dev->n_ep = 7;
  3042. /* put into initial config, link up all endpoints */
  3043. writel(0, &dev->usb->usbctl);
  3044. }
  3045. usb_reset(dev);
  3046. usb_reinit(dev);
  3047. /* irq setup after old hardware is cleaned up */
  3048. if (!pdev->irq) {
  3049. ep_err(dev, "No IRQ. Check PCI setup!\n");
  3050. retval = -ENODEV;
  3051. goto done;
  3052. }
  3053. if (dev->quirks & PLX_SUPERSPEED)
  3054. if (pci_enable_msi(pdev))
  3055. ep_err(dev, "Failed to enable MSI mode\n");
  3056. if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
  3057. driver_name, dev)) {
  3058. ep_err(dev, "request interrupt %d failed\n", pdev->irq);
  3059. retval = -EBUSY;
  3060. goto done;
  3061. }
  3062. dev->got_irq = 1;
  3063. /* DMA setup */
  3064. /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
  3065. dev->requests = pci_pool_create("requests", pdev,
  3066. sizeof(struct net2280_dma),
  3067. 0 /* no alignment requirements */,
  3068. 0 /* or page-crossing issues */);
  3069. if (!dev->requests) {
  3070. ep_dbg(dev, "can't get request pool\n");
  3071. retval = -ENOMEM;
  3072. goto done;
  3073. }
  3074. for (i = 1; i < 5; i++) {
  3075. struct net2280_dma *td;
  3076. td = pci_pool_alloc(dev->requests, GFP_KERNEL,
  3077. &dev->ep[i].td_dma);
  3078. if (!td) {
  3079. ep_dbg(dev, "can't get dummy %d\n", i);
  3080. retval = -ENOMEM;
  3081. goto done;
  3082. }
  3083. td->dmacount = 0; /* not VALID */
  3084. td->dmadesc = td->dmaaddr;
  3085. dev->ep[i].dummy = td;
  3086. }
  3087. /* enable lower-overhead pci memory bursts during DMA */
  3088. if (dev->quirks & PLX_LEGACY)
  3089. writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
  3090. /*
  3091. * 256 write retries may not be enough...
  3092. BIT(PCI_RETRY_ABORT_ENABLE) |
  3093. */
  3094. BIT(DMA_READ_MULTIPLE_ENABLE) |
  3095. BIT(DMA_READ_LINE_ENABLE),
  3096. &dev->pci->pcimstctl);
  3097. /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
  3098. pci_set_master(pdev);
  3099. pci_try_set_mwi(pdev);
  3100. /* ... also flushes any posted pci writes */
  3101. dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
  3102. /* done */
  3103. ep_info(dev, "%s\n", driver_desc);
  3104. ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
  3105. pdev->irq, base, dev->chiprev);
  3106. ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
  3107. dev->enhanced_mode ? "enhanced mode" : "legacy mode");
  3108. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  3109. if (retval)
  3110. goto done;
  3111. retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
  3112. gadget_release);
  3113. if (retval)
  3114. goto done;
  3115. return 0;
  3116. done:
  3117. if (dev)
  3118. net2280_remove(pdev);
  3119. return retval;
  3120. }
  3121. /* make sure the board is quiescent; otherwise it will continue
  3122. * generating IRQs across the upcoming reboot.
  3123. */
  3124. static void net2280_shutdown(struct pci_dev *pdev)
  3125. {
  3126. struct net2280 *dev = pci_get_drvdata(pdev);
  3127. /* disable IRQs */
  3128. writel(0, &dev->regs->pciirqenb0);
  3129. writel(0, &dev->regs->pciirqenb1);
  3130. /* disable the pullup so the host will think we're gone */
  3131. writel(0, &dev->usb->usbctl);
  3132. }
  3133. /*-------------------------------------------------------------------------*/
  3134. static const struct pci_device_id pci_ids[] = { {
  3135. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3136. .class_mask = ~0,
  3137. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3138. .device = 0x2280,
  3139. .subvendor = PCI_ANY_ID,
  3140. .subdevice = PCI_ANY_ID,
  3141. .driver_data = PLX_LEGACY | PLX_2280,
  3142. }, {
  3143. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3144. .class_mask = ~0,
  3145. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3146. .device = 0x2282,
  3147. .subvendor = PCI_ANY_ID,
  3148. .subdevice = PCI_ANY_ID,
  3149. .driver_data = PLX_LEGACY,
  3150. },
  3151. {
  3152. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3153. .class_mask = ~0,
  3154. .vendor = PCI_VENDOR_ID_PLX,
  3155. .device = 0x3380,
  3156. .subvendor = PCI_ANY_ID,
  3157. .subdevice = PCI_ANY_ID,
  3158. .driver_data = PLX_SUPERSPEED,
  3159. },
  3160. {
  3161. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3162. .class_mask = ~0,
  3163. .vendor = PCI_VENDOR_ID_PLX,
  3164. .device = 0x3382,
  3165. .subvendor = PCI_ANY_ID,
  3166. .subdevice = PCI_ANY_ID,
  3167. .driver_data = PLX_SUPERSPEED,
  3168. },
  3169. { /* end: all zeroes */ }
  3170. };
  3171. MODULE_DEVICE_TABLE(pci, pci_ids);
  3172. /* pci driver glue; this is a "new style" PCI driver module */
  3173. static struct pci_driver net2280_pci_driver = {
  3174. .name = (char *) driver_name,
  3175. .id_table = pci_ids,
  3176. .probe = net2280_probe,
  3177. .remove = net2280_remove,
  3178. .shutdown = net2280_shutdown,
  3179. /* FIXME add power management support */
  3180. };
  3181. module_pci_driver(net2280_pci_driver);
  3182. MODULE_DESCRIPTION(DRIVER_DESC);
  3183. MODULE_AUTHOR("David Brownell");
  3184. MODULE_LICENSE("GPL");