dwc3-pci.c 5.1 KB

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  1. /**
  2. * dwc3-pci.c - PCI Specific glue layer
  3. *
  4. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Authors: Felipe Balbi <balbi@ti.com>,
  7. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  8. *
  9. * This program is free software: you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 of
  11. * the License as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/pci.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/gpio/consumer.h>
  24. #include <linux/acpi.h>
  25. #include "platform_data.h"
  26. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
  27. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  28. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  29. #define PCI_DEVICE_ID_INTEL_BSW 0x22B7
  30. #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
  31. #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
  32. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  33. static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  34. static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  35. { "reset-gpios", &reset_gpios, 1 },
  36. { "cs-gpios", &cs_gpios, 1 },
  37. { },
  38. };
  39. static int dwc3_pci_quirks(struct pci_dev *pdev)
  40. {
  41. if (pdev->vendor == PCI_VENDOR_ID_AMD &&
  42. pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
  43. struct dwc3_platform_data pdata;
  44. memset(&pdata, 0, sizeof(pdata));
  45. pdata.has_lpm_erratum = true;
  46. pdata.lpm_nyet_threshold = 0xf;
  47. pdata.u2exit_lfps_quirk = true;
  48. pdata.u2ss_inp3_quirk = true;
  49. pdata.req_p1p2p3_quirk = true;
  50. pdata.del_p1p2p3_quirk = true;
  51. pdata.del_phy_power_chg_quirk = true;
  52. pdata.lfps_filter_quirk = true;
  53. pdata.rx_detect_poll_quirk = true;
  54. pdata.tx_de_emphasis_quirk = true;
  55. pdata.tx_de_emphasis = 1;
  56. /*
  57. * FIXME these quirks should be removed when AMD NL
  58. * taps out
  59. */
  60. pdata.disable_scramble_quirk = true;
  61. pdata.dis_u3_susphy_quirk = true;
  62. pdata.dis_u2_susphy_quirk = true;
  63. return platform_device_add_data(pci_get_drvdata(pdev), &pdata,
  64. sizeof(pdata));
  65. }
  66. if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
  67. pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
  68. struct gpio_desc *gpio;
  69. acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
  70. acpi_dwc3_byt_gpios);
  71. /* These GPIOs will turn on the USB2 PHY */
  72. gpio = gpiod_get(&pdev->dev, "cs");
  73. if (!IS_ERR(gpio)) {
  74. gpiod_direction_output(gpio, 0);
  75. gpiod_set_value_cansleep(gpio, 1);
  76. gpiod_put(gpio);
  77. }
  78. gpio = gpiod_get(&pdev->dev, "reset");
  79. if (!IS_ERR(gpio)) {
  80. gpiod_direction_output(gpio, 0);
  81. gpiod_set_value_cansleep(gpio, 1);
  82. gpiod_put(gpio);
  83. usleep_range(10000, 11000);
  84. }
  85. }
  86. return 0;
  87. }
  88. static int dwc3_pci_probe(struct pci_dev *pci,
  89. const struct pci_device_id *id)
  90. {
  91. struct resource res[2];
  92. struct platform_device *dwc3;
  93. int ret;
  94. struct device *dev = &pci->dev;
  95. ret = pcim_enable_device(pci);
  96. if (ret) {
  97. dev_err(dev, "failed to enable pci device\n");
  98. return -ENODEV;
  99. }
  100. pci_set_master(pci);
  101. dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  102. if (!dwc3) {
  103. dev_err(dev, "couldn't allocate dwc3 device\n");
  104. return -ENOMEM;
  105. }
  106. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  107. res[0].start = pci_resource_start(pci, 0);
  108. res[0].end = pci_resource_end(pci, 0);
  109. res[0].name = "dwc_usb3";
  110. res[0].flags = IORESOURCE_MEM;
  111. res[1].start = pci->irq;
  112. res[1].name = "dwc_usb3";
  113. res[1].flags = IORESOURCE_IRQ;
  114. ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
  115. if (ret) {
  116. dev_err(dev, "couldn't add resources to dwc3 device\n");
  117. return ret;
  118. }
  119. pci_set_drvdata(pci, dwc3);
  120. ret = dwc3_pci_quirks(pci);
  121. if (ret)
  122. goto err;
  123. dwc3->dev.parent = dev;
  124. ret = platform_device_add(dwc3);
  125. if (ret) {
  126. dev_err(dev, "failed to register dwc3 device\n");
  127. goto err;
  128. }
  129. return 0;
  130. err:
  131. platform_device_put(dwc3);
  132. return ret;
  133. }
  134. static void dwc3_pci_remove(struct pci_dev *pci)
  135. {
  136. acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
  137. platform_device_unregister(pci_get_drvdata(pci));
  138. }
  139. static const struct pci_device_id dwc3_pci_id_table[] = {
  140. {
  141. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  142. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
  143. },
  144. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  145. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  146. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  147. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
  148. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
  149. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  150. { } /* Terminating Entry */
  151. };
  152. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  153. static struct pci_driver dwc3_pci_driver = {
  154. .name = "dwc3-pci",
  155. .id_table = dwc3_pci_id_table,
  156. .probe = dwc3_pci_probe,
  157. .remove = dwc3_pci_remove,
  158. };
  159. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  160. MODULE_LICENSE("GPL v2");
  161. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  162. module_pci_driver(dwc3_pci_driver);