platform.c 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336
  1. /*
  2. * platform.c - DesignWare HS OTG Controller platform driver
  3. *
  4. * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions, and the following disclaimer,
  11. * without modification.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. The names of the above-listed copyright holders may not be used
  16. * to endorse or promote products derived from this software without
  17. * specific prior written permission.
  18. *
  19. * ALTERNATIVELY, this software may be distributed under the terms of the
  20. * GNU General Public License ("GPL") as published by the Free Software
  21. * Foundation; either version 2 of the License, or (at your option) any
  22. * later version.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  25. * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  28. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  29. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  30. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  31. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  32. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  33. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. */
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/slab.h>
  39. #include <linux/device.h>
  40. #include <linux/dma-mapping.h>
  41. #include <linux/of_device.h>
  42. #include <linux/mutex.h>
  43. #include <linux/platform_device.h>
  44. #include <linux/usb/of.h>
  45. #include "core.h"
  46. #include "hcd.h"
  47. #include "debug.h"
  48. static const char dwc2_driver_name[] = "dwc2";
  49. static const struct dwc2_core_params params_bcm2835 = {
  50. .otg_cap = 0, /* HNP/SRP capable */
  51. .otg_ver = 0, /* 1.3 */
  52. .dma_enable = 1,
  53. .dma_desc_enable = 0,
  54. .speed = 0, /* High Speed */
  55. .enable_dynamic_fifo = 1,
  56. .en_multiple_tx_fifo = 1,
  57. .host_rx_fifo_size = 774, /* 774 DWORDs */
  58. .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
  59. .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
  60. .max_transfer_size = 65535,
  61. .max_packet_count = 511,
  62. .host_channels = 8,
  63. .phy_type = 1, /* UTMI */
  64. .phy_utmi_width = 8, /* 8 bits */
  65. .phy_ulpi_ddr = 0, /* Single */
  66. .phy_ulpi_ext_vbus = 0,
  67. .i2c_enable = 0,
  68. .ulpi_fs_ls = 0,
  69. .host_support_fs_ls_low_power = 0,
  70. .host_ls_low_power_phy_clk = 0, /* 48 MHz */
  71. .ts_dline = 0,
  72. .reload_ctl = 0,
  73. .ahbcfg = 0x10,
  74. .uframe_sched = 0,
  75. .external_id_pin_ctl = -1,
  76. .hibernation = -1,
  77. };
  78. static const struct dwc2_core_params params_rk3066 = {
  79. .otg_cap = 2, /* non-HNP/non-SRP */
  80. .otg_ver = -1,
  81. .dma_enable = -1,
  82. .dma_desc_enable = 0,
  83. .speed = -1,
  84. .enable_dynamic_fifo = 1,
  85. .en_multiple_tx_fifo = -1,
  86. .host_rx_fifo_size = 520, /* 520 DWORDs */
  87. .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
  88. .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
  89. .max_transfer_size = 65535,
  90. .max_packet_count = -1,
  91. .host_channels = -1,
  92. .phy_type = -1,
  93. .phy_utmi_width = -1,
  94. .phy_ulpi_ddr = -1,
  95. .phy_ulpi_ext_vbus = -1,
  96. .i2c_enable = -1,
  97. .ulpi_fs_ls = -1,
  98. .host_support_fs_ls_low_power = -1,
  99. .host_ls_low_power_phy_clk = -1,
  100. .ts_dline = -1,
  101. .reload_ctl = -1,
  102. .ahbcfg = 0x7, /* INCR16 */
  103. .uframe_sched = -1,
  104. .external_id_pin_ctl = -1,
  105. .hibernation = -1,
  106. };
  107. /**
  108. * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
  109. * DWC_otg driver
  110. *
  111. * @dev: Platform device
  112. *
  113. * This routine is called, for example, when the rmmod command is executed. The
  114. * device may or may not be electrically present. If it is present, the driver
  115. * stops device processing. Any resources used on behalf of this device are
  116. * freed.
  117. */
  118. static int dwc2_driver_remove(struct platform_device *dev)
  119. {
  120. struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
  121. dwc2_debugfs_exit(hsotg);
  122. if (hsotg->hcd_enabled)
  123. dwc2_hcd_remove(hsotg);
  124. if (hsotg->gadget_enabled)
  125. s3c_hsotg_remove(hsotg);
  126. return 0;
  127. }
  128. static const struct of_device_id dwc2_of_match_table[] = {
  129. { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
  130. { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
  131. { .compatible = "snps,dwc2", .data = NULL },
  132. { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
  133. {},
  134. };
  135. MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
  136. /**
  137. * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
  138. * driver
  139. *
  140. * @dev: Platform device
  141. *
  142. * This routine creates the driver components required to control the device
  143. * (core, HCD, and PCD) and initializes the device. The driver components are
  144. * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
  145. * in the device private data. This allows the driver to access the dwc2_hsotg
  146. * structure on subsequent calls to driver methods for this device.
  147. */
  148. static int dwc2_driver_probe(struct platform_device *dev)
  149. {
  150. const struct of_device_id *match;
  151. const struct dwc2_core_params *params;
  152. struct dwc2_core_params defparams;
  153. struct dwc2_hsotg *hsotg;
  154. struct resource *res;
  155. struct phy *phy;
  156. struct usb_phy *uphy;
  157. int retval;
  158. int irq;
  159. match = of_match_device(dwc2_of_match_table, &dev->dev);
  160. if (match && match->data) {
  161. params = match->data;
  162. } else {
  163. /* Default all params to autodetect */
  164. dwc2_set_all_params(&defparams, -1);
  165. params = &defparams;
  166. /*
  167. * Disable descriptor dma mode by default as the HW can support
  168. * it, but does not support it for SPLIT transactions.
  169. */
  170. defparams.dma_desc_enable = 0;
  171. }
  172. hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
  173. if (!hsotg)
  174. return -ENOMEM;
  175. hsotg->dev = &dev->dev;
  176. /*
  177. * Use reasonable defaults so platforms don't have to provide these.
  178. */
  179. if (!dev->dev.dma_mask)
  180. dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
  181. retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
  182. if (retval)
  183. return retval;
  184. irq = platform_get_irq(dev, 0);
  185. if (irq < 0) {
  186. dev_err(&dev->dev, "missing IRQ resource\n");
  187. return irq;
  188. }
  189. dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
  190. irq);
  191. retval = devm_request_irq(hsotg->dev, irq,
  192. dwc2_handle_common_intr, IRQF_SHARED,
  193. dev_name(hsotg->dev), hsotg);
  194. if (retval)
  195. return retval;
  196. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  197. hsotg->regs = devm_ioremap_resource(&dev->dev, res);
  198. if (IS_ERR(hsotg->regs))
  199. return PTR_ERR(hsotg->regs);
  200. dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
  201. (unsigned long)res->start, hsotg->regs);
  202. hsotg->dr_mode = of_usb_get_dr_mode(dev->dev.of_node);
  203. /*
  204. * Attempt to find a generic PHY, then look for an old style
  205. * USB PHY
  206. */
  207. phy = devm_phy_get(&dev->dev, "usb2-phy");
  208. if (IS_ERR(phy)) {
  209. hsotg->phy = NULL;
  210. uphy = devm_usb_get_phy(&dev->dev, USB_PHY_TYPE_USB2);
  211. if (IS_ERR(uphy))
  212. hsotg->uphy = NULL;
  213. else
  214. hsotg->uphy = uphy;
  215. } else {
  216. hsotg->phy = phy;
  217. phy_power_on(hsotg->phy);
  218. phy_init(hsotg->phy);
  219. }
  220. spin_lock_init(&hsotg->lock);
  221. mutex_init(&hsotg->init_mutex);
  222. /* Detect config values from hardware */
  223. retval = dwc2_get_hwparams(hsotg);
  224. if (retval)
  225. return retval;
  226. hsotg->core_params = devm_kzalloc(&dev->dev,
  227. sizeof(*hsotg->core_params), GFP_KERNEL);
  228. if (!hsotg->core_params)
  229. return -ENOMEM;
  230. dwc2_set_all_params(hsotg->core_params, -1);
  231. /* Validate parameter values */
  232. dwc2_set_parameters(hsotg, params);
  233. if (hsotg->dr_mode != USB_DR_MODE_HOST) {
  234. retval = dwc2_gadget_init(hsotg, irq);
  235. if (retval)
  236. return retval;
  237. hsotg->gadget_enabled = 1;
  238. }
  239. if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
  240. retval = dwc2_hcd_init(hsotg, irq);
  241. if (retval) {
  242. if (hsotg->gadget_enabled)
  243. s3c_hsotg_remove(hsotg);
  244. return retval;
  245. }
  246. hsotg->hcd_enabled = 1;
  247. }
  248. platform_set_drvdata(dev, hsotg);
  249. dwc2_debugfs_init(hsotg);
  250. return retval;
  251. }
  252. static int __maybe_unused dwc2_suspend(struct device *dev)
  253. {
  254. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  255. int ret = 0;
  256. if (dwc2_is_device_mode(dwc2)) {
  257. ret = s3c_hsotg_suspend(dwc2);
  258. } else {
  259. if (dwc2->lx_state == DWC2_L0)
  260. return 0;
  261. phy_exit(dwc2->phy);
  262. phy_power_off(dwc2->phy);
  263. }
  264. return ret;
  265. }
  266. static int __maybe_unused dwc2_resume(struct device *dev)
  267. {
  268. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  269. int ret = 0;
  270. if (dwc2_is_device_mode(dwc2)) {
  271. ret = s3c_hsotg_resume(dwc2);
  272. } else {
  273. phy_power_on(dwc2->phy);
  274. phy_init(dwc2->phy);
  275. }
  276. return ret;
  277. }
  278. static const struct dev_pm_ops dwc2_dev_pm_ops = {
  279. SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
  280. };
  281. static struct platform_driver dwc2_platform_driver = {
  282. .driver = {
  283. .name = dwc2_driver_name,
  284. .of_match_table = dwc2_of_match_table,
  285. .pm = &dwc2_dev_pm_ops,
  286. },
  287. .probe = dwc2_driver_probe,
  288. .remove = dwc2_driver_remove,
  289. };
  290. module_platform_driver(dwc2_platform_driver);
  291. MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
  292. MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
  293. MODULE_LICENSE("Dual BSD/GPL");