udc.c 46 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg-fsm.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. #include "otg.h"
  29. #include "otg_fsm.h"
  30. /* control endpoint description */
  31. static const struct usb_endpoint_descriptor
  32. ctrl_endpt_out_desc = {
  33. .bLength = USB_DT_ENDPOINT_SIZE,
  34. .bDescriptorType = USB_DT_ENDPOINT,
  35. .bEndpointAddress = USB_DIR_OUT,
  36. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  37. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  38. };
  39. static const struct usb_endpoint_descriptor
  40. ctrl_endpt_in_desc = {
  41. .bLength = USB_DT_ENDPOINT_SIZE,
  42. .bDescriptorType = USB_DT_ENDPOINT,
  43. .bEndpointAddress = USB_DIR_IN,
  44. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  45. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  46. };
  47. /**
  48. * hw_ep_bit: calculates the bit number
  49. * @num: endpoint number
  50. * @dir: endpoint direction
  51. *
  52. * This function returns bit number
  53. */
  54. static inline int hw_ep_bit(int num, int dir)
  55. {
  56. return num + (dir ? 16 : 0);
  57. }
  58. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  59. {
  60. int fill = 16 - ci->hw_ep_max / 2;
  61. if (n >= ci->hw_ep_max / 2)
  62. n += fill;
  63. return n;
  64. }
  65. /**
  66. * hw_device_state: enables/disables interrupts (execute without interruption)
  67. * @dma: 0 => disable, !0 => enable and set dma engine
  68. *
  69. * This function returns an error code
  70. */
  71. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  72. {
  73. if (dma) {
  74. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  75. /* interrupt, error, port change, reset, sleep/suspend */
  76. hw_write(ci, OP_USBINTR, ~0,
  77. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  78. } else {
  79. hw_write(ci, OP_USBINTR, ~0, 0);
  80. }
  81. return 0;
  82. }
  83. /**
  84. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  85. * @num: endpoint number
  86. * @dir: endpoint direction
  87. *
  88. * This function returns an error code
  89. */
  90. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  91. {
  92. int n = hw_ep_bit(num, dir);
  93. do {
  94. /* flush any pending transfer */
  95. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  96. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  97. cpu_relax();
  98. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  99. return 0;
  100. }
  101. /**
  102. * hw_ep_disable: disables endpoint (execute without interruption)
  103. * @num: endpoint number
  104. * @dir: endpoint direction
  105. *
  106. * This function returns an error code
  107. */
  108. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  109. {
  110. hw_ep_flush(ci, num, dir);
  111. hw_write(ci, OP_ENDPTCTRL + num,
  112. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  113. return 0;
  114. }
  115. /**
  116. * hw_ep_enable: enables endpoint (execute without interruption)
  117. * @num: endpoint number
  118. * @dir: endpoint direction
  119. * @type: endpoint type
  120. *
  121. * This function returns an error code
  122. */
  123. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  124. {
  125. u32 mask, data;
  126. if (dir) {
  127. mask = ENDPTCTRL_TXT; /* type */
  128. data = type << __ffs(mask);
  129. mask |= ENDPTCTRL_TXS; /* unstall */
  130. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  131. data |= ENDPTCTRL_TXR;
  132. mask |= ENDPTCTRL_TXE; /* enable */
  133. data |= ENDPTCTRL_TXE;
  134. } else {
  135. mask = ENDPTCTRL_RXT; /* type */
  136. data = type << __ffs(mask);
  137. mask |= ENDPTCTRL_RXS; /* unstall */
  138. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  139. data |= ENDPTCTRL_RXR;
  140. mask |= ENDPTCTRL_RXE; /* enable */
  141. data |= ENDPTCTRL_RXE;
  142. }
  143. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  144. return 0;
  145. }
  146. /**
  147. * hw_ep_get_halt: return endpoint halt status
  148. * @num: endpoint number
  149. * @dir: endpoint direction
  150. *
  151. * This function returns 1 if endpoint halted
  152. */
  153. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  154. {
  155. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  156. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  157. }
  158. /**
  159. * hw_ep_prime: primes endpoint (execute without interruption)
  160. * @num: endpoint number
  161. * @dir: endpoint direction
  162. * @is_ctrl: true if control endpoint
  163. *
  164. * This function returns an error code
  165. */
  166. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  167. {
  168. int n = hw_ep_bit(num, dir);
  169. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  170. return -EAGAIN;
  171. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  172. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  173. cpu_relax();
  174. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  175. return -EAGAIN;
  176. /* status shoult be tested according with manual but it doesn't work */
  177. return 0;
  178. }
  179. /**
  180. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  181. * without interruption)
  182. * @num: endpoint number
  183. * @dir: endpoint direction
  184. * @value: true => stall, false => unstall
  185. *
  186. * This function returns an error code
  187. */
  188. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  189. {
  190. if (value != 0 && value != 1)
  191. return -EINVAL;
  192. do {
  193. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  194. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  195. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  196. /* data toggle - reserved for EP0 but it's in ESS */
  197. hw_write(ci, reg, mask_xs|mask_xr,
  198. value ? mask_xs : mask_xr);
  199. } while (value != hw_ep_get_halt(ci, num, dir));
  200. return 0;
  201. }
  202. /**
  203. * hw_is_port_high_speed: test if port is high speed
  204. *
  205. * This function returns true if high speed port
  206. */
  207. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  208. {
  209. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  210. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  211. }
  212. /**
  213. * hw_test_and_clear_complete: test & clear complete status (execute without
  214. * interruption)
  215. * @n: endpoint number
  216. *
  217. * This function returns complete status
  218. */
  219. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  220. {
  221. n = ep_to_bit(ci, n);
  222. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  223. }
  224. /**
  225. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  226. * without interruption)
  227. *
  228. * This function returns active interrutps
  229. */
  230. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  231. {
  232. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  233. hw_write(ci, OP_USBSTS, ~0, reg);
  234. return reg;
  235. }
  236. /**
  237. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  238. * interruption)
  239. *
  240. * This function returns guard value
  241. */
  242. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  243. {
  244. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  245. }
  246. /**
  247. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  248. * interruption)
  249. *
  250. * This function returns guard value
  251. */
  252. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  253. {
  254. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  255. }
  256. /**
  257. * hw_usb_set_address: configures USB address (execute without interruption)
  258. * @value: new USB address
  259. *
  260. * This function explicitly sets the address, without the "USBADRA" (advance)
  261. * feature, which is not supported by older versions of the controller.
  262. */
  263. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  264. {
  265. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  266. value << __ffs(DEVICEADDR_USBADR));
  267. }
  268. /**
  269. * hw_usb_reset: restart device after a bus reset (execute without
  270. * interruption)
  271. *
  272. * This function returns an error code
  273. */
  274. static int hw_usb_reset(struct ci_hdrc *ci)
  275. {
  276. hw_usb_set_address(ci, 0);
  277. /* ESS flushes only at end?!? */
  278. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  279. /* clear setup token semaphores */
  280. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  281. /* clear complete status */
  282. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  283. /* wait until all bits cleared */
  284. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  285. udelay(10); /* not RTOS friendly */
  286. /* reset all endpoints ? */
  287. /* reset internal status and wait for further instructions
  288. no need to verify the port reset status (ESS does it) */
  289. return 0;
  290. }
  291. /******************************************************************************
  292. * UTIL block
  293. *****************************************************************************/
  294. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  295. unsigned length)
  296. {
  297. int i;
  298. u32 temp;
  299. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  300. GFP_ATOMIC);
  301. if (node == NULL)
  302. return -ENOMEM;
  303. node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
  304. &node->dma);
  305. if (node->ptr == NULL) {
  306. kfree(node);
  307. return -ENOMEM;
  308. }
  309. memset(node->ptr, 0, sizeof(struct ci_hw_td));
  310. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  311. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  312. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  313. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  314. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  315. if (hwreq->req.length == 0
  316. || hwreq->req.length % hwep->ep.maxpacket)
  317. mul++;
  318. node->ptr->token |= mul << __ffs(TD_MULTO);
  319. }
  320. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  321. if (length) {
  322. node->ptr->page[0] = cpu_to_le32(temp);
  323. for (i = 1; i < TD_PAGE_COUNT; i++) {
  324. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  325. page &= ~TD_RESERVED_MASK;
  326. node->ptr->page[i] = cpu_to_le32(page);
  327. }
  328. }
  329. hwreq->req.actual += length;
  330. if (!list_empty(&hwreq->tds)) {
  331. /* get the last entry */
  332. lastnode = list_entry(hwreq->tds.prev,
  333. struct td_node, td);
  334. lastnode->ptr->next = cpu_to_le32(node->dma);
  335. }
  336. INIT_LIST_HEAD(&node->td);
  337. list_add_tail(&node->td, &hwreq->tds);
  338. return 0;
  339. }
  340. /**
  341. * _usb_addr: calculates endpoint address from direction & number
  342. * @ep: endpoint
  343. */
  344. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  345. {
  346. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  347. }
  348. /**
  349. * _hardware_queue: configures a request at hardware level
  350. * @gadget: gadget
  351. * @hwep: endpoint
  352. *
  353. * This function returns an error code
  354. */
  355. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  356. {
  357. struct ci_hdrc *ci = hwep->ci;
  358. int ret = 0;
  359. unsigned rest = hwreq->req.length;
  360. int pages = TD_PAGE_COUNT;
  361. struct td_node *firstnode, *lastnode;
  362. /* don't queue twice */
  363. if (hwreq->req.status == -EALREADY)
  364. return -EALREADY;
  365. hwreq->req.status = -EALREADY;
  366. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  367. if (ret)
  368. return ret;
  369. /*
  370. * The first buffer could be not page aligned.
  371. * In that case we have to span into one extra td.
  372. */
  373. if (hwreq->req.dma % PAGE_SIZE)
  374. pages--;
  375. if (rest == 0)
  376. add_td_to_list(hwep, hwreq, 0);
  377. while (rest > 0) {
  378. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  379. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  380. add_td_to_list(hwep, hwreq, count);
  381. rest -= count;
  382. }
  383. if (hwreq->req.zero && hwreq->req.length
  384. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  385. add_td_to_list(hwep, hwreq, 0);
  386. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  387. lastnode = list_entry(hwreq->tds.prev,
  388. struct td_node, td);
  389. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  390. if (!hwreq->req.no_interrupt)
  391. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  392. wmb();
  393. hwreq->req.actual = 0;
  394. if (!list_empty(&hwep->qh.queue)) {
  395. struct ci_hw_req *hwreqprev;
  396. int n = hw_ep_bit(hwep->num, hwep->dir);
  397. int tmp_stat;
  398. struct td_node *prevlastnode;
  399. u32 next = firstnode->dma & TD_ADDR_MASK;
  400. hwreqprev = list_entry(hwep->qh.queue.prev,
  401. struct ci_hw_req, queue);
  402. prevlastnode = list_entry(hwreqprev->tds.prev,
  403. struct td_node, td);
  404. prevlastnode->ptr->next = cpu_to_le32(next);
  405. wmb();
  406. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  407. goto done;
  408. do {
  409. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  410. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  411. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  412. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  413. if (tmp_stat)
  414. goto done;
  415. }
  416. /* QH configuration */
  417. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  418. hwep->qh.ptr->td.token &=
  419. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  420. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  421. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  422. if (hwreq->req.length == 0
  423. || hwreq->req.length % hwep->ep.maxpacket)
  424. mul++;
  425. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  426. }
  427. wmb(); /* synchronize before ep prime */
  428. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  429. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  430. done:
  431. return ret;
  432. }
  433. /*
  434. * free_pending_td: remove a pending request for the endpoint
  435. * @hwep: endpoint
  436. */
  437. static void free_pending_td(struct ci_hw_ep *hwep)
  438. {
  439. struct td_node *pending = hwep->pending_td;
  440. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  441. hwep->pending_td = NULL;
  442. kfree(pending);
  443. }
  444. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  445. struct td_node *node)
  446. {
  447. hwep->qh.ptr->td.next = node->dma;
  448. hwep->qh.ptr->td.token &=
  449. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  450. /* Synchronize before ep prime */
  451. wmb();
  452. return hw_ep_prime(ci, hwep->num, hwep->dir,
  453. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  454. }
  455. /**
  456. * _hardware_dequeue: handles a request at hardware level
  457. * @gadget: gadget
  458. * @hwep: endpoint
  459. *
  460. * This function returns an error code
  461. */
  462. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  463. {
  464. u32 tmptoken;
  465. struct td_node *node, *tmpnode;
  466. unsigned remaining_length;
  467. unsigned actual = hwreq->req.length;
  468. struct ci_hdrc *ci = hwep->ci;
  469. if (hwreq->req.status != -EALREADY)
  470. return -EINVAL;
  471. hwreq->req.status = 0;
  472. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  473. tmptoken = le32_to_cpu(node->ptr->token);
  474. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  475. int n = hw_ep_bit(hwep->num, hwep->dir);
  476. if (ci->rev == CI_REVISION_24)
  477. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  478. reprime_dtd(ci, hwep, node);
  479. hwreq->req.status = -EALREADY;
  480. return -EBUSY;
  481. }
  482. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  483. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  484. actual -= remaining_length;
  485. hwreq->req.status = tmptoken & TD_STATUS;
  486. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  487. hwreq->req.status = -EPIPE;
  488. break;
  489. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  490. hwreq->req.status = -EPROTO;
  491. break;
  492. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  493. hwreq->req.status = -EILSEQ;
  494. break;
  495. }
  496. if (remaining_length) {
  497. if (hwep->dir) {
  498. hwreq->req.status = -EPROTO;
  499. break;
  500. }
  501. }
  502. /*
  503. * As the hardware could still address the freed td
  504. * which will run the udc unusable, the cleanup of the
  505. * td has to be delayed by one.
  506. */
  507. if (hwep->pending_td)
  508. free_pending_td(hwep);
  509. hwep->pending_td = node;
  510. list_del_init(&node->td);
  511. }
  512. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  513. hwreq->req.actual += actual;
  514. if (hwreq->req.status)
  515. return hwreq->req.status;
  516. return hwreq->req.actual;
  517. }
  518. /**
  519. * _ep_nuke: dequeues all endpoint requests
  520. * @hwep: endpoint
  521. *
  522. * This function returns an error code
  523. * Caller must hold lock
  524. */
  525. static int _ep_nuke(struct ci_hw_ep *hwep)
  526. __releases(hwep->lock)
  527. __acquires(hwep->lock)
  528. {
  529. struct td_node *node, *tmpnode;
  530. if (hwep == NULL)
  531. return -EINVAL;
  532. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  533. while (!list_empty(&hwep->qh.queue)) {
  534. /* pop oldest request */
  535. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  536. struct ci_hw_req, queue);
  537. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  538. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  539. list_del_init(&node->td);
  540. node->ptr = NULL;
  541. kfree(node);
  542. }
  543. list_del_init(&hwreq->queue);
  544. hwreq->req.status = -ESHUTDOWN;
  545. if (hwreq->req.complete != NULL) {
  546. spin_unlock(hwep->lock);
  547. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  548. spin_lock(hwep->lock);
  549. }
  550. }
  551. if (hwep->pending_td)
  552. free_pending_td(hwep);
  553. return 0;
  554. }
  555. /**
  556. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  557. * @gadget: gadget
  558. *
  559. * This function returns an error code
  560. */
  561. static int _gadget_stop_activity(struct usb_gadget *gadget)
  562. {
  563. struct usb_ep *ep;
  564. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  565. unsigned long flags;
  566. spin_lock_irqsave(&ci->lock, flags);
  567. ci->gadget.speed = USB_SPEED_UNKNOWN;
  568. ci->remote_wakeup = 0;
  569. ci->suspended = 0;
  570. spin_unlock_irqrestore(&ci->lock, flags);
  571. /* flush all endpoints */
  572. gadget_for_each_ep(ep, gadget) {
  573. usb_ep_fifo_flush(ep);
  574. }
  575. usb_ep_fifo_flush(&ci->ep0out->ep);
  576. usb_ep_fifo_flush(&ci->ep0in->ep);
  577. /* make sure to disable all endpoints */
  578. gadget_for_each_ep(ep, gadget) {
  579. usb_ep_disable(ep);
  580. }
  581. if (ci->status != NULL) {
  582. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  583. ci->status = NULL;
  584. }
  585. return 0;
  586. }
  587. /******************************************************************************
  588. * ISR block
  589. *****************************************************************************/
  590. /**
  591. * isr_reset_handler: USB reset interrupt handler
  592. * @ci: UDC device
  593. *
  594. * This function resets USB engine after a bus reset occurred
  595. */
  596. static void isr_reset_handler(struct ci_hdrc *ci)
  597. __releases(ci->lock)
  598. __acquires(ci->lock)
  599. {
  600. int retval;
  601. spin_unlock(&ci->lock);
  602. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  603. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  604. retval = _gadget_stop_activity(&ci->gadget);
  605. if (retval)
  606. goto done;
  607. retval = hw_usb_reset(ci);
  608. if (retval)
  609. goto done;
  610. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  611. if (ci->status == NULL)
  612. retval = -ENOMEM;
  613. done:
  614. spin_lock(&ci->lock);
  615. if (retval)
  616. dev_err(ci->dev, "error: %i\n", retval);
  617. }
  618. /**
  619. * isr_get_status_complete: get_status request complete function
  620. * @ep: endpoint
  621. * @req: request handled
  622. *
  623. * Caller must release lock
  624. */
  625. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  626. {
  627. if (ep == NULL || req == NULL)
  628. return;
  629. kfree(req->buf);
  630. usb_ep_free_request(ep, req);
  631. }
  632. /**
  633. * _ep_queue: queues (submits) an I/O request to an endpoint
  634. *
  635. * Caller must hold lock
  636. */
  637. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  638. gfp_t __maybe_unused gfp_flags)
  639. {
  640. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  641. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  642. struct ci_hdrc *ci = hwep->ci;
  643. int retval = 0;
  644. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  645. return -EINVAL;
  646. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  647. if (req->length)
  648. hwep = (ci->ep0_dir == RX) ?
  649. ci->ep0out : ci->ep0in;
  650. if (!list_empty(&hwep->qh.queue)) {
  651. _ep_nuke(hwep);
  652. retval = -EOVERFLOW;
  653. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  654. _usb_addr(hwep));
  655. }
  656. }
  657. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  658. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  659. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  660. return -EMSGSIZE;
  661. }
  662. /* first nuke then test link, e.g. previous status has not sent */
  663. if (!list_empty(&hwreq->queue)) {
  664. dev_err(hwep->ci->dev, "request already in queue\n");
  665. return -EBUSY;
  666. }
  667. /* push request */
  668. hwreq->req.status = -EINPROGRESS;
  669. hwreq->req.actual = 0;
  670. retval = _hardware_enqueue(hwep, hwreq);
  671. if (retval == -EALREADY)
  672. retval = 0;
  673. if (!retval)
  674. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  675. return retval;
  676. }
  677. /**
  678. * isr_get_status_response: get_status request response
  679. * @ci: ci struct
  680. * @setup: setup request packet
  681. *
  682. * This function returns an error code
  683. */
  684. static int isr_get_status_response(struct ci_hdrc *ci,
  685. struct usb_ctrlrequest *setup)
  686. __releases(hwep->lock)
  687. __acquires(hwep->lock)
  688. {
  689. struct ci_hw_ep *hwep = ci->ep0in;
  690. struct usb_request *req = NULL;
  691. gfp_t gfp_flags = GFP_ATOMIC;
  692. int dir, num, retval;
  693. if (hwep == NULL || setup == NULL)
  694. return -EINVAL;
  695. spin_unlock(hwep->lock);
  696. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  697. spin_lock(hwep->lock);
  698. if (req == NULL)
  699. return -ENOMEM;
  700. req->complete = isr_get_status_complete;
  701. req->length = 2;
  702. req->buf = kzalloc(req->length, gfp_flags);
  703. if (req->buf == NULL) {
  704. retval = -ENOMEM;
  705. goto err_free_req;
  706. }
  707. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  708. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  709. ci->gadget.is_selfpowered;
  710. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  711. == USB_RECIP_ENDPOINT) {
  712. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  713. TX : RX;
  714. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  715. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  716. }
  717. /* else do nothing; reserved for future use */
  718. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  719. if (retval)
  720. goto err_free_buf;
  721. return 0;
  722. err_free_buf:
  723. kfree(req->buf);
  724. err_free_req:
  725. spin_unlock(hwep->lock);
  726. usb_ep_free_request(&hwep->ep, req);
  727. spin_lock(hwep->lock);
  728. return retval;
  729. }
  730. /**
  731. * isr_setup_status_complete: setup_status request complete function
  732. * @ep: endpoint
  733. * @req: request handled
  734. *
  735. * Caller must release lock. Put the port in test mode if test mode
  736. * feature is selected.
  737. */
  738. static void
  739. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  740. {
  741. struct ci_hdrc *ci = req->context;
  742. unsigned long flags;
  743. if (ci->setaddr) {
  744. hw_usb_set_address(ci, ci->address);
  745. ci->setaddr = false;
  746. if (ci->address)
  747. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  748. }
  749. spin_lock_irqsave(&ci->lock, flags);
  750. if (ci->test_mode)
  751. hw_port_test_set(ci, ci->test_mode);
  752. spin_unlock_irqrestore(&ci->lock, flags);
  753. }
  754. /**
  755. * isr_setup_status_phase: queues the status phase of a setup transation
  756. * @ci: ci struct
  757. *
  758. * This function returns an error code
  759. */
  760. static int isr_setup_status_phase(struct ci_hdrc *ci)
  761. {
  762. int retval;
  763. struct ci_hw_ep *hwep;
  764. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  765. ci->status->context = ci;
  766. ci->status->complete = isr_setup_status_complete;
  767. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  768. return retval;
  769. }
  770. /**
  771. * isr_tr_complete_low: transaction complete low level handler
  772. * @hwep: endpoint
  773. *
  774. * This function returns an error code
  775. * Caller must hold lock
  776. */
  777. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  778. __releases(hwep->lock)
  779. __acquires(hwep->lock)
  780. {
  781. struct ci_hw_req *hwreq, *hwreqtemp;
  782. struct ci_hw_ep *hweptemp = hwep;
  783. int retval = 0;
  784. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  785. queue) {
  786. retval = _hardware_dequeue(hwep, hwreq);
  787. if (retval < 0)
  788. break;
  789. list_del_init(&hwreq->queue);
  790. if (hwreq->req.complete != NULL) {
  791. spin_unlock(hwep->lock);
  792. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  793. hwreq->req.length)
  794. hweptemp = hwep->ci->ep0in;
  795. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  796. spin_lock(hwep->lock);
  797. }
  798. }
  799. if (retval == -EBUSY)
  800. retval = 0;
  801. return retval;
  802. }
  803. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  804. {
  805. dev_warn(&ci->gadget.dev,
  806. "connect the device to an alternate port if you want HNP\n");
  807. return isr_setup_status_phase(ci);
  808. }
  809. /**
  810. * isr_setup_packet_handler: setup packet handler
  811. * @ci: UDC descriptor
  812. *
  813. * This function handles setup packet
  814. */
  815. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  816. __releases(ci->lock)
  817. __acquires(ci->lock)
  818. {
  819. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  820. struct usb_ctrlrequest req;
  821. int type, num, dir, err = -EINVAL;
  822. u8 tmode = 0;
  823. /*
  824. * Flush data and handshake transactions of previous
  825. * setup packet.
  826. */
  827. _ep_nuke(ci->ep0out);
  828. _ep_nuke(ci->ep0in);
  829. /* read_setup_packet */
  830. do {
  831. hw_test_and_set_setup_guard(ci);
  832. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  833. } while (!hw_test_and_clear_setup_guard(ci));
  834. type = req.bRequestType;
  835. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  836. switch (req.bRequest) {
  837. case USB_REQ_CLEAR_FEATURE:
  838. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  839. le16_to_cpu(req.wValue) ==
  840. USB_ENDPOINT_HALT) {
  841. if (req.wLength != 0)
  842. break;
  843. num = le16_to_cpu(req.wIndex);
  844. dir = num & USB_ENDPOINT_DIR_MASK;
  845. num &= USB_ENDPOINT_NUMBER_MASK;
  846. if (dir) /* TX */
  847. num += ci->hw_ep_max / 2;
  848. if (!ci->ci_hw_ep[num].wedge) {
  849. spin_unlock(&ci->lock);
  850. err = usb_ep_clear_halt(
  851. &ci->ci_hw_ep[num].ep);
  852. spin_lock(&ci->lock);
  853. if (err)
  854. break;
  855. }
  856. err = isr_setup_status_phase(ci);
  857. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  858. le16_to_cpu(req.wValue) ==
  859. USB_DEVICE_REMOTE_WAKEUP) {
  860. if (req.wLength != 0)
  861. break;
  862. ci->remote_wakeup = 0;
  863. err = isr_setup_status_phase(ci);
  864. } else {
  865. goto delegate;
  866. }
  867. break;
  868. case USB_REQ_GET_STATUS:
  869. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  870. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  871. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  872. goto delegate;
  873. if (le16_to_cpu(req.wLength) != 2 ||
  874. le16_to_cpu(req.wValue) != 0)
  875. break;
  876. err = isr_get_status_response(ci, &req);
  877. break;
  878. case USB_REQ_SET_ADDRESS:
  879. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  880. goto delegate;
  881. if (le16_to_cpu(req.wLength) != 0 ||
  882. le16_to_cpu(req.wIndex) != 0)
  883. break;
  884. ci->address = (u8)le16_to_cpu(req.wValue);
  885. ci->setaddr = true;
  886. err = isr_setup_status_phase(ci);
  887. break;
  888. case USB_REQ_SET_FEATURE:
  889. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  890. le16_to_cpu(req.wValue) ==
  891. USB_ENDPOINT_HALT) {
  892. if (req.wLength != 0)
  893. break;
  894. num = le16_to_cpu(req.wIndex);
  895. dir = num & USB_ENDPOINT_DIR_MASK;
  896. num &= USB_ENDPOINT_NUMBER_MASK;
  897. if (dir) /* TX */
  898. num += ci->hw_ep_max / 2;
  899. spin_unlock(&ci->lock);
  900. err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
  901. spin_lock(&ci->lock);
  902. if (!err)
  903. isr_setup_status_phase(ci);
  904. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  905. if (req.wLength != 0)
  906. break;
  907. switch (le16_to_cpu(req.wValue)) {
  908. case USB_DEVICE_REMOTE_WAKEUP:
  909. ci->remote_wakeup = 1;
  910. err = isr_setup_status_phase(ci);
  911. break;
  912. case USB_DEVICE_TEST_MODE:
  913. tmode = le16_to_cpu(req.wIndex) >> 8;
  914. switch (tmode) {
  915. case TEST_J:
  916. case TEST_K:
  917. case TEST_SE0_NAK:
  918. case TEST_PACKET:
  919. case TEST_FORCE_EN:
  920. ci->test_mode = tmode;
  921. err = isr_setup_status_phase(
  922. ci);
  923. break;
  924. default:
  925. break;
  926. }
  927. break;
  928. case USB_DEVICE_B_HNP_ENABLE:
  929. if (ci_otg_is_fsm_mode(ci)) {
  930. ci->gadget.b_hnp_enable = 1;
  931. err = isr_setup_status_phase(
  932. ci);
  933. }
  934. break;
  935. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  936. if (ci_otg_is_fsm_mode(ci))
  937. err = otg_a_alt_hnp_support(ci);
  938. break;
  939. default:
  940. goto delegate;
  941. }
  942. } else {
  943. goto delegate;
  944. }
  945. break;
  946. default:
  947. delegate:
  948. if (req.wLength == 0) /* no data phase */
  949. ci->ep0_dir = TX;
  950. spin_unlock(&ci->lock);
  951. err = ci->driver->setup(&ci->gadget, &req);
  952. spin_lock(&ci->lock);
  953. break;
  954. }
  955. if (err < 0) {
  956. spin_unlock(&ci->lock);
  957. if (usb_ep_set_halt(&hwep->ep))
  958. dev_err(ci->dev, "error: ep_set_halt\n");
  959. spin_lock(&ci->lock);
  960. }
  961. }
  962. /**
  963. * isr_tr_complete_handler: transaction complete interrupt handler
  964. * @ci: UDC descriptor
  965. *
  966. * This function handles traffic events
  967. */
  968. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  969. __releases(ci->lock)
  970. __acquires(ci->lock)
  971. {
  972. unsigned i;
  973. int err;
  974. for (i = 0; i < ci->hw_ep_max; i++) {
  975. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  976. if (hwep->ep.desc == NULL)
  977. continue; /* not configured */
  978. if (hw_test_and_clear_complete(ci, i)) {
  979. err = isr_tr_complete_low(hwep);
  980. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  981. if (err > 0) /* needs status phase */
  982. err = isr_setup_status_phase(ci);
  983. if (err < 0) {
  984. spin_unlock(&ci->lock);
  985. if (usb_ep_set_halt(&hwep->ep))
  986. dev_err(ci->dev,
  987. "error: ep_set_halt\n");
  988. spin_lock(&ci->lock);
  989. }
  990. }
  991. }
  992. /* Only handle setup packet below */
  993. if (i == 0 &&
  994. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  995. isr_setup_packet_handler(ci);
  996. }
  997. }
  998. /******************************************************************************
  999. * ENDPT block
  1000. *****************************************************************************/
  1001. /**
  1002. * ep_enable: configure endpoint, making it usable
  1003. *
  1004. * Check usb_ep_enable() at "usb_gadget.h" for details
  1005. */
  1006. static int ep_enable(struct usb_ep *ep,
  1007. const struct usb_endpoint_descriptor *desc)
  1008. {
  1009. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1010. int retval = 0;
  1011. unsigned long flags;
  1012. u32 cap = 0;
  1013. if (ep == NULL || desc == NULL)
  1014. return -EINVAL;
  1015. spin_lock_irqsave(hwep->lock, flags);
  1016. /* only internal SW should enable ctrl endpts */
  1017. if (!list_empty(&hwep->qh.queue)) {
  1018. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1019. spin_unlock_irqrestore(hwep->lock, flags);
  1020. return -EBUSY;
  1021. }
  1022. hwep->ep.desc = desc;
  1023. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1024. hwep->num = usb_endpoint_num(desc);
  1025. hwep->type = usb_endpoint_type(desc);
  1026. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1027. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1028. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1029. cap |= QH_IOS;
  1030. cap |= QH_ZLT;
  1031. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1032. /*
  1033. * For ISO-TX, we set mult at QH as the largest value, and use
  1034. * MultO at TD as real mult value.
  1035. */
  1036. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1037. cap |= 3 << __ffs(QH_MULT);
  1038. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1039. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1040. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1041. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1042. retval = -EINVAL;
  1043. }
  1044. /*
  1045. * Enable endpoints in the HW other than ep0 as ep0
  1046. * is always enabled
  1047. */
  1048. if (hwep->num)
  1049. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1050. hwep->type);
  1051. spin_unlock_irqrestore(hwep->lock, flags);
  1052. return retval;
  1053. }
  1054. /**
  1055. * ep_disable: endpoint is no longer usable
  1056. *
  1057. * Check usb_ep_disable() at "usb_gadget.h" for details
  1058. */
  1059. static int ep_disable(struct usb_ep *ep)
  1060. {
  1061. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1062. int direction, retval = 0;
  1063. unsigned long flags;
  1064. if (ep == NULL)
  1065. return -EINVAL;
  1066. else if (hwep->ep.desc == NULL)
  1067. return -EBUSY;
  1068. spin_lock_irqsave(hwep->lock, flags);
  1069. /* only internal SW should disable ctrl endpts */
  1070. direction = hwep->dir;
  1071. do {
  1072. retval |= _ep_nuke(hwep);
  1073. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1074. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1075. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1076. } while (hwep->dir != direction);
  1077. hwep->ep.desc = NULL;
  1078. spin_unlock_irqrestore(hwep->lock, flags);
  1079. return retval;
  1080. }
  1081. /**
  1082. * ep_alloc_request: allocate a request object to use with this endpoint
  1083. *
  1084. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1085. */
  1086. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1087. {
  1088. struct ci_hw_req *hwreq = NULL;
  1089. if (ep == NULL)
  1090. return NULL;
  1091. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1092. if (hwreq != NULL) {
  1093. INIT_LIST_HEAD(&hwreq->queue);
  1094. INIT_LIST_HEAD(&hwreq->tds);
  1095. }
  1096. return (hwreq == NULL) ? NULL : &hwreq->req;
  1097. }
  1098. /**
  1099. * ep_free_request: frees a request object
  1100. *
  1101. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1102. */
  1103. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1104. {
  1105. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1106. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1107. struct td_node *node, *tmpnode;
  1108. unsigned long flags;
  1109. if (ep == NULL || req == NULL) {
  1110. return;
  1111. } else if (!list_empty(&hwreq->queue)) {
  1112. dev_err(hwep->ci->dev, "freeing queued request\n");
  1113. return;
  1114. }
  1115. spin_lock_irqsave(hwep->lock, flags);
  1116. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1117. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1118. list_del_init(&node->td);
  1119. node->ptr = NULL;
  1120. kfree(node);
  1121. }
  1122. kfree(hwreq);
  1123. spin_unlock_irqrestore(hwep->lock, flags);
  1124. }
  1125. /**
  1126. * ep_queue: queues (submits) an I/O request to an endpoint
  1127. *
  1128. * Check usb_ep_queue()* at usb_gadget.h" for details
  1129. */
  1130. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1131. gfp_t __maybe_unused gfp_flags)
  1132. {
  1133. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1134. int retval = 0;
  1135. unsigned long flags;
  1136. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1137. return -EINVAL;
  1138. spin_lock_irqsave(hwep->lock, flags);
  1139. retval = _ep_queue(ep, req, gfp_flags);
  1140. spin_unlock_irqrestore(hwep->lock, flags);
  1141. return retval;
  1142. }
  1143. /**
  1144. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1145. *
  1146. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1147. */
  1148. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1149. {
  1150. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1151. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1152. unsigned long flags;
  1153. struct td_node *node, *tmpnode;
  1154. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1155. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1156. list_empty(&hwep->qh.queue))
  1157. return -EINVAL;
  1158. spin_lock_irqsave(hwep->lock, flags);
  1159. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1160. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1161. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1162. list_del(&node->td);
  1163. kfree(node);
  1164. }
  1165. /* pop request */
  1166. list_del_init(&hwreq->queue);
  1167. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1168. req->status = -ECONNRESET;
  1169. if (hwreq->req.complete != NULL) {
  1170. spin_unlock(hwep->lock);
  1171. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1172. spin_lock(hwep->lock);
  1173. }
  1174. spin_unlock_irqrestore(hwep->lock, flags);
  1175. return 0;
  1176. }
  1177. /**
  1178. * ep_set_halt: sets the endpoint halt feature
  1179. *
  1180. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1181. */
  1182. static int ep_set_halt(struct usb_ep *ep, int value)
  1183. {
  1184. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1185. int direction, retval = 0;
  1186. unsigned long flags;
  1187. if (ep == NULL || hwep->ep.desc == NULL)
  1188. return -EINVAL;
  1189. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  1190. return -EOPNOTSUPP;
  1191. spin_lock_irqsave(hwep->lock, flags);
  1192. #ifndef STALL_IN
  1193. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1194. if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
  1195. !list_empty(&hwep->qh.queue)) {
  1196. spin_unlock_irqrestore(hwep->lock, flags);
  1197. return -EAGAIN;
  1198. }
  1199. #endif
  1200. direction = hwep->dir;
  1201. do {
  1202. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  1203. if (!value)
  1204. hwep->wedge = 0;
  1205. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1206. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1207. } while (hwep->dir != direction);
  1208. spin_unlock_irqrestore(hwep->lock, flags);
  1209. return retval;
  1210. }
  1211. /**
  1212. * ep_set_wedge: sets the halt feature and ignores clear requests
  1213. *
  1214. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1215. */
  1216. static int ep_set_wedge(struct usb_ep *ep)
  1217. {
  1218. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1219. unsigned long flags;
  1220. if (ep == NULL || hwep->ep.desc == NULL)
  1221. return -EINVAL;
  1222. spin_lock_irqsave(hwep->lock, flags);
  1223. hwep->wedge = 1;
  1224. spin_unlock_irqrestore(hwep->lock, flags);
  1225. return usb_ep_set_halt(ep);
  1226. }
  1227. /**
  1228. * ep_fifo_flush: flushes contents of a fifo
  1229. *
  1230. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1231. */
  1232. static void ep_fifo_flush(struct usb_ep *ep)
  1233. {
  1234. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1235. unsigned long flags;
  1236. if (ep == NULL) {
  1237. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1238. return;
  1239. }
  1240. spin_lock_irqsave(hwep->lock, flags);
  1241. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1242. spin_unlock_irqrestore(hwep->lock, flags);
  1243. }
  1244. /**
  1245. * Endpoint-specific part of the API to the USB controller hardware
  1246. * Check "usb_gadget.h" for details
  1247. */
  1248. static const struct usb_ep_ops usb_ep_ops = {
  1249. .enable = ep_enable,
  1250. .disable = ep_disable,
  1251. .alloc_request = ep_alloc_request,
  1252. .free_request = ep_free_request,
  1253. .queue = ep_queue,
  1254. .dequeue = ep_dequeue,
  1255. .set_halt = ep_set_halt,
  1256. .set_wedge = ep_set_wedge,
  1257. .fifo_flush = ep_fifo_flush,
  1258. };
  1259. /******************************************************************************
  1260. * GADGET block
  1261. *****************************************************************************/
  1262. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1263. {
  1264. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1265. unsigned long flags;
  1266. int gadget_ready = 0;
  1267. spin_lock_irqsave(&ci->lock, flags);
  1268. ci->vbus_active = is_active;
  1269. if (ci->driver)
  1270. gadget_ready = 1;
  1271. spin_unlock_irqrestore(&ci->lock, flags);
  1272. if (gadget_ready) {
  1273. if (is_active) {
  1274. pm_runtime_get_sync(&_gadget->dev);
  1275. hw_device_reset(ci);
  1276. hw_device_state(ci, ci->ep0out->qh.dma);
  1277. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1278. usb_udc_vbus_handler(_gadget, true);
  1279. } else {
  1280. usb_udc_vbus_handler(_gadget, false);
  1281. if (ci->driver)
  1282. ci->driver->disconnect(&ci->gadget);
  1283. hw_device_state(ci, 0);
  1284. if (ci->platdata->notify_event)
  1285. ci->platdata->notify_event(ci,
  1286. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1287. _gadget_stop_activity(&ci->gadget);
  1288. pm_runtime_put_sync(&_gadget->dev);
  1289. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1290. }
  1291. }
  1292. return 0;
  1293. }
  1294. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1295. {
  1296. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1297. unsigned long flags;
  1298. int ret = 0;
  1299. spin_lock_irqsave(&ci->lock, flags);
  1300. if (!ci->remote_wakeup) {
  1301. ret = -EOPNOTSUPP;
  1302. goto out;
  1303. }
  1304. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1305. ret = -EINVAL;
  1306. goto out;
  1307. }
  1308. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1309. out:
  1310. spin_unlock_irqrestore(&ci->lock, flags);
  1311. return ret;
  1312. }
  1313. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1314. {
  1315. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1316. if (ci->usb_phy)
  1317. return usb_phy_set_power(ci->usb_phy, ma);
  1318. return -ENOTSUPP;
  1319. }
  1320. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1321. {
  1322. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1323. struct ci_hw_ep *hwep = ci->ep0in;
  1324. unsigned long flags;
  1325. spin_lock_irqsave(hwep->lock, flags);
  1326. _gadget->is_selfpowered = (is_on != 0);
  1327. spin_unlock_irqrestore(hwep->lock, flags);
  1328. return 0;
  1329. }
  1330. /* Change Data+ pullup status
  1331. * this func is used by usb_gadget_connect/disconnet
  1332. */
  1333. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1334. {
  1335. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1336. /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
  1337. if (ci_otg_is_fsm_mode(ci))
  1338. return 0;
  1339. pm_runtime_get_sync(&ci->gadget.dev);
  1340. if (is_on)
  1341. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1342. else
  1343. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1344. pm_runtime_put_sync(&ci->gadget.dev);
  1345. return 0;
  1346. }
  1347. static int ci_udc_start(struct usb_gadget *gadget,
  1348. struct usb_gadget_driver *driver);
  1349. static int ci_udc_stop(struct usb_gadget *gadget);
  1350. /**
  1351. * Device operations part of the API to the USB controller hardware,
  1352. * which don't involve endpoints (or i/o)
  1353. * Check "usb_gadget.h" for details
  1354. */
  1355. static const struct usb_gadget_ops usb_gadget_ops = {
  1356. .vbus_session = ci_udc_vbus_session,
  1357. .wakeup = ci_udc_wakeup,
  1358. .set_selfpowered = ci_udc_selfpowered,
  1359. .pullup = ci_udc_pullup,
  1360. .vbus_draw = ci_udc_vbus_draw,
  1361. .udc_start = ci_udc_start,
  1362. .udc_stop = ci_udc_stop,
  1363. };
  1364. static int init_eps(struct ci_hdrc *ci)
  1365. {
  1366. int retval = 0, i, j;
  1367. for (i = 0; i < ci->hw_ep_max/2; i++)
  1368. for (j = RX; j <= TX; j++) {
  1369. int k = i + j * ci->hw_ep_max/2;
  1370. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1371. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1372. (j == TX) ? "in" : "out");
  1373. hwep->ci = ci;
  1374. hwep->lock = &ci->lock;
  1375. hwep->td_pool = ci->td_pool;
  1376. hwep->ep.name = hwep->name;
  1377. hwep->ep.ops = &usb_ep_ops;
  1378. /*
  1379. * for ep0: maxP defined in desc, for other
  1380. * eps, maxP is set by epautoconfig() called
  1381. * by gadget layer
  1382. */
  1383. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1384. INIT_LIST_HEAD(&hwep->qh.queue);
  1385. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1386. &hwep->qh.dma);
  1387. if (hwep->qh.ptr == NULL)
  1388. retval = -ENOMEM;
  1389. else
  1390. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1391. /*
  1392. * set up shorthands for ep0 out and in endpoints,
  1393. * don't add to gadget's ep_list
  1394. */
  1395. if (i == 0) {
  1396. if (j == RX)
  1397. ci->ep0out = hwep;
  1398. else
  1399. ci->ep0in = hwep;
  1400. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1401. continue;
  1402. }
  1403. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1404. }
  1405. return retval;
  1406. }
  1407. static void destroy_eps(struct ci_hdrc *ci)
  1408. {
  1409. int i;
  1410. for (i = 0; i < ci->hw_ep_max; i++) {
  1411. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1412. if (hwep->pending_td)
  1413. free_pending_td(hwep);
  1414. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1415. }
  1416. }
  1417. /**
  1418. * ci_udc_start: register a gadget driver
  1419. * @gadget: our gadget
  1420. * @driver: the driver being registered
  1421. *
  1422. * Interrupts are enabled here.
  1423. */
  1424. static int ci_udc_start(struct usb_gadget *gadget,
  1425. struct usb_gadget_driver *driver)
  1426. {
  1427. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1428. unsigned long flags;
  1429. int retval = -ENOMEM;
  1430. if (driver->disconnect == NULL)
  1431. return -EINVAL;
  1432. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1433. retval = usb_ep_enable(&ci->ep0out->ep);
  1434. if (retval)
  1435. return retval;
  1436. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1437. retval = usb_ep_enable(&ci->ep0in->ep);
  1438. if (retval)
  1439. return retval;
  1440. ci->driver = driver;
  1441. /* Start otg fsm for B-device */
  1442. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1443. ci_hdrc_otg_fsm_start(ci);
  1444. return retval;
  1445. }
  1446. pm_runtime_get_sync(&ci->gadget.dev);
  1447. if (ci->vbus_active) {
  1448. spin_lock_irqsave(&ci->lock, flags);
  1449. hw_device_reset(ci);
  1450. } else {
  1451. usb_udc_vbus_handler(&ci->gadget, false);
  1452. pm_runtime_put_sync(&ci->gadget.dev);
  1453. return retval;
  1454. }
  1455. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1456. spin_unlock_irqrestore(&ci->lock, flags);
  1457. if (retval)
  1458. pm_runtime_put_sync(&ci->gadget.dev);
  1459. return retval;
  1460. }
  1461. /**
  1462. * ci_udc_stop: unregister a gadget driver
  1463. */
  1464. static int ci_udc_stop(struct usb_gadget *gadget)
  1465. {
  1466. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1467. unsigned long flags;
  1468. spin_lock_irqsave(&ci->lock, flags);
  1469. if (ci->vbus_active) {
  1470. hw_device_state(ci, 0);
  1471. if (ci->platdata->notify_event)
  1472. ci->platdata->notify_event(ci,
  1473. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1474. spin_unlock_irqrestore(&ci->lock, flags);
  1475. _gadget_stop_activity(&ci->gadget);
  1476. spin_lock_irqsave(&ci->lock, flags);
  1477. pm_runtime_put(&ci->gadget.dev);
  1478. }
  1479. ci->driver = NULL;
  1480. spin_unlock_irqrestore(&ci->lock, flags);
  1481. return 0;
  1482. }
  1483. /******************************************************************************
  1484. * BUS block
  1485. *****************************************************************************/
  1486. /**
  1487. * udc_irq: ci interrupt handler
  1488. *
  1489. * This function returns IRQ_HANDLED if the IRQ has been handled
  1490. * It locks access to registers
  1491. */
  1492. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1493. {
  1494. irqreturn_t retval;
  1495. u32 intr;
  1496. if (ci == NULL)
  1497. return IRQ_HANDLED;
  1498. spin_lock(&ci->lock);
  1499. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1500. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1501. USBMODE_CM_DC) {
  1502. spin_unlock(&ci->lock);
  1503. return IRQ_NONE;
  1504. }
  1505. }
  1506. intr = hw_test_and_clear_intr_active(ci);
  1507. if (intr) {
  1508. /* order defines priority - do NOT change it */
  1509. if (USBi_URI & intr)
  1510. isr_reset_handler(ci);
  1511. if (USBi_PCI & intr) {
  1512. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1513. USB_SPEED_HIGH : USB_SPEED_FULL;
  1514. if (ci->suspended && ci->driver->resume) {
  1515. spin_unlock(&ci->lock);
  1516. ci->driver->resume(&ci->gadget);
  1517. spin_lock(&ci->lock);
  1518. ci->suspended = 0;
  1519. }
  1520. }
  1521. if (USBi_UI & intr)
  1522. isr_tr_complete_handler(ci);
  1523. if (USBi_SLI & intr) {
  1524. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1525. ci->driver->suspend) {
  1526. ci->suspended = 1;
  1527. spin_unlock(&ci->lock);
  1528. ci->driver->suspend(&ci->gadget);
  1529. usb_gadget_set_state(&ci->gadget,
  1530. USB_STATE_SUSPENDED);
  1531. spin_lock(&ci->lock);
  1532. }
  1533. }
  1534. retval = IRQ_HANDLED;
  1535. } else {
  1536. retval = IRQ_NONE;
  1537. }
  1538. spin_unlock(&ci->lock);
  1539. return retval;
  1540. }
  1541. /**
  1542. * udc_start: initialize gadget role
  1543. * @ci: chipidea controller
  1544. */
  1545. static int udc_start(struct ci_hdrc *ci)
  1546. {
  1547. struct device *dev = ci->dev;
  1548. int retval = 0;
  1549. spin_lock_init(&ci->lock);
  1550. ci->gadget.ops = &usb_gadget_ops;
  1551. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1552. ci->gadget.max_speed = USB_SPEED_HIGH;
  1553. ci->gadget.is_otg = ci->is_otg ? 1 : 0;
  1554. ci->gadget.name = ci->platdata->name;
  1555. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1556. /* alloc resources */
  1557. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1558. sizeof(struct ci_hw_qh),
  1559. 64, CI_HDRC_PAGE_SIZE);
  1560. if (ci->qh_pool == NULL)
  1561. return -ENOMEM;
  1562. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1563. sizeof(struct ci_hw_td),
  1564. 64, CI_HDRC_PAGE_SIZE);
  1565. if (ci->td_pool == NULL) {
  1566. retval = -ENOMEM;
  1567. goto free_qh_pool;
  1568. }
  1569. retval = init_eps(ci);
  1570. if (retval)
  1571. goto free_pools;
  1572. ci->gadget.ep0 = &ci->ep0in->ep;
  1573. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1574. if (retval)
  1575. goto destroy_eps;
  1576. pm_runtime_no_callbacks(&ci->gadget.dev);
  1577. pm_runtime_enable(&ci->gadget.dev);
  1578. return retval;
  1579. destroy_eps:
  1580. destroy_eps(ci);
  1581. free_pools:
  1582. dma_pool_destroy(ci->td_pool);
  1583. free_qh_pool:
  1584. dma_pool_destroy(ci->qh_pool);
  1585. return retval;
  1586. }
  1587. /**
  1588. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1589. *
  1590. * No interrupts active, the IRQ has been released
  1591. */
  1592. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1593. {
  1594. if (!ci->roles[CI_ROLE_GADGET])
  1595. return;
  1596. usb_del_gadget_udc(&ci->gadget);
  1597. destroy_eps(ci);
  1598. dma_pool_destroy(ci->td_pool);
  1599. dma_pool_destroy(ci->qh_pool);
  1600. }
  1601. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1602. {
  1603. if (ci->is_otg)
  1604. /* Clear and enable BSV irq */
  1605. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1606. OTGSC_BSVIS | OTGSC_BSVIE);
  1607. return 0;
  1608. }
  1609. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1610. {
  1611. /*
  1612. * host doesn't care B_SESSION_VALID event
  1613. * so clear and disbale BSV irq
  1614. */
  1615. if (ci->is_otg)
  1616. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1617. }
  1618. /**
  1619. * ci_hdrc_gadget_init - initialize device related bits
  1620. * ci: the controller
  1621. *
  1622. * This function initializes the gadget, if the device is "device capable".
  1623. */
  1624. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1625. {
  1626. struct ci_role_driver *rdrv;
  1627. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1628. return -ENXIO;
  1629. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1630. if (!rdrv)
  1631. return -ENOMEM;
  1632. rdrv->start = udc_id_switch_for_device;
  1633. rdrv->stop = udc_id_switch_for_host;
  1634. rdrv->irq = udc_irq;
  1635. rdrv->name = "gadget";
  1636. ci->roles[CI_ROLE_GADGET] = rdrv;
  1637. return udc_start(ci);
  1638. }