otg.c 3.2 KB

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  1. /*
  2. * otg.c - ChipIdea USB IP core OTG driver
  3. *
  4. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  5. *
  6. * Author: Peter Chen
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. /*
  13. * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
  14. * are also included.
  15. */
  16. #include <linux/usb/otg.h>
  17. #include <linux/usb/gadget.h>
  18. #include <linux/usb/chipidea.h>
  19. #include "ci.h"
  20. #include "bits.h"
  21. #include "otg.h"
  22. #include "otg_fsm.h"
  23. /**
  24. * hw_read_otgsc returns otgsc register bits value.
  25. * @mask: bitfield mask
  26. */
  27. u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  28. {
  29. return hw_read(ci, OP_OTGSC, mask);
  30. }
  31. /**
  32. * hw_write_otgsc updates target bits of OTGSC register.
  33. * @mask: bitfield mask
  34. * @data: to be written
  35. */
  36. void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
  37. {
  38. hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
  39. }
  40. /**
  41. * ci_otg_role - pick role based on ID pin state
  42. * @ci: the controller
  43. */
  44. enum ci_role ci_otg_role(struct ci_hdrc *ci)
  45. {
  46. enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
  47. ? CI_ROLE_GADGET
  48. : CI_ROLE_HOST;
  49. return role;
  50. }
  51. void ci_handle_vbus_change(struct ci_hdrc *ci)
  52. {
  53. if (!ci->is_otg)
  54. return;
  55. if (hw_read_otgsc(ci, OTGSC_BSV))
  56. usb_gadget_vbus_connect(&ci->gadget);
  57. else
  58. usb_gadget_vbus_disconnect(&ci->gadget);
  59. }
  60. #define CI_VBUS_STABLE_TIMEOUT_MS 5000
  61. static void ci_handle_id_switch(struct ci_hdrc *ci)
  62. {
  63. enum ci_role role = ci_otg_role(ci);
  64. if (role != ci->role) {
  65. dev_dbg(ci->dev, "switching from %s to %s\n",
  66. ci_role(ci)->name, ci->roles[role]->name);
  67. ci_role_stop(ci);
  68. /* wait vbus lower than OTGSC_BSV */
  69. hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
  70. CI_VBUS_STABLE_TIMEOUT_MS);
  71. ci_role_start(ci, role);
  72. }
  73. }
  74. /**
  75. * ci_otg_work - perform otg (vbus/id) event handle
  76. * @work: work struct
  77. */
  78. static void ci_otg_work(struct work_struct *work)
  79. {
  80. struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
  81. if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
  82. enable_irq(ci->irq);
  83. return;
  84. }
  85. pm_runtime_get_sync(ci->dev);
  86. if (ci->id_event) {
  87. ci->id_event = false;
  88. ci_handle_id_switch(ci);
  89. } else if (ci->b_sess_valid_event) {
  90. ci->b_sess_valid_event = false;
  91. ci_handle_vbus_change(ci);
  92. } else
  93. dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
  94. pm_runtime_put_sync(ci->dev);
  95. enable_irq(ci->irq);
  96. }
  97. /**
  98. * ci_hdrc_otg_init - initialize otg struct
  99. * ci: the controller
  100. */
  101. int ci_hdrc_otg_init(struct ci_hdrc *ci)
  102. {
  103. INIT_WORK(&ci->work, ci_otg_work);
  104. ci->wq = create_singlethread_workqueue("ci_otg");
  105. if (!ci->wq) {
  106. dev_err(ci->dev, "can't create workqueue\n");
  107. return -ENODEV;
  108. }
  109. if (ci_otg_is_fsm_mode(ci))
  110. return ci_hdrc_otg_fsm_init(ci);
  111. return 0;
  112. }
  113. /**
  114. * ci_hdrc_otg_destroy - destroy otg struct
  115. * ci: the controller
  116. */
  117. void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
  118. {
  119. if (ci->wq) {
  120. flush_workqueue(ci->wq);
  121. destroy_workqueue(ci->wq);
  122. }
  123. /* Disable all OTG irq and clear status */
  124. hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
  125. OTGSC_INT_STATUS_BITS);
  126. if (ci_otg_is_fsm_mode(ci))
  127. ci_hdrc_otg_fsm_remove(ci);
  128. }