sunsu.c 38 KB

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  1. /*
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/ioport.h>
  27. #include <linux/circ_buf.h>
  28. #include <linux/serial.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/console.h>
  31. #include <linux/slab.h>
  32. #ifdef CONFIG_SERIO
  33. #include <linux/serio.h>
  34. #endif
  35. #include <linux/serial_reg.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/of_device.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <asm/prom.h>
  42. #include <asm/setup.h>
  43. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44. #define SUPPORT_SYSRQ
  45. #endif
  46. #include <linux/serial_core.h>
  47. #include <linux/sunserialcore.h>
  48. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  49. * in a UART clock of 1.8462 MHz.
  50. */
  51. #define SU_BASE_BAUD (1846200 / 16)
  52. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  53. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  54. struct serial_uart_config {
  55. char *name;
  56. int dfl_xmit_fifo_size;
  57. int flags;
  58. };
  59. /*
  60. * Here we define the default xmit fifo size used for each type of UART.
  61. */
  62. static const struct serial_uart_config uart_config[] = {
  63. { "unknown", 1, 0 },
  64. { "8250", 1, 0 },
  65. { "16450", 1, 0 },
  66. { "16550", 1, 0 },
  67. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  68. { "Cirrus", 1, 0 },
  69. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  70. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  71. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  72. { "Startech", 1, 0 },
  73. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  74. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  75. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  76. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  77. };
  78. struct uart_sunsu_port {
  79. struct uart_port port;
  80. unsigned char acr;
  81. unsigned char ier;
  82. unsigned short rev;
  83. unsigned char lcr;
  84. unsigned int lsr_break_flag;
  85. unsigned int cflag;
  86. /* Probing information. */
  87. enum su_type su_type;
  88. unsigned int type_probed; /* XXX Stupid */
  89. unsigned long reg_size;
  90. #ifdef CONFIG_SERIO
  91. struct serio serio;
  92. int serio_open;
  93. #endif
  94. };
  95. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  96. {
  97. offset <<= up->port.regshift;
  98. switch (up->port.iotype) {
  99. case UPIO_HUB6:
  100. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  101. return inb(up->port.iobase + 1);
  102. case UPIO_MEM:
  103. return readb(up->port.membase + offset);
  104. default:
  105. return inb(up->port.iobase + offset);
  106. }
  107. }
  108. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  109. {
  110. #ifndef CONFIG_SPARC64
  111. /*
  112. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  113. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  114. * gate outputs a logical one. Since we use level triggered interrupts
  115. * we have lockup and watchdog reset. We cannot mask IRQ because
  116. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  117. * This problem is similar to what Alpha people suffer, see serial.c.
  118. */
  119. if (offset == UART_MCR)
  120. value |= UART_MCR_OUT2;
  121. #endif
  122. offset <<= up->port.regshift;
  123. switch (up->port.iotype) {
  124. case UPIO_HUB6:
  125. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  126. outb(value, up->port.iobase + 1);
  127. break;
  128. case UPIO_MEM:
  129. writeb(value, up->port.membase + offset);
  130. break;
  131. default:
  132. outb(value, up->port.iobase + offset);
  133. }
  134. }
  135. /*
  136. * We used to support using pause I/O for certain machines. We
  137. * haven't supported this for a while, but just in case it's badly
  138. * needed for certain old 386 machines, I've left these #define's
  139. * in....
  140. */
  141. #define serial_inp(up, offset) serial_in(up, offset)
  142. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  143. /*
  144. * For the 16C950
  145. */
  146. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  147. {
  148. serial_out(up, UART_SCR, offset);
  149. serial_out(up, UART_ICR, value);
  150. }
  151. #if 0 /* Unused currently */
  152. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  153. {
  154. unsigned int value;
  155. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  156. serial_out(up, UART_SCR, offset);
  157. value = serial_in(up, UART_ICR);
  158. serial_icr_write(up, UART_ACR, up->acr);
  159. return value;
  160. }
  161. #endif
  162. #ifdef CONFIG_SERIAL_8250_RSA
  163. /*
  164. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  165. * We set the port uart clock rate if we succeed.
  166. */
  167. static int __enable_rsa(struct uart_sunsu_port *up)
  168. {
  169. unsigned char mode;
  170. int result;
  171. mode = serial_inp(up, UART_RSA_MSR);
  172. result = mode & UART_RSA_MSR_FIFO;
  173. if (!result) {
  174. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  175. mode = serial_inp(up, UART_RSA_MSR);
  176. result = mode & UART_RSA_MSR_FIFO;
  177. }
  178. if (result)
  179. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  180. return result;
  181. }
  182. static void enable_rsa(struct uart_sunsu_port *up)
  183. {
  184. if (up->port.type == PORT_RSA) {
  185. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  186. spin_lock_irq(&up->port.lock);
  187. __enable_rsa(up);
  188. spin_unlock_irq(&up->port.lock);
  189. }
  190. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  191. serial_outp(up, UART_RSA_FRR, 0);
  192. }
  193. }
  194. /*
  195. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  196. * It is unknown why interrupts were disabled in here. However,
  197. * the caller is expected to preserve this behaviour by grabbing
  198. * the spinlock before calling this function.
  199. */
  200. static void disable_rsa(struct uart_sunsu_port *up)
  201. {
  202. unsigned char mode;
  203. int result;
  204. if (up->port.type == PORT_RSA &&
  205. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  206. spin_lock_irq(&up->port.lock);
  207. mode = serial_inp(up, UART_RSA_MSR);
  208. result = !(mode & UART_RSA_MSR_FIFO);
  209. if (!result) {
  210. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  211. mode = serial_inp(up, UART_RSA_MSR);
  212. result = !(mode & UART_RSA_MSR_FIFO);
  213. }
  214. if (result)
  215. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  216. spin_unlock_irq(&up->port.lock);
  217. }
  218. }
  219. #endif /* CONFIG_SERIAL_8250_RSA */
  220. static inline void __stop_tx(struct uart_sunsu_port *p)
  221. {
  222. if (p->ier & UART_IER_THRI) {
  223. p->ier &= ~UART_IER_THRI;
  224. serial_out(p, UART_IER, p->ier);
  225. }
  226. }
  227. static void sunsu_stop_tx(struct uart_port *port)
  228. {
  229. struct uart_sunsu_port *up =
  230. container_of(port, struct uart_sunsu_port, port);
  231. __stop_tx(up);
  232. /*
  233. * We really want to stop the transmitter from sending.
  234. */
  235. if (up->port.type == PORT_16C950) {
  236. up->acr |= UART_ACR_TXDIS;
  237. serial_icr_write(up, UART_ACR, up->acr);
  238. }
  239. }
  240. static void sunsu_start_tx(struct uart_port *port)
  241. {
  242. struct uart_sunsu_port *up =
  243. container_of(port, struct uart_sunsu_port, port);
  244. if (!(up->ier & UART_IER_THRI)) {
  245. up->ier |= UART_IER_THRI;
  246. serial_out(up, UART_IER, up->ier);
  247. }
  248. /*
  249. * Re-enable the transmitter if we disabled it.
  250. */
  251. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  252. up->acr &= ~UART_ACR_TXDIS;
  253. serial_icr_write(up, UART_ACR, up->acr);
  254. }
  255. }
  256. static void sunsu_stop_rx(struct uart_port *port)
  257. {
  258. struct uart_sunsu_port *up =
  259. container_of(port, struct uart_sunsu_port, port);
  260. up->ier &= ~UART_IER_RLSI;
  261. up->port.read_status_mask &= ~UART_LSR_DR;
  262. serial_out(up, UART_IER, up->ier);
  263. }
  264. static void sunsu_enable_ms(struct uart_port *port)
  265. {
  266. struct uart_sunsu_port *up =
  267. container_of(port, struct uart_sunsu_port, port);
  268. unsigned long flags;
  269. spin_lock_irqsave(&up->port.lock, flags);
  270. up->ier |= UART_IER_MSI;
  271. serial_out(up, UART_IER, up->ier);
  272. spin_unlock_irqrestore(&up->port.lock, flags);
  273. }
  274. static void
  275. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  276. {
  277. struct tty_port *port = &up->port.state->port;
  278. unsigned char ch, flag;
  279. int max_count = 256;
  280. int saw_console_brk = 0;
  281. do {
  282. ch = serial_inp(up, UART_RX);
  283. flag = TTY_NORMAL;
  284. up->port.icount.rx++;
  285. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  286. UART_LSR_FE | UART_LSR_OE))) {
  287. /*
  288. * For statistics only
  289. */
  290. if (*status & UART_LSR_BI) {
  291. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  292. up->port.icount.brk++;
  293. if (up->port.cons != NULL &&
  294. up->port.line == up->port.cons->index)
  295. saw_console_brk = 1;
  296. /*
  297. * We do the SysRQ and SAK checking
  298. * here because otherwise the break
  299. * may get masked by ignore_status_mask
  300. * or read_status_mask.
  301. */
  302. if (uart_handle_break(&up->port))
  303. goto ignore_char;
  304. } else if (*status & UART_LSR_PE)
  305. up->port.icount.parity++;
  306. else if (*status & UART_LSR_FE)
  307. up->port.icount.frame++;
  308. if (*status & UART_LSR_OE)
  309. up->port.icount.overrun++;
  310. /*
  311. * Mask off conditions which should be ingored.
  312. */
  313. *status &= up->port.read_status_mask;
  314. if (up->port.cons != NULL &&
  315. up->port.line == up->port.cons->index) {
  316. /* Recover the break flag from console xmit */
  317. *status |= up->lsr_break_flag;
  318. up->lsr_break_flag = 0;
  319. }
  320. if (*status & UART_LSR_BI) {
  321. flag = TTY_BREAK;
  322. } else if (*status & UART_LSR_PE)
  323. flag = TTY_PARITY;
  324. else if (*status & UART_LSR_FE)
  325. flag = TTY_FRAME;
  326. }
  327. if (uart_handle_sysrq_char(&up->port, ch))
  328. goto ignore_char;
  329. if ((*status & up->port.ignore_status_mask) == 0)
  330. tty_insert_flip_char(port, ch, flag);
  331. if (*status & UART_LSR_OE)
  332. /*
  333. * Overrun is special, since it's reported
  334. * immediately, and doesn't affect the current
  335. * character.
  336. */
  337. tty_insert_flip_char(port, 0, TTY_OVERRUN);
  338. ignore_char:
  339. *status = serial_inp(up, UART_LSR);
  340. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  341. if (saw_console_brk)
  342. sun_do_break();
  343. }
  344. static void transmit_chars(struct uart_sunsu_port *up)
  345. {
  346. struct circ_buf *xmit = &up->port.state->xmit;
  347. int count;
  348. if (up->port.x_char) {
  349. serial_outp(up, UART_TX, up->port.x_char);
  350. up->port.icount.tx++;
  351. up->port.x_char = 0;
  352. return;
  353. }
  354. if (uart_tx_stopped(&up->port)) {
  355. sunsu_stop_tx(&up->port);
  356. return;
  357. }
  358. if (uart_circ_empty(xmit)) {
  359. __stop_tx(up);
  360. return;
  361. }
  362. count = up->port.fifosize;
  363. do {
  364. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  365. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  366. up->port.icount.tx++;
  367. if (uart_circ_empty(xmit))
  368. break;
  369. } while (--count > 0);
  370. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  371. uart_write_wakeup(&up->port);
  372. if (uart_circ_empty(xmit))
  373. __stop_tx(up);
  374. }
  375. static void check_modem_status(struct uart_sunsu_port *up)
  376. {
  377. int status;
  378. status = serial_in(up, UART_MSR);
  379. if ((status & UART_MSR_ANY_DELTA) == 0)
  380. return;
  381. if (status & UART_MSR_TERI)
  382. up->port.icount.rng++;
  383. if (status & UART_MSR_DDSR)
  384. up->port.icount.dsr++;
  385. if (status & UART_MSR_DDCD)
  386. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  387. if (status & UART_MSR_DCTS)
  388. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  389. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  390. }
  391. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  392. {
  393. struct uart_sunsu_port *up = dev_id;
  394. unsigned long flags;
  395. unsigned char status;
  396. spin_lock_irqsave(&up->port.lock, flags);
  397. do {
  398. status = serial_inp(up, UART_LSR);
  399. if (status & UART_LSR_DR)
  400. receive_chars(up, &status);
  401. check_modem_status(up);
  402. if (status & UART_LSR_THRE)
  403. transmit_chars(up);
  404. spin_unlock_irqrestore(&up->port.lock, flags);
  405. tty_flip_buffer_push(&up->port.state->port);
  406. spin_lock_irqsave(&up->port.lock, flags);
  407. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  408. spin_unlock_irqrestore(&up->port.lock, flags);
  409. return IRQ_HANDLED;
  410. }
  411. /* Separate interrupt handling path for keyboard/mouse ports. */
  412. static void
  413. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  414. unsigned int iflag, unsigned int quot);
  415. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  416. {
  417. unsigned int cur_cflag = up->cflag;
  418. int quot, new_baud;
  419. up->cflag &= ~CBAUD;
  420. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  421. quot = up->port.uartclk / (16 * new_baud);
  422. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  423. }
  424. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  425. {
  426. do {
  427. unsigned char ch = serial_inp(up, UART_RX);
  428. /* Stop-A is handled by drivers/char/keyboard.c now. */
  429. if (up->su_type == SU_PORT_KBD) {
  430. #ifdef CONFIG_SERIO
  431. serio_interrupt(&up->serio, ch, 0);
  432. #endif
  433. } else if (up->su_type == SU_PORT_MS) {
  434. int ret = suncore_mouse_baud_detection(ch, is_break);
  435. switch (ret) {
  436. case 2:
  437. sunsu_change_mouse_baud(up);
  438. /* fallthru */
  439. case 1:
  440. break;
  441. case 0:
  442. #ifdef CONFIG_SERIO
  443. serio_interrupt(&up->serio, ch, 0);
  444. #endif
  445. break;
  446. }
  447. }
  448. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  449. }
  450. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  451. {
  452. struct uart_sunsu_port *up = dev_id;
  453. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  454. unsigned char status = serial_inp(up, UART_LSR);
  455. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  456. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  457. }
  458. return IRQ_HANDLED;
  459. }
  460. static unsigned int sunsu_tx_empty(struct uart_port *port)
  461. {
  462. struct uart_sunsu_port *up =
  463. container_of(port, struct uart_sunsu_port, port);
  464. unsigned long flags;
  465. unsigned int ret;
  466. spin_lock_irqsave(&up->port.lock, flags);
  467. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  468. spin_unlock_irqrestore(&up->port.lock, flags);
  469. return ret;
  470. }
  471. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  472. {
  473. struct uart_sunsu_port *up =
  474. container_of(port, struct uart_sunsu_port, port);
  475. unsigned char status;
  476. unsigned int ret;
  477. status = serial_in(up, UART_MSR);
  478. ret = 0;
  479. if (status & UART_MSR_DCD)
  480. ret |= TIOCM_CAR;
  481. if (status & UART_MSR_RI)
  482. ret |= TIOCM_RNG;
  483. if (status & UART_MSR_DSR)
  484. ret |= TIOCM_DSR;
  485. if (status & UART_MSR_CTS)
  486. ret |= TIOCM_CTS;
  487. return ret;
  488. }
  489. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  490. {
  491. struct uart_sunsu_port *up =
  492. container_of(port, struct uart_sunsu_port, port);
  493. unsigned char mcr = 0;
  494. if (mctrl & TIOCM_RTS)
  495. mcr |= UART_MCR_RTS;
  496. if (mctrl & TIOCM_DTR)
  497. mcr |= UART_MCR_DTR;
  498. if (mctrl & TIOCM_OUT1)
  499. mcr |= UART_MCR_OUT1;
  500. if (mctrl & TIOCM_OUT2)
  501. mcr |= UART_MCR_OUT2;
  502. if (mctrl & TIOCM_LOOP)
  503. mcr |= UART_MCR_LOOP;
  504. serial_out(up, UART_MCR, mcr);
  505. }
  506. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  507. {
  508. struct uart_sunsu_port *up =
  509. container_of(port, struct uart_sunsu_port, port);
  510. unsigned long flags;
  511. spin_lock_irqsave(&up->port.lock, flags);
  512. if (break_state == -1)
  513. up->lcr |= UART_LCR_SBC;
  514. else
  515. up->lcr &= ~UART_LCR_SBC;
  516. serial_out(up, UART_LCR, up->lcr);
  517. spin_unlock_irqrestore(&up->port.lock, flags);
  518. }
  519. static int sunsu_startup(struct uart_port *port)
  520. {
  521. struct uart_sunsu_port *up =
  522. container_of(port, struct uart_sunsu_port, port);
  523. unsigned long flags;
  524. int retval;
  525. if (up->port.type == PORT_16C950) {
  526. /* Wake up and initialize UART */
  527. up->acr = 0;
  528. serial_outp(up, UART_LCR, 0xBF);
  529. serial_outp(up, UART_EFR, UART_EFR_ECB);
  530. serial_outp(up, UART_IER, 0);
  531. serial_outp(up, UART_LCR, 0);
  532. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  533. serial_outp(up, UART_LCR, 0xBF);
  534. serial_outp(up, UART_EFR, UART_EFR_ECB);
  535. serial_outp(up, UART_LCR, 0);
  536. }
  537. #ifdef CONFIG_SERIAL_8250_RSA
  538. /*
  539. * If this is an RSA port, see if we can kick it up to the
  540. * higher speed clock.
  541. */
  542. enable_rsa(up);
  543. #endif
  544. /*
  545. * Clear the FIFO buffers and disable them.
  546. * (they will be reenabled in set_termios())
  547. */
  548. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  549. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  550. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  551. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  552. serial_outp(up, UART_FCR, 0);
  553. }
  554. /*
  555. * Clear the interrupt registers.
  556. */
  557. (void) serial_inp(up, UART_LSR);
  558. (void) serial_inp(up, UART_RX);
  559. (void) serial_inp(up, UART_IIR);
  560. (void) serial_inp(up, UART_MSR);
  561. /*
  562. * At this point, there's no way the LSR could still be 0xff;
  563. * if it is, then bail out, because there's likely no UART
  564. * here.
  565. */
  566. if (!(up->port.flags & UPF_BUGGY_UART) &&
  567. (serial_inp(up, UART_LSR) == 0xff)) {
  568. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  569. return -ENODEV;
  570. }
  571. if (up->su_type != SU_PORT_PORT) {
  572. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  573. IRQF_SHARED, su_typev[up->su_type], up);
  574. } else {
  575. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  576. IRQF_SHARED, su_typev[up->su_type], up);
  577. }
  578. if (retval) {
  579. printk("su: Cannot register IRQ %d\n", up->port.irq);
  580. return retval;
  581. }
  582. /*
  583. * Now, initialize the UART
  584. */
  585. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  586. spin_lock_irqsave(&up->port.lock, flags);
  587. up->port.mctrl |= TIOCM_OUT2;
  588. sunsu_set_mctrl(&up->port, up->port.mctrl);
  589. spin_unlock_irqrestore(&up->port.lock, flags);
  590. /*
  591. * Finally, enable interrupts. Note: Modem status interrupts
  592. * are set via set_termios(), which will be occurring imminently
  593. * anyway, so we don't enable them here.
  594. */
  595. up->ier = UART_IER_RLSI | UART_IER_RDI;
  596. serial_outp(up, UART_IER, up->ier);
  597. if (up->port.flags & UPF_FOURPORT) {
  598. unsigned int icp;
  599. /*
  600. * Enable interrupts on the AST Fourport board
  601. */
  602. icp = (up->port.iobase & 0xfe0) | 0x01f;
  603. outb_p(0x80, icp);
  604. (void) inb_p(icp);
  605. }
  606. /*
  607. * And clear the interrupt registers again for luck.
  608. */
  609. (void) serial_inp(up, UART_LSR);
  610. (void) serial_inp(up, UART_RX);
  611. (void) serial_inp(up, UART_IIR);
  612. (void) serial_inp(up, UART_MSR);
  613. return 0;
  614. }
  615. static void sunsu_shutdown(struct uart_port *port)
  616. {
  617. struct uart_sunsu_port *up =
  618. container_of(port, struct uart_sunsu_port, port);
  619. unsigned long flags;
  620. /*
  621. * Disable interrupts from this port
  622. */
  623. up->ier = 0;
  624. serial_outp(up, UART_IER, 0);
  625. spin_lock_irqsave(&up->port.lock, flags);
  626. if (up->port.flags & UPF_FOURPORT) {
  627. /* reset interrupts on the AST Fourport board */
  628. inb((up->port.iobase & 0xfe0) | 0x1f);
  629. up->port.mctrl |= TIOCM_OUT1;
  630. } else
  631. up->port.mctrl &= ~TIOCM_OUT2;
  632. sunsu_set_mctrl(&up->port, up->port.mctrl);
  633. spin_unlock_irqrestore(&up->port.lock, flags);
  634. /*
  635. * Disable break condition and FIFOs
  636. */
  637. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  638. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  639. UART_FCR_CLEAR_RCVR |
  640. UART_FCR_CLEAR_XMIT);
  641. serial_outp(up, UART_FCR, 0);
  642. #ifdef CONFIG_SERIAL_8250_RSA
  643. /*
  644. * Reset the RSA board back to 115kbps compat mode.
  645. */
  646. disable_rsa(up);
  647. #endif
  648. /*
  649. * Read data port to reset things.
  650. */
  651. (void) serial_in(up, UART_RX);
  652. free_irq(up->port.irq, up);
  653. }
  654. static void
  655. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  656. unsigned int iflag, unsigned int quot)
  657. {
  658. struct uart_sunsu_port *up =
  659. container_of(port, struct uart_sunsu_port, port);
  660. unsigned char cval, fcr = 0;
  661. unsigned long flags;
  662. switch (cflag & CSIZE) {
  663. case CS5:
  664. cval = 0x00;
  665. break;
  666. case CS6:
  667. cval = 0x01;
  668. break;
  669. case CS7:
  670. cval = 0x02;
  671. break;
  672. default:
  673. case CS8:
  674. cval = 0x03;
  675. break;
  676. }
  677. if (cflag & CSTOPB)
  678. cval |= 0x04;
  679. if (cflag & PARENB)
  680. cval |= UART_LCR_PARITY;
  681. if (!(cflag & PARODD))
  682. cval |= UART_LCR_EPAR;
  683. #ifdef CMSPAR
  684. if (cflag & CMSPAR)
  685. cval |= UART_LCR_SPAR;
  686. #endif
  687. /*
  688. * Work around a bug in the Oxford Semiconductor 952 rev B
  689. * chip which causes it to seriously miscalculate baud rates
  690. * when DLL is 0.
  691. */
  692. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  693. up->rev == 0x5201)
  694. quot ++;
  695. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  696. if ((up->port.uartclk / quot) < (2400 * 16))
  697. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  698. #ifdef CONFIG_SERIAL_8250_RSA
  699. else if (up->port.type == PORT_RSA)
  700. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  701. #endif
  702. else
  703. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  704. }
  705. if (up->port.type == PORT_16750)
  706. fcr |= UART_FCR7_64BYTE;
  707. /*
  708. * Ok, we're now changing the port state. Do it with
  709. * interrupts disabled.
  710. */
  711. spin_lock_irqsave(&up->port.lock, flags);
  712. /*
  713. * Update the per-port timeout.
  714. */
  715. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  716. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  717. if (iflag & INPCK)
  718. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  719. if (iflag & (IGNBRK | BRKINT | PARMRK))
  720. up->port.read_status_mask |= UART_LSR_BI;
  721. /*
  722. * Characteres to ignore
  723. */
  724. up->port.ignore_status_mask = 0;
  725. if (iflag & IGNPAR)
  726. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  727. if (iflag & IGNBRK) {
  728. up->port.ignore_status_mask |= UART_LSR_BI;
  729. /*
  730. * If we're ignoring parity and break indicators,
  731. * ignore overruns too (for real raw support).
  732. */
  733. if (iflag & IGNPAR)
  734. up->port.ignore_status_mask |= UART_LSR_OE;
  735. }
  736. /*
  737. * ignore all characters if CREAD is not set
  738. */
  739. if ((cflag & CREAD) == 0)
  740. up->port.ignore_status_mask |= UART_LSR_DR;
  741. /*
  742. * CTS flow control flag and modem status interrupts
  743. */
  744. up->ier &= ~UART_IER_MSI;
  745. if (UART_ENABLE_MS(&up->port, cflag))
  746. up->ier |= UART_IER_MSI;
  747. serial_out(up, UART_IER, up->ier);
  748. if (uart_config[up->port.type].flags & UART_STARTECH) {
  749. serial_outp(up, UART_LCR, 0xBF);
  750. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  751. }
  752. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  753. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  754. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  755. if (up->port.type == PORT_16750)
  756. serial_outp(up, UART_FCR, fcr); /* set fcr */
  757. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  758. up->lcr = cval; /* Save LCR */
  759. if (up->port.type != PORT_16750) {
  760. if (fcr & UART_FCR_ENABLE_FIFO) {
  761. /* emulated UARTs (Lucent Venus 167x) need two steps */
  762. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  763. }
  764. serial_outp(up, UART_FCR, fcr); /* set fcr */
  765. }
  766. up->cflag = cflag;
  767. spin_unlock_irqrestore(&up->port.lock, flags);
  768. }
  769. static void
  770. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  771. struct ktermios *old)
  772. {
  773. unsigned int baud, quot;
  774. /*
  775. * Ask the core to calculate the divisor for us.
  776. */
  777. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  778. quot = uart_get_divisor(port, baud);
  779. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  780. }
  781. static void sunsu_release_port(struct uart_port *port)
  782. {
  783. }
  784. static int sunsu_request_port(struct uart_port *port)
  785. {
  786. return 0;
  787. }
  788. static void sunsu_config_port(struct uart_port *port, int flags)
  789. {
  790. struct uart_sunsu_port *up =
  791. container_of(port, struct uart_sunsu_port, port);
  792. if (flags & UART_CONFIG_TYPE) {
  793. /*
  794. * We are supposed to call autoconfig here, but this requires
  795. * splitting all the OBP probing crap from the UART probing.
  796. * We'll do it when we kill sunsu.c altogether.
  797. */
  798. port->type = up->type_probed; /* XXX */
  799. }
  800. }
  801. static int
  802. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  803. {
  804. return -EINVAL;
  805. }
  806. static const char *
  807. sunsu_type(struct uart_port *port)
  808. {
  809. int type = port->type;
  810. if (type >= ARRAY_SIZE(uart_config))
  811. type = 0;
  812. return uart_config[type].name;
  813. }
  814. static struct uart_ops sunsu_pops = {
  815. .tx_empty = sunsu_tx_empty,
  816. .set_mctrl = sunsu_set_mctrl,
  817. .get_mctrl = sunsu_get_mctrl,
  818. .stop_tx = sunsu_stop_tx,
  819. .start_tx = sunsu_start_tx,
  820. .stop_rx = sunsu_stop_rx,
  821. .enable_ms = sunsu_enable_ms,
  822. .break_ctl = sunsu_break_ctl,
  823. .startup = sunsu_startup,
  824. .shutdown = sunsu_shutdown,
  825. .set_termios = sunsu_set_termios,
  826. .type = sunsu_type,
  827. .release_port = sunsu_release_port,
  828. .request_port = sunsu_request_port,
  829. .config_port = sunsu_config_port,
  830. .verify_port = sunsu_verify_port,
  831. };
  832. #define UART_NR 4
  833. static struct uart_sunsu_port sunsu_ports[UART_NR];
  834. static int nr_inst; /* Number of already registered ports */
  835. #ifdef CONFIG_SERIO
  836. static DEFINE_SPINLOCK(sunsu_serio_lock);
  837. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  838. {
  839. struct uart_sunsu_port *up = serio->port_data;
  840. unsigned long flags;
  841. int lsr;
  842. spin_lock_irqsave(&sunsu_serio_lock, flags);
  843. do {
  844. lsr = serial_in(up, UART_LSR);
  845. } while (!(lsr & UART_LSR_THRE));
  846. /* Send the character out. */
  847. serial_out(up, UART_TX, ch);
  848. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  849. return 0;
  850. }
  851. static int sunsu_serio_open(struct serio *serio)
  852. {
  853. struct uart_sunsu_port *up = serio->port_data;
  854. unsigned long flags;
  855. int ret;
  856. spin_lock_irqsave(&sunsu_serio_lock, flags);
  857. if (!up->serio_open) {
  858. up->serio_open = 1;
  859. ret = 0;
  860. } else
  861. ret = -EBUSY;
  862. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  863. return ret;
  864. }
  865. static void sunsu_serio_close(struct serio *serio)
  866. {
  867. struct uart_sunsu_port *up = serio->port_data;
  868. unsigned long flags;
  869. spin_lock_irqsave(&sunsu_serio_lock, flags);
  870. up->serio_open = 0;
  871. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  872. }
  873. #endif /* CONFIG_SERIO */
  874. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  875. {
  876. unsigned char status1, status2, scratch, scratch2, scratch3;
  877. unsigned char save_lcr, save_mcr;
  878. unsigned long flags;
  879. if (up->su_type == SU_PORT_NONE)
  880. return;
  881. up->type_probed = PORT_UNKNOWN;
  882. up->port.iotype = UPIO_MEM;
  883. spin_lock_irqsave(&up->port.lock, flags);
  884. if (!(up->port.flags & UPF_BUGGY_UART)) {
  885. /*
  886. * Do a simple existence test first; if we fail this, there's
  887. * no point trying anything else.
  888. *
  889. * 0x80 is used as a nonsense port to prevent against false
  890. * positives due to ISA bus float. The assumption is that
  891. * 0x80 is a non-existent port; which should be safe since
  892. * include/asm/io.h also makes this assumption.
  893. */
  894. scratch = serial_inp(up, UART_IER);
  895. serial_outp(up, UART_IER, 0);
  896. #ifdef __i386__
  897. outb(0xff, 0x080);
  898. #endif
  899. scratch2 = serial_inp(up, UART_IER);
  900. serial_outp(up, UART_IER, 0x0f);
  901. #ifdef __i386__
  902. outb(0, 0x080);
  903. #endif
  904. scratch3 = serial_inp(up, UART_IER);
  905. serial_outp(up, UART_IER, scratch);
  906. if (scratch2 != 0 || scratch3 != 0x0F)
  907. goto out; /* We failed; there's nothing here */
  908. }
  909. save_mcr = serial_in(up, UART_MCR);
  910. save_lcr = serial_in(up, UART_LCR);
  911. /*
  912. * Check to see if a UART is really there. Certain broken
  913. * internal modems based on the Rockwell chipset fail this
  914. * test, because they apparently don't implement the loopback
  915. * test mode. So this test is skipped on the COM 1 through
  916. * COM 4 ports. This *should* be safe, since no board
  917. * manufacturer would be stupid enough to design a board
  918. * that conflicts with COM 1-4 --- we hope!
  919. */
  920. if (!(up->port.flags & UPF_SKIP_TEST)) {
  921. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  922. status1 = serial_inp(up, UART_MSR) & 0xF0;
  923. serial_outp(up, UART_MCR, save_mcr);
  924. if (status1 != 0x90)
  925. goto out; /* We failed loopback test */
  926. }
  927. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  928. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  929. serial_outp(up, UART_LCR, 0);
  930. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  931. scratch = serial_in(up, UART_IIR) >> 6;
  932. switch (scratch) {
  933. case 0:
  934. up->port.type = PORT_16450;
  935. break;
  936. case 1:
  937. up->port.type = PORT_UNKNOWN;
  938. break;
  939. case 2:
  940. up->port.type = PORT_16550;
  941. break;
  942. case 3:
  943. up->port.type = PORT_16550A;
  944. break;
  945. }
  946. if (up->port.type == PORT_16550A) {
  947. /* Check for Startech UART's */
  948. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  949. if (serial_in(up, UART_EFR) == 0) {
  950. up->port.type = PORT_16650;
  951. } else {
  952. serial_outp(up, UART_LCR, 0xBF);
  953. if (serial_in(up, UART_EFR) == 0)
  954. up->port.type = PORT_16650V2;
  955. }
  956. }
  957. if (up->port.type == PORT_16550A) {
  958. /* Check for TI 16750 */
  959. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  960. serial_outp(up, UART_FCR,
  961. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  962. scratch = serial_in(up, UART_IIR) >> 5;
  963. if (scratch == 7) {
  964. /*
  965. * If this is a 16750, and not a cheap UART
  966. * clone, then it should only go into 64 byte
  967. * mode if the UART_FCR7_64BYTE bit was set
  968. * while UART_LCR_DLAB was latched.
  969. */
  970. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  971. serial_outp(up, UART_LCR, 0);
  972. serial_outp(up, UART_FCR,
  973. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  974. scratch = serial_in(up, UART_IIR) >> 5;
  975. if (scratch == 6)
  976. up->port.type = PORT_16750;
  977. }
  978. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  979. }
  980. serial_outp(up, UART_LCR, save_lcr);
  981. if (up->port.type == PORT_16450) {
  982. scratch = serial_in(up, UART_SCR);
  983. serial_outp(up, UART_SCR, 0xa5);
  984. status1 = serial_in(up, UART_SCR);
  985. serial_outp(up, UART_SCR, 0x5a);
  986. status2 = serial_in(up, UART_SCR);
  987. serial_outp(up, UART_SCR, scratch);
  988. if ((status1 != 0xa5) || (status2 != 0x5a))
  989. up->port.type = PORT_8250;
  990. }
  991. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  992. if (up->port.type == PORT_UNKNOWN)
  993. goto out;
  994. up->type_probed = up->port.type; /* XXX */
  995. /*
  996. * Reset the UART.
  997. */
  998. #ifdef CONFIG_SERIAL_8250_RSA
  999. if (up->port.type == PORT_RSA)
  1000. serial_outp(up, UART_RSA_FRR, 0);
  1001. #endif
  1002. serial_outp(up, UART_MCR, save_mcr);
  1003. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  1004. UART_FCR_CLEAR_RCVR |
  1005. UART_FCR_CLEAR_XMIT));
  1006. serial_outp(up, UART_FCR, 0);
  1007. (void)serial_in(up, UART_RX);
  1008. serial_outp(up, UART_IER, 0);
  1009. out:
  1010. spin_unlock_irqrestore(&up->port.lock, flags);
  1011. }
  1012. static struct uart_driver sunsu_reg = {
  1013. .owner = THIS_MODULE,
  1014. .driver_name = "sunsu",
  1015. .dev_name = "ttyS",
  1016. .major = TTY_MAJOR,
  1017. };
  1018. static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1019. {
  1020. int quot, baud;
  1021. #ifdef CONFIG_SERIO
  1022. struct serio *serio;
  1023. #endif
  1024. if (up->su_type == SU_PORT_KBD) {
  1025. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1026. baud = 1200;
  1027. } else {
  1028. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1029. baud = 4800;
  1030. }
  1031. quot = up->port.uartclk / (16 * baud);
  1032. sunsu_autoconfig(up);
  1033. if (up->port.type == PORT_UNKNOWN)
  1034. return -ENODEV;
  1035. printk("%s: %s port at %llx, irq %u\n",
  1036. up->port.dev->of_node->full_name,
  1037. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1038. (unsigned long long) up->port.mapbase,
  1039. up->port.irq);
  1040. #ifdef CONFIG_SERIO
  1041. serio = &up->serio;
  1042. serio->port_data = up;
  1043. serio->id.type = SERIO_RS232;
  1044. if (up->su_type == SU_PORT_KBD) {
  1045. serio->id.proto = SERIO_SUNKBD;
  1046. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1047. } else {
  1048. serio->id.proto = SERIO_SUN;
  1049. serio->id.extra = 1;
  1050. strlcpy(serio->name, "sums", sizeof(serio->name));
  1051. }
  1052. strlcpy(serio->phys,
  1053. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1054. sizeof(serio->phys));
  1055. serio->write = sunsu_serio_write;
  1056. serio->open = sunsu_serio_open;
  1057. serio->close = sunsu_serio_close;
  1058. serio->dev.parent = up->port.dev;
  1059. serio_register_port(serio);
  1060. #endif
  1061. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1062. sunsu_startup(&up->port);
  1063. return 0;
  1064. }
  1065. /*
  1066. * ------------------------------------------------------------
  1067. * Serial console driver
  1068. * ------------------------------------------------------------
  1069. */
  1070. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1071. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1072. /*
  1073. * Wait for transmitter & holding register to empty
  1074. */
  1075. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1076. {
  1077. unsigned int status, tmout = 10000;
  1078. /* Wait up to 10ms for the character(s) to be sent. */
  1079. do {
  1080. status = serial_in(up, UART_LSR);
  1081. if (status & UART_LSR_BI)
  1082. up->lsr_break_flag = UART_LSR_BI;
  1083. if (--tmout == 0)
  1084. break;
  1085. udelay(1);
  1086. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1087. /* Wait up to 1s for flow control if necessary */
  1088. if (up->port.flags & UPF_CONS_FLOW) {
  1089. tmout = 1000000;
  1090. while (--tmout &&
  1091. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1092. udelay(1);
  1093. }
  1094. }
  1095. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1096. {
  1097. struct uart_sunsu_port *up =
  1098. container_of(port, struct uart_sunsu_port, port);
  1099. wait_for_xmitr(up);
  1100. serial_out(up, UART_TX, ch);
  1101. }
  1102. /*
  1103. * Print a string to the serial port trying not to disturb
  1104. * any possible real use of the port...
  1105. */
  1106. static void sunsu_console_write(struct console *co, const char *s,
  1107. unsigned int count)
  1108. {
  1109. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1110. unsigned long flags;
  1111. unsigned int ier;
  1112. int locked = 1;
  1113. if (up->port.sysrq || oops_in_progress)
  1114. locked = spin_trylock_irqsave(&up->port.lock, flags);
  1115. else
  1116. spin_lock_irqsave(&up->port.lock, flags);
  1117. /*
  1118. * First save the UER then disable the interrupts
  1119. */
  1120. ier = serial_in(up, UART_IER);
  1121. serial_out(up, UART_IER, 0);
  1122. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1123. /*
  1124. * Finally, wait for transmitter to become empty
  1125. * and restore the IER
  1126. */
  1127. wait_for_xmitr(up);
  1128. serial_out(up, UART_IER, ier);
  1129. if (locked)
  1130. spin_unlock_irqrestore(&up->port.lock, flags);
  1131. }
  1132. /*
  1133. * Setup initial baud/bits/parity. We do two things here:
  1134. * - construct a cflag setting for the first su_open()
  1135. * - initialize the serial port
  1136. * Return non-zero if we didn't find a serial port.
  1137. */
  1138. static int __init sunsu_console_setup(struct console *co, char *options)
  1139. {
  1140. static struct ktermios dummy;
  1141. struct ktermios termios;
  1142. struct uart_port *port;
  1143. printk("Console: ttyS%d (SU)\n",
  1144. (sunsu_reg.minor - 64) + co->index);
  1145. if (co->index > nr_inst)
  1146. return -ENODEV;
  1147. port = &sunsu_ports[co->index].port;
  1148. /*
  1149. * Temporary fix.
  1150. */
  1151. spin_lock_init(&port->lock);
  1152. /* Get firmware console settings. */
  1153. sunserial_console_termios(co, port->dev->of_node);
  1154. memset(&termios, 0, sizeof(struct ktermios));
  1155. termios.c_cflag = co->cflag;
  1156. port->mctrl |= TIOCM_DTR;
  1157. port->ops->set_termios(port, &termios, &dummy);
  1158. return 0;
  1159. }
  1160. static struct console sunsu_console = {
  1161. .name = "ttyS",
  1162. .write = sunsu_console_write,
  1163. .device = uart_console_device,
  1164. .setup = sunsu_console_setup,
  1165. .flags = CON_PRINTBUFFER,
  1166. .index = -1,
  1167. .data = &sunsu_reg,
  1168. };
  1169. /*
  1170. * Register console.
  1171. */
  1172. static inline struct console *SUNSU_CONSOLE(void)
  1173. {
  1174. return &sunsu_console;
  1175. }
  1176. #else
  1177. #define SUNSU_CONSOLE() (NULL)
  1178. #define sunsu_serial_console_init() do { } while (0)
  1179. #endif
  1180. static enum su_type su_get_type(struct device_node *dp)
  1181. {
  1182. struct device_node *ap = of_find_node_by_path("/aliases");
  1183. if (ap) {
  1184. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1185. const char *ms = of_get_property(ap, "mouse", NULL);
  1186. if (keyb) {
  1187. if (dp == of_find_node_by_path(keyb))
  1188. return SU_PORT_KBD;
  1189. }
  1190. if (ms) {
  1191. if (dp == of_find_node_by_path(ms))
  1192. return SU_PORT_MS;
  1193. }
  1194. }
  1195. return SU_PORT_PORT;
  1196. }
  1197. static int su_probe(struct platform_device *op)
  1198. {
  1199. struct device_node *dp = op->dev.of_node;
  1200. struct uart_sunsu_port *up;
  1201. struct resource *rp;
  1202. enum su_type type;
  1203. bool ignore_line;
  1204. int err;
  1205. type = su_get_type(dp);
  1206. if (type == SU_PORT_PORT) {
  1207. if (nr_inst >= UART_NR)
  1208. return -EINVAL;
  1209. up = &sunsu_ports[nr_inst];
  1210. } else {
  1211. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1212. if (!up)
  1213. return -ENOMEM;
  1214. }
  1215. up->port.line = nr_inst;
  1216. spin_lock_init(&up->port.lock);
  1217. up->su_type = type;
  1218. rp = &op->resource[0];
  1219. up->port.mapbase = rp->start;
  1220. up->reg_size = resource_size(rp);
  1221. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1222. if (!up->port.membase) {
  1223. if (type != SU_PORT_PORT)
  1224. kfree(up);
  1225. return -ENOMEM;
  1226. }
  1227. up->port.irq = op->archdata.irqs[0];
  1228. up->port.dev = &op->dev;
  1229. up->port.type = PORT_UNKNOWN;
  1230. up->port.uartclk = (SU_BASE_BAUD * 16);
  1231. err = 0;
  1232. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1233. err = sunsu_kbd_ms_init(up);
  1234. if (err) {
  1235. of_iounmap(&op->resource[0],
  1236. up->port.membase, up->reg_size);
  1237. kfree(up);
  1238. return err;
  1239. }
  1240. platform_set_drvdata(op, up);
  1241. nr_inst++;
  1242. return 0;
  1243. }
  1244. up->port.flags |= UPF_BOOT_AUTOCONF;
  1245. sunsu_autoconfig(up);
  1246. err = -ENODEV;
  1247. if (up->port.type == PORT_UNKNOWN)
  1248. goto out_unmap;
  1249. up->port.ops = &sunsu_pops;
  1250. ignore_line = false;
  1251. if (!strcmp(dp->name, "rsc-console") ||
  1252. !strcmp(dp->name, "lom-console"))
  1253. ignore_line = true;
  1254. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1255. &sunsu_reg, up->port.line,
  1256. ignore_line);
  1257. err = uart_add_one_port(&sunsu_reg, &up->port);
  1258. if (err)
  1259. goto out_unmap;
  1260. platform_set_drvdata(op, up);
  1261. nr_inst++;
  1262. return 0;
  1263. out_unmap:
  1264. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1265. return err;
  1266. }
  1267. static int su_remove(struct platform_device *op)
  1268. {
  1269. struct uart_sunsu_port *up = platform_get_drvdata(op);
  1270. bool kbdms = false;
  1271. if (up->su_type == SU_PORT_MS ||
  1272. up->su_type == SU_PORT_KBD)
  1273. kbdms = true;
  1274. if (kbdms) {
  1275. #ifdef CONFIG_SERIO
  1276. serio_unregister_port(&up->serio);
  1277. #endif
  1278. } else if (up->port.type != PORT_UNKNOWN)
  1279. uart_remove_one_port(&sunsu_reg, &up->port);
  1280. if (up->port.membase)
  1281. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1282. if (kbdms)
  1283. kfree(up);
  1284. return 0;
  1285. }
  1286. static const struct of_device_id su_match[] = {
  1287. {
  1288. .name = "su",
  1289. },
  1290. {
  1291. .name = "su_pnp",
  1292. },
  1293. {
  1294. .name = "serial",
  1295. .compatible = "su",
  1296. },
  1297. {
  1298. .type = "serial",
  1299. .compatible = "su",
  1300. },
  1301. {},
  1302. };
  1303. MODULE_DEVICE_TABLE(of, su_match);
  1304. static struct platform_driver su_driver = {
  1305. .driver = {
  1306. .name = "su",
  1307. .of_match_table = su_match,
  1308. },
  1309. .probe = su_probe,
  1310. .remove = su_remove,
  1311. };
  1312. static int __init sunsu_init(void)
  1313. {
  1314. struct device_node *dp;
  1315. int err;
  1316. int num_uart = 0;
  1317. for_each_node_by_name(dp, "su") {
  1318. if (su_get_type(dp) == SU_PORT_PORT)
  1319. num_uart++;
  1320. }
  1321. for_each_node_by_name(dp, "su_pnp") {
  1322. if (su_get_type(dp) == SU_PORT_PORT)
  1323. num_uart++;
  1324. }
  1325. for_each_node_by_name(dp, "serial") {
  1326. if (of_device_is_compatible(dp, "su")) {
  1327. if (su_get_type(dp) == SU_PORT_PORT)
  1328. num_uart++;
  1329. }
  1330. }
  1331. for_each_node_by_type(dp, "serial") {
  1332. if (of_device_is_compatible(dp, "su")) {
  1333. if (su_get_type(dp) == SU_PORT_PORT)
  1334. num_uart++;
  1335. }
  1336. }
  1337. if (num_uart) {
  1338. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1339. if (err)
  1340. return err;
  1341. }
  1342. err = platform_driver_register(&su_driver);
  1343. if (err && num_uart)
  1344. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1345. return err;
  1346. }
  1347. static void __exit sunsu_exit(void)
  1348. {
  1349. platform_driver_unregister(&su_driver);
  1350. if (sunsu_reg.nr)
  1351. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1352. }
  1353. module_init(sunsu_init);
  1354. module_exit(sunsu_exit);
  1355. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1356. MODULE_DESCRIPTION("Sun SU serial port driver");
  1357. MODULE_VERSION("2.0");
  1358. MODULE_LICENSE("GPL");