of_serial.c 8.7 KB

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  1. /*
  2. * Serial Port driver for Open Firmware platform devices
  3. *
  4. * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/serial_reg.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_irq.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/nwpserial.h>
  22. #include <linux/clk.h>
  23. #include "8250/8250.h"
  24. struct of_serial_info {
  25. struct clk *clk;
  26. int type;
  27. int line;
  28. };
  29. #ifdef CONFIG_ARCH_TEGRA
  30. void tegra_serial_handle_break(struct uart_port *p)
  31. {
  32. unsigned int status, tmout = 10000;
  33. do {
  34. status = p->serial_in(p, UART_LSR);
  35. if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  36. status = p->serial_in(p, UART_RX);
  37. else
  38. break;
  39. if (--tmout == 0)
  40. break;
  41. udelay(1);
  42. } while (1);
  43. }
  44. #else
  45. static inline void tegra_serial_handle_break(struct uart_port *port)
  46. {
  47. }
  48. #endif
  49. /*
  50. * Fill a struct uart_port for a given device node
  51. */
  52. static int of_platform_serial_setup(struct platform_device *ofdev,
  53. int type, struct uart_port *port,
  54. struct of_serial_info *info)
  55. {
  56. struct resource resource;
  57. struct device_node *np = ofdev->dev.of_node;
  58. u32 clk, spd, prop;
  59. int ret;
  60. memset(port, 0, sizeof *port);
  61. if (of_property_read_u32(np, "clock-frequency", &clk)) {
  62. /* Get clk rate through clk driver if present */
  63. info->clk = devm_clk_get(&ofdev->dev, NULL);
  64. if (IS_ERR(info->clk)) {
  65. dev_warn(&ofdev->dev,
  66. "clk or clock-frequency not defined\n");
  67. return PTR_ERR(info->clk);
  68. }
  69. ret = clk_prepare_enable(info->clk);
  70. if (ret < 0)
  71. return ret;
  72. clk = clk_get_rate(info->clk);
  73. }
  74. /* If current-speed was set, then try not to change it. */
  75. if (of_property_read_u32(np, "current-speed", &spd) == 0)
  76. port->custom_divisor = clk / (16 * spd);
  77. ret = of_address_to_resource(np, 0, &resource);
  78. if (ret) {
  79. dev_warn(&ofdev->dev, "invalid address\n");
  80. goto out;
  81. }
  82. spin_lock_init(&port->lock);
  83. port->mapbase = resource.start;
  84. port->mapsize = resource_size(&resource);
  85. /* Check for shifted address mapping */
  86. if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  87. port->mapbase += prop;
  88. /* Check for registers offset within the devices address range */
  89. if (of_property_read_u32(np, "reg-shift", &prop) == 0)
  90. port->regshift = prop;
  91. /* Check for fifo size */
  92. if (of_property_read_u32(np, "fifo-size", &prop) == 0)
  93. port->fifosize = prop;
  94. /* Check for a fixed line number */
  95. ret = of_alias_get_id(np, "serial");
  96. if (ret >= 0)
  97. port->line = ret;
  98. port->irq = irq_of_parse_and_map(np, 0);
  99. port->iotype = UPIO_MEM;
  100. if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
  101. switch (prop) {
  102. case 1:
  103. port->iotype = UPIO_MEM;
  104. break;
  105. case 4:
  106. port->iotype = of_device_is_big_endian(np) ?
  107. UPIO_MEM32BE : UPIO_MEM32;
  108. break;
  109. default:
  110. dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
  111. prop);
  112. ret = -EINVAL;
  113. goto out;
  114. }
  115. }
  116. port->type = type;
  117. port->uartclk = clk;
  118. port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
  119. | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  120. if (of_find_property(np, "no-loopback-test", NULL))
  121. port->flags |= UPF_SKIP_TEST;
  122. port->dev = &ofdev->dev;
  123. switch (type) {
  124. case PORT_TEGRA:
  125. port->handle_break = tegra_serial_handle_break;
  126. break;
  127. case PORT_RT2880:
  128. port->iotype = UPIO_AU;
  129. break;
  130. }
  131. return 0;
  132. out:
  133. if (info->clk)
  134. clk_disable_unprepare(info->clk);
  135. return ret;
  136. }
  137. /*
  138. * Try to register a serial port
  139. */
  140. static const struct of_device_id of_platform_serial_table[];
  141. static int of_platform_serial_probe(struct platform_device *ofdev)
  142. {
  143. const struct of_device_id *match;
  144. struct of_serial_info *info;
  145. struct uart_port port;
  146. int port_type;
  147. int ret;
  148. match = of_match_device(of_platform_serial_table, &ofdev->dev);
  149. if (!match)
  150. return -EINVAL;
  151. if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
  152. return -EBUSY;
  153. info = kzalloc(sizeof(*info), GFP_KERNEL);
  154. if (info == NULL)
  155. return -ENOMEM;
  156. port_type = (unsigned long)match->data;
  157. ret = of_platform_serial_setup(ofdev, port_type, &port, info);
  158. if (ret)
  159. goto out;
  160. switch (port_type) {
  161. #ifdef CONFIG_SERIAL_8250
  162. case PORT_8250 ... PORT_MAX_8250:
  163. {
  164. struct uart_8250_port port8250;
  165. memset(&port8250, 0, sizeof(port8250));
  166. port8250.port = port;
  167. if (port.fifosize)
  168. port8250.capabilities = UART_CAP_FIFO;
  169. if (of_property_read_bool(ofdev->dev.of_node,
  170. "auto-flow-control"))
  171. port8250.capabilities |= UART_CAP_AFE;
  172. ret = serial8250_register_8250_port(&port8250);
  173. break;
  174. }
  175. #endif
  176. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  177. case PORT_NWPSERIAL:
  178. ret = nwpserial_register_port(&port);
  179. break;
  180. #endif
  181. default:
  182. /* need to add code for these */
  183. case PORT_UNKNOWN:
  184. dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
  185. ret = -ENODEV;
  186. break;
  187. }
  188. if (ret < 0)
  189. goto out;
  190. info->type = port_type;
  191. info->line = ret;
  192. platform_set_drvdata(ofdev, info);
  193. return 0;
  194. out:
  195. kfree(info);
  196. irq_dispose_mapping(port.irq);
  197. return ret;
  198. }
  199. /*
  200. * Release a line
  201. */
  202. static int of_platform_serial_remove(struct platform_device *ofdev)
  203. {
  204. struct of_serial_info *info = platform_get_drvdata(ofdev);
  205. switch (info->type) {
  206. #ifdef CONFIG_SERIAL_8250
  207. case PORT_8250 ... PORT_MAX_8250:
  208. serial8250_unregister_port(info->line);
  209. break;
  210. #endif
  211. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  212. case PORT_NWPSERIAL:
  213. nwpserial_unregister_port(info->line);
  214. break;
  215. #endif
  216. default:
  217. /* need to add code for these */
  218. break;
  219. }
  220. if (info->clk)
  221. clk_disable_unprepare(info->clk);
  222. kfree(info);
  223. return 0;
  224. }
  225. #ifdef CONFIG_PM_SLEEP
  226. #ifdef CONFIG_SERIAL_8250
  227. static void of_serial_suspend_8250(struct of_serial_info *info)
  228. {
  229. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  230. struct uart_port *port = &port8250->port;
  231. serial8250_suspend_port(info->line);
  232. if (info->clk && (!uart_console(port) || console_suspend_enabled))
  233. clk_disable_unprepare(info->clk);
  234. }
  235. static void of_serial_resume_8250(struct of_serial_info *info)
  236. {
  237. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  238. struct uart_port *port = &port8250->port;
  239. if (info->clk && (!uart_console(port) || console_suspend_enabled))
  240. clk_prepare_enable(info->clk);
  241. serial8250_resume_port(info->line);
  242. }
  243. #else
  244. static inline void of_serial_suspend_8250(struct of_serial_info *info)
  245. {
  246. }
  247. static inline void of_serial_resume_8250(struct of_serial_info *info)
  248. {
  249. }
  250. #endif
  251. static int of_serial_suspend(struct device *dev)
  252. {
  253. struct of_serial_info *info = dev_get_drvdata(dev);
  254. switch (info->type) {
  255. case PORT_8250 ... PORT_MAX_8250:
  256. of_serial_suspend_8250(info);
  257. break;
  258. default:
  259. break;
  260. }
  261. return 0;
  262. }
  263. static int of_serial_resume(struct device *dev)
  264. {
  265. struct of_serial_info *info = dev_get_drvdata(dev);
  266. switch (info->type) {
  267. case PORT_8250 ... PORT_MAX_8250:
  268. of_serial_resume_8250(info);
  269. break;
  270. default:
  271. break;
  272. }
  273. return 0;
  274. }
  275. #endif
  276. static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
  277. /*
  278. * A few common types, add more as needed.
  279. */
  280. static const struct of_device_id of_platform_serial_table[] = {
  281. { .compatible = "ns8250", .data = (void *)PORT_8250, },
  282. { .compatible = "ns16450", .data = (void *)PORT_16450, },
  283. { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
  284. { .compatible = "ns16550", .data = (void *)PORT_16550, },
  285. { .compatible = "ns16750", .data = (void *)PORT_16750, },
  286. { .compatible = "ns16850", .data = (void *)PORT_16850, },
  287. { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
  288. { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
  289. { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
  290. { .compatible = "altr,16550-FIFO32",
  291. .data = (void *)PORT_ALTR_16550_F32, },
  292. { .compatible = "altr,16550-FIFO64",
  293. .data = (void *)PORT_ALTR_16550_F64, },
  294. { .compatible = "altr,16550-FIFO128",
  295. .data = (void *)PORT_ALTR_16550_F128, },
  296. { .compatible = "mrvl,mmp-uart",
  297. .data = (void *)PORT_XSCALE, },
  298. { .compatible = "mrvl,pxa-uart",
  299. .data = (void *)PORT_XSCALE, },
  300. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  301. { .compatible = "ibm,qpace-nwp-serial",
  302. .data = (void *)PORT_NWPSERIAL, },
  303. #endif
  304. { /* end of list */ },
  305. };
  306. static struct platform_driver of_platform_serial_driver = {
  307. .driver = {
  308. .name = "of_serial",
  309. .of_match_table = of_platform_serial_table,
  310. },
  311. .probe = of_platform_serial_probe,
  312. .remove = of_platform_serial_remove,
  313. };
  314. module_platform_driver(of_platform_serial_driver);
  315. MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
  316. MODULE_LICENSE("GPL");
  317. MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");