ufshcd.h 20 KB

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  1. /*
  2. * Universal Flash Storage Host controller driver
  3. *
  4. * This code is based on drivers/scsi/ufs/ufshcd.h
  5. * Copyright (C) 2011-2013 Samsung India Software Operations
  6. *
  7. * Authors:
  8. * Santosh Yaraganavi <santosh.sy@samsung.com>
  9. * Vinayak Holikatti <h.vinayak@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. * See the COPYING file in the top-level directory or visit
  16. * <http://www.gnu.org/licenses/gpl-2.0.html>
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * This program is provided "AS IS" and "WITH ALL FAULTS" and
  24. * without warranty of any kind. You are solely responsible for
  25. * determining the appropriateness of using and distributing
  26. * the program and assume all risks associated with your exercise
  27. * of rights with respect to the program, including but not limited
  28. * to infringement of third party rights, the risks and costs of
  29. * program errors, damage to or loss of data, programs or equipment,
  30. * and unavailability or interruption of operations. Under no
  31. * circumstances will the contributor of this Program be liable for
  32. * any damages of any kind arising from your use or distribution of
  33. * this program.
  34. */
  35. #ifndef _UFSHCD_H
  36. #define _UFSHCD_H
  37. #include <linux/module.h>
  38. #include <linux/kernel.h>
  39. #include <linux/init.h>
  40. #include <linux/interrupt.h>
  41. #include <linux/io.h>
  42. #include <linux/delay.h>
  43. #include <linux/slab.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/workqueue.h>
  46. #include <linux/errno.h>
  47. #include <linux/types.h>
  48. #include <linux/wait.h>
  49. #include <linux/bitops.h>
  50. #include <linux/pm_runtime.h>
  51. #include <linux/clk.h>
  52. #include <linux/completion.h>
  53. #include <linux/regulator/consumer.h>
  54. #include <asm/irq.h>
  55. #include <asm/byteorder.h>
  56. #include <scsi/scsi.h>
  57. #include <scsi/scsi_cmnd.h>
  58. #include <scsi/scsi_host.h>
  59. #include <scsi/scsi_tcq.h>
  60. #include <scsi/scsi_dbg.h>
  61. #include <scsi/scsi_eh.h>
  62. #include "ufs.h"
  63. #include "ufshci.h"
  64. #define UFSHCD "ufshcd"
  65. #define UFSHCD_DRIVER_VERSION "0.2"
  66. struct ufs_hba;
  67. enum dev_cmd_type {
  68. DEV_CMD_TYPE_NOP = 0x0,
  69. DEV_CMD_TYPE_QUERY = 0x1,
  70. };
  71. /**
  72. * struct uic_command - UIC command structure
  73. * @command: UIC command
  74. * @argument1: UIC command argument 1
  75. * @argument2: UIC command argument 2
  76. * @argument3: UIC command argument 3
  77. * @cmd_active: Indicate if UIC command is outstanding
  78. * @result: UIC command result
  79. * @done: UIC command completion
  80. */
  81. struct uic_command {
  82. u32 command;
  83. u32 argument1;
  84. u32 argument2;
  85. u32 argument3;
  86. int cmd_active;
  87. int result;
  88. struct completion done;
  89. };
  90. /* Used to differentiate the power management options */
  91. enum ufs_pm_op {
  92. UFS_RUNTIME_PM,
  93. UFS_SYSTEM_PM,
  94. UFS_SHUTDOWN_PM,
  95. };
  96. #define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
  97. #define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
  98. #define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
  99. /* Host <-> Device UniPro Link state */
  100. enum uic_link_state {
  101. UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
  102. UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
  103. UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
  104. };
  105. #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
  106. #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
  107. UIC_LINK_ACTIVE_STATE)
  108. #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
  109. UIC_LINK_HIBERN8_STATE)
  110. #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
  111. #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
  112. UIC_LINK_ACTIVE_STATE)
  113. #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
  114. UIC_LINK_HIBERN8_STATE)
  115. /*
  116. * UFS Power management levels.
  117. * Each level is in increasing order of power savings.
  118. */
  119. enum ufs_pm_level {
  120. UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
  121. UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
  122. UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
  123. UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
  124. UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
  125. UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
  126. UFS_PM_LVL_MAX
  127. };
  128. struct ufs_pm_lvl_states {
  129. enum ufs_dev_pwr_mode dev_state;
  130. enum uic_link_state link_state;
  131. };
  132. /**
  133. * struct ufshcd_lrb - local reference block
  134. * @utr_descriptor_ptr: UTRD address of the command
  135. * @ucd_req_ptr: UCD address of the command
  136. * @ucd_rsp_ptr: Response UPIU address for this command
  137. * @ucd_prdt_ptr: PRDT address of the command
  138. * @cmd: pointer to SCSI command
  139. * @sense_buffer: pointer to sense buffer address of the SCSI command
  140. * @sense_bufflen: Length of the sense buffer
  141. * @scsi_status: SCSI status of the command
  142. * @command_type: SCSI, UFS, Query.
  143. * @task_tag: Task tag of the command
  144. * @lun: LUN of the command
  145. * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
  146. */
  147. struct ufshcd_lrb {
  148. struct utp_transfer_req_desc *utr_descriptor_ptr;
  149. struct utp_upiu_req *ucd_req_ptr;
  150. struct utp_upiu_rsp *ucd_rsp_ptr;
  151. struct ufshcd_sg_entry *ucd_prdt_ptr;
  152. struct scsi_cmnd *cmd;
  153. u8 *sense_buffer;
  154. unsigned int sense_bufflen;
  155. int scsi_status;
  156. int command_type;
  157. int task_tag;
  158. u8 lun; /* UPIU LUN id field is only 8-bit wide */
  159. bool intr_cmd;
  160. };
  161. /**
  162. * struct ufs_query - holds relevent data structures for query request
  163. * @request: request upiu and function
  164. * @descriptor: buffer for sending/receiving descriptor
  165. * @response: response upiu and response
  166. */
  167. struct ufs_query {
  168. struct ufs_query_req request;
  169. u8 *descriptor;
  170. struct ufs_query_res response;
  171. };
  172. /**
  173. * struct ufs_dev_cmd - all assosiated fields with device management commands
  174. * @type: device management command type - Query, NOP OUT
  175. * @lock: lock to allow one command at a time
  176. * @complete: internal commands completion
  177. * @tag_wq: wait queue until free command slot is available
  178. */
  179. struct ufs_dev_cmd {
  180. enum dev_cmd_type type;
  181. struct mutex lock;
  182. struct completion *complete;
  183. wait_queue_head_t tag_wq;
  184. struct ufs_query query;
  185. };
  186. /**
  187. * struct ufs_clk_info - UFS clock related info
  188. * @list: list headed by hba->clk_list_head
  189. * @clk: clock node
  190. * @name: clock name
  191. * @max_freq: maximum frequency supported by the clock
  192. * @min_freq: min frequency that can be used for clock scaling
  193. * @curr_freq: indicates the current frequency that it is set to
  194. * @enabled: variable to check against multiple enable/disable
  195. */
  196. struct ufs_clk_info {
  197. struct list_head list;
  198. struct clk *clk;
  199. const char *name;
  200. u32 max_freq;
  201. u32 min_freq;
  202. u32 curr_freq;
  203. bool enabled;
  204. };
  205. #define PRE_CHANGE 0
  206. #define POST_CHANGE 1
  207. struct ufs_pa_layer_attr {
  208. u32 gear_rx;
  209. u32 gear_tx;
  210. u32 lane_rx;
  211. u32 lane_tx;
  212. u32 pwr_rx;
  213. u32 pwr_tx;
  214. u32 hs_rate;
  215. };
  216. struct ufs_pwr_mode_info {
  217. bool is_valid;
  218. struct ufs_pa_layer_attr info;
  219. };
  220. /**
  221. * struct ufs_hba_variant_ops - variant specific callbacks
  222. * @name: variant name
  223. * @init: called when the driver is initialized
  224. * @exit: called to cleanup everything done in init
  225. * @get_ufs_hci_version: called to get UFS HCI version
  226. * @clk_scale_notify: notifies that clks are scaled up/down
  227. * @setup_clocks: called before touching any of the controller registers
  228. * @setup_regulators: called before accessing the host controller
  229. * @hce_enable_notify: called before and after HCE enable bit is set to allow
  230. * variant specific Uni-Pro initialization.
  231. * @link_startup_notify: called before and after Link startup is carried out
  232. * to allow variant specific Uni-Pro initialization.
  233. * @pwr_change_notify: called before and after a power mode change
  234. * is carried out to allow vendor spesific capabilities
  235. * to be set.
  236. * @suspend: called during host controller PM callback
  237. * @resume: called during host controller PM callback
  238. */
  239. struct ufs_hba_variant_ops {
  240. const char *name;
  241. int (*init)(struct ufs_hba *);
  242. void (*exit)(struct ufs_hba *);
  243. u32 (*get_ufs_hci_version)(struct ufs_hba *);
  244. void (*clk_scale_notify)(struct ufs_hba *);
  245. int (*setup_clocks)(struct ufs_hba *, bool);
  246. int (*setup_regulators)(struct ufs_hba *, bool);
  247. int (*hce_enable_notify)(struct ufs_hba *, bool);
  248. int (*link_startup_notify)(struct ufs_hba *, bool);
  249. int (*pwr_change_notify)(struct ufs_hba *,
  250. bool, struct ufs_pa_layer_attr *,
  251. struct ufs_pa_layer_attr *);
  252. int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
  253. int (*resume)(struct ufs_hba *, enum ufs_pm_op);
  254. };
  255. /* clock gating state */
  256. enum clk_gating_state {
  257. CLKS_OFF,
  258. CLKS_ON,
  259. REQ_CLKS_OFF,
  260. REQ_CLKS_ON,
  261. };
  262. /**
  263. * struct ufs_clk_gating - UFS clock gating related info
  264. * @gate_work: worker to turn off clocks after some delay as specified in
  265. * delay_ms
  266. * @ungate_work: worker to turn on clocks that will be used in case of
  267. * interrupt context
  268. * @state: the current clocks state
  269. * @delay_ms: gating delay in ms
  270. * @is_suspended: clk gating is suspended when set to 1 which can be used
  271. * during suspend/resume
  272. * @delay_attr: sysfs attribute to control delay_attr
  273. * @active_reqs: number of requests that are pending and should be waited for
  274. * completion before gating clocks.
  275. */
  276. struct ufs_clk_gating {
  277. struct delayed_work gate_work;
  278. struct work_struct ungate_work;
  279. enum clk_gating_state state;
  280. unsigned long delay_ms;
  281. bool is_suspended;
  282. struct device_attribute delay_attr;
  283. int active_reqs;
  284. };
  285. struct ufs_clk_scaling {
  286. ktime_t busy_start_t;
  287. bool is_busy_started;
  288. unsigned long tot_busy_t;
  289. unsigned long window_start_t;
  290. };
  291. /**
  292. * struct ufs_init_prefetch - contains data that is pre-fetched once during
  293. * initialization
  294. * @icc_level: icc level which was read during initialization
  295. */
  296. struct ufs_init_prefetch {
  297. u32 icc_level;
  298. };
  299. /**
  300. * struct ufs_hba - per adapter private structure
  301. * @mmio_base: UFSHCI base register address
  302. * @ucdl_base_addr: UFS Command Descriptor base address
  303. * @utrdl_base_addr: UTP Transfer Request Descriptor base address
  304. * @utmrdl_base_addr: UTP Task Management Descriptor base address
  305. * @ucdl_dma_addr: UFS Command Descriptor DMA address
  306. * @utrdl_dma_addr: UTRDL DMA address
  307. * @utmrdl_dma_addr: UTMRDL DMA address
  308. * @host: Scsi_Host instance of the driver
  309. * @dev: device handle
  310. * @lrb: local reference block
  311. * @lrb_in_use: lrb in use
  312. * @outstanding_tasks: Bits representing outstanding task requests
  313. * @outstanding_reqs: Bits representing outstanding transfer requests
  314. * @capabilities: UFS Controller Capabilities
  315. * @nutrs: Transfer Request Queue depth supported by controller
  316. * @nutmrs: Task Management Queue depth supported by controller
  317. * @ufs_version: UFS Version to which controller complies
  318. * @vops: pointer to variant specific operations
  319. * @priv: pointer to variant specific private data
  320. * @irq: Irq number of the controller
  321. * @active_uic_cmd: handle of active UIC command
  322. * @uic_cmd_mutex: mutex for uic command
  323. * @tm_wq: wait queue for task management
  324. * @tm_tag_wq: wait queue for free task management slots
  325. * @tm_slots_in_use: bit map of task management request slots in use
  326. * @pwr_done: completion for power mode change
  327. * @tm_condition: condition variable for task management
  328. * @ufshcd_state: UFSHCD states
  329. * @eh_flags: Error handling flags
  330. * @intr_mask: Interrupt Mask Bits
  331. * @ee_ctrl_mask: Exception event control mask
  332. * @is_powered: flag to check if HBA is powered
  333. * @is_init_prefetch: flag to check if data was pre-fetched in initialization
  334. * @init_prefetch_data: data pre-fetched during initialization
  335. * @eh_work: Worker to handle UFS errors that require s/w attention
  336. * @eeh_work: Worker to handle exception events
  337. * @errors: HBA errors
  338. * @uic_error: UFS interconnect layer error status
  339. * @saved_err: sticky error mask
  340. * @saved_uic_err: sticky UIC error mask
  341. * @dev_cmd: ufs device management command information
  342. * @last_dme_cmd_tstamp: time stamp of the last completed DME command
  343. * @auto_bkops_enabled: to track whether bkops is enabled in device
  344. * @vreg_info: UFS device voltage regulator information
  345. * @clk_list_head: UFS host controller clocks list node head
  346. * @pwr_info: holds current power mode
  347. * @max_pwr_info: keeps the device max valid pwm
  348. */
  349. struct ufs_hba {
  350. void __iomem *mmio_base;
  351. /* Virtual memory reference */
  352. struct utp_transfer_cmd_desc *ucdl_base_addr;
  353. struct utp_transfer_req_desc *utrdl_base_addr;
  354. struct utp_task_req_desc *utmrdl_base_addr;
  355. /* DMA memory reference */
  356. dma_addr_t ucdl_dma_addr;
  357. dma_addr_t utrdl_dma_addr;
  358. dma_addr_t utmrdl_dma_addr;
  359. struct Scsi_Host *host;
  360. struct device *dev;
  361. /*
  362. * This field is to keep a reference to "scsi_device" corresponding to
  363. * "UFS device" W-LU.
  364. */
  365. struct scsi_device *sdev_ufs_device;
  366. enum ufs_dev_pwr_mode curr_dev_pwr_mode;
  367. enum uic_link_state uic_link_state;
  368. /* Desired UFS power management level during runtime PM */
  369. enum ufs_pm_level rpm_lvl;
  370. /* Desired UFS power management level during system PM */
  371. enum ufs_pm_level spm_lvl;
  372. int pm_op_in_progress;
  373. struct ufshcd_lrb *lrb;
  374. unsigned long lrb_in_use;
  375. unsigned long outstanding_tasks;
  376. unsigned long outstanding_reqs;
  377. u32 capabilities;
  378. int nutrs;
  379. int nutmrs;
  380. u32 ufs_version;
  381. struct ufs_hba_variant_ops *vops;
  382. void *priv;
  383. unsigned int irq;
  384. bool is_irq_enabled;
  385. /* Interrupt aggregation support is broken */
  386. #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
  387. /*
  388. * delay before each dme command is required as the unipro
  389. * layer has shown instabilities
  390. */
  391. #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
  392. /*
  393. * If UFS host controller is having issue in processing LCC (Line
  394. * Control Command) coming from device then enable this quirk.
  395. * When this quirk is enabled, host controller driver should disable
  396. * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
  397. * attribute of device to 0).
  398. */
  399. #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
  400. /*
  401. * The attribute PA_RXHSUNTERMCAP specifies whether or not the
  402. * inbound Link supports unterminated line in HS mode. Setting this
  403. * attribute to 1 fixes moving to HS gear.
  404. */
  405. #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
  406. /*
  407. * This quirk needs to be enabled if the host contoller only allows
  408. * accessing the peer dme attributes in AUTO mode (FAST AUTO or
  409. * SLOW AUTO).
  410. */
  411. #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
  412. /*
  413. * This quirk needs to be enabled if the host contoller doesn't
  414. * advertise the correct version in UFS_VER register. If this quirk
  415. * is enabled, standard UFS host driver will call the vendor specific
  416. * ops (get_ufs_hci_version) to get the correct version.
  417. */
  418. #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
  419. unsigned int quirks; /* Deviations from standard UFSHCI spec. */
  420. wait_queue_head_t tm_wq;
  421. wait_queue_head_t tm_tag_wq;
  422. unsigned long tm_condition;
  423. unsigned long tm_slots_in_use;
  424. struct uic_command *active_uic_cmd;
  425. struct mutex uic_cmd_mutex;
  426. struct completion *uic_async_done;
  427. u32 ufshcd_state;
  428. u32 eh_flags;
  429. u32 intr_mask;
  430. u16 ee_ctrl_mask;
  431. bool is_powered;
  432. bool is_init_prefetch;
  433. struct ufs_init_prefetch init_prefetch_data;
  434. /* Work Queues */
  435. struct work_struct eh_work;
  436. struct work_struct eeh_work;
  437. /* HBA Errors */
  438. u32 errors;
  439. u32 uic_error;
  440. u32 saved_err;
  441. u32 saved_uic_err;
  442. /* Device management request data */
  443. struct ufs_dev_cmd dev_cmd;
  444. ktime_t last_dme_cmd_tstamp;
  445. /* Keeps information of the UFS device connected to this host */
  446. struct ufs_dev_info dev_info;
  447. bool auto_bkops_enabled;
  448. struct ufs_vreg_info vreg_info;
  449. struct list_head clk_list_head;
  450. bool wlun_dev_clr_ua;
  451. struct ufs_pa_layer_attr pwr_info;
  452. struct ufs_pwr_mode_info max_pwr_info;
  453. struct ufs_clk_gating clk_gating;
  454. /* Control to enable/disable host capabilities */
  455. u32 caps;
  456. /* Allow dynamic clk gating */
  457. #define UFSHCD_CAP_CLK_GATING (1 << 0)
  458. /* Allow hiberb8 with clk gating */
  459. #define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
  460. /* Allow dynamic clk scaling */
  461. #define UFSHCD_CAP_CLK_SCALING (1 << 2)
  462. /* Allow auto bkops to enabled during runtime suspend */
  463. #define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
  464. /*
  465. * This capability allows host controller driver to use the UFS HCI's
  466. * interrupt aggregation capability.
  467. * CAUTION: Enabling this might reduce overall UFS throughput.
  468. */
  469. #define UFSHCD_CAP_INTR_AGGR (1 << 4)
  470. struct devfreq *devfreq;
  471. struct ufs_clk_scaling clk_scaling;
  472. bool is_sys_suspended;
  473. };
  474. /* Returns true if clocks can be gated. Otherwise false */
  475. static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
  476. {
  477. return hba->caps & UFSHCD_CAP_CLK_GATING;
  478. }
  479. static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
  480. {
  481. return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
  482. }
  483. static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
  484. {
  485. return hba->caps & UFSHCD_CAP_CLK_SCALING;
  486. }
  487. static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
  488. {
  489. return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
  490. }
  491. static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
  492. {
  493. if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
  494. !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
  495. return true;
  496. else
  497. return false;
  498. }
  499. #define ufshcd_writel(hba, val, reg) \
  500. writel((val), (hba)->mmio_base + (reg))
  501. #define ufshcd_readl(hba, reg) \
  502. readl((hba)->mmio_base + (reg))
  503. /**
  504. * ufshcd_rmwl - read modify write into a register
  505. * @hba - per adapter instance
  506. * @mask - mask to apply on read value
  507. * @val - actual value to write
  508. * @reg - register address
  509. */
  510. static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
  511. {
  512. u32 tmp;
  513. tmp = ufshcd_readl(hba, reg);
  514. tmp &= ~mask;
  515. tmp |= (val & mask);
  516. ufshcd_writel(hba, tmp, reg);
  517. }
  518. int ufshcd_alloc_host(struct device *, struct ufs_hba **);
  519. int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
  520. void ufshcd_remove(struct ufs_hba *);
  521. /**
  522. * ufshcd_hba_stop - Send controller to reset state
  523. * @hba: per adapter instance
  524. */
  525. static inline void ufshcd_hba_stop(struct ufs_hba *hba)
  526. {
  527. ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
  528. }
  529. static inline void check_upiu_size(void)
  530. {
  531. BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
  532. GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
  533. }
  534. extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
  535. extern int ufshcd_runtime_resume(struct ufs_hba *hba);
  536. extern int ufshcd_runtime_idle(struct ufs_hba *hba);
  537. extern int ufshcd_system_suspend(struct ufs_hba *hba);
  538. extern int ufshcd_system_resume(struct ufs_hba *hba);
  539. extern int ufshcd_shutdown(struct ufs_hba *hba);
  540. extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
  541. u8 attr_set, u32 mib_val, u8 peer);
  542. extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
  543. u32 *mib_val, u8 peer);
  544. /* UIC command interfaces for DME primitives */
  545. #define DME_LOCAL 0
  546. #define DME_PEER 1
  547. #define ATTR_SET_NOR 0 /* NORMAL */
  548. #define ATTR_SET_ST 1 /* STATIC */
  549. static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
  550. u32 mib_val)
  551. {
  552. return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
  553. mib_val, DME_LOCAL);
  554. }
  555. static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
  556. u32 mib_val)
  557. {
  558. return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
  559. mib_val, DME_LOCAL);
  560. }
  561. static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
  562. u32 mib_val)
  563. {
  564. return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
  565. mib_val, DME_PEER);
  566. }
  567. static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
  568. u32 mib_val)
  569. {
  570. return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
  571. mib_val, DME_PEER);
  572. }
  573. static inline int ufshcd_dme_get(struct ufs_hba *hba,
  574. u32 attr_sel, u32 *mib_val)
  575. {
  576. return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
  577. }
  578. static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
  579. u32 attr_sel, u32 *mib_val)
  580. {
  581. return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
  582. }
  583. int ufshcd_hold(struct ufs_hba *hba, bool async);
  584. void ufshcd_release(struct ufs_hba *hba);
  585. #endif /* End of Header */